Lines Matching refs:st
204 struct ad7192_state *st = iio_priv(indio_dev); in ad7192_set_syscalib_mode() local
206 st->syscalib_mode[chan->channel] = mode; in ad7192_set_syscalib_mode()
214 struct ad7192_state *st = iio_priv(indio_dev); in ad7192_get_syscalib_mode() local
216 return st->syscalib_mode[chan->channel]; in ad7192_get_syscalib_mode()
224 struct ad7192_state *st = iio_priv(indio_dev); in ad7192_write_syscalib() local
232 temp = st->syscalib_mode[chan->channel]; in ad7192_write_syscalib()
235 ret = ad_sd_calibrate(&st->sd, AD7192_MODE_CAL_SYS_ZERO, in ad7192_write_syscalib()
238 ret = ad_sd_calibrate(&st->sd, AD7192_MODE_CAL_SYS_FULL, in ad7192_write_syscalib()
271 struct ad7192_state *st = ad_sigma_delta_to_ad7192(sd); in ad7192_set_channel() local
273 st->conf &= ~AD7192_CONF_CHAN_MASK; in ad7192_set_channel()
274 st->conf |= AD7192_CONF_CHAN(channel); in ad7192_set_channel()
276 return ad_sd_write_reg(&st->sd, AD7192_REG_CONF, 3, st->conf); in ad7192_set_channel()
282 struct ad7192_state *st = ad_sigma_delta_to_ad7192(sd); in ad7192_set_mode() local
284 st->mode &= ~AD7192_MODE_SEL_MASK; in ad7192_set_mode()
285 st->mode |= AD7192_MODE_SEL(mode); in ad7192_set_mode()
287 return ad_sd_write_reg(&st->sd, AD7192_REG_MODE, 3, st->mode); in ad7192_set_mode()
310 static int ad7192_calibrate_all(struct ad7192_state *st) in ad7192_calibrate_all() argument
312 return ad_sd_calibrate_all(&st->sd, ad7192_calib_arr, in ad7192_calibrate_all()
322 static int ad7192_of_clock_select(struct ad7192_state *st) in ad7192_of_clock_select() argument
324 struct device_node *np = st->sd.spi->dev.of_node; in ad7192_of_clock_select()
330 if (PTR_ERR(st->mclk) == -ENOENT) { in ad7192_of_clock_select()
343 static int ad7192_setup(struct ad7192_state *st, struct device_node *np) in ad7192_setup() argument
345 struct iio_dev *indio_dev = spi_get_drvdata(st->sd.spi); in ad7192_setup()
352 ret = ad_sd_reset(&st->sd, 48); in ad7192_setup()
358 ret = ad_sd_read_reg(&st->sd, AD7192_REG_ID, 1, &id); in ad7192_setup()
364 if (id != st->chip_info->chip_id) in ad7192_setup()
365 dev_warn(&st->sd.spi->dev, "device ID query failed (0x%X)\n", in ad7192_setup()
368 st->mode = AD7192_MODE_SEL(AD7192_MODE_IDLE) | in ad7192_setup()
369 AD7192_MODE_CLKSRC(st->clock_sel) | in ad7192_setup()
372 st->conf = AD7192_CONF_GAIN(0); in ad7192_setup()
376 st->mode |= AD7192_MODE_REJ60; in ad7192_setup()
379 if (refin2_en && st->chip_info->chip_id != CHIPID_AD7195) in ad7192_setup()
380 st->conf |= AD7192_CONF_REFSEL; in ad7192_setup()
382 st->conf &= ~AD7192_CONF_CHOP; in ad7192_setup()
383 st->f_order = AD7192_NO_SYNC_FILTER; in ad7192_setup()
387 st->conf |= AD7192_CONF_BUF; in ad7192_setup()
391 st->conf |= AD7192_CONF_UNIPOLAR; in ad7192_setup()
396 st->conf |= AD7192_CONF_BURN; in ad7192_setup()
398 dev_warn(&st->sd.spi->dev, in ad7192_setup()
402 ret = ad_sd_write_reg(&st->sd, AD7192_REG_MODE, 3, st->mode); in ad7192_setup()
406 ret = ad_sd_write_reg(&st->sd, AD7192_REG_CONF, 3, st->conf); in ad7192_setup()
410 ret = ad7192_calibrate_all(st); in ad7192_setup()
415 for (i = 0; i < ARRAY_SIZE(st->scale_avail); i++) { in ad7192_setup()
416 scale_uv = ((u64)st->int_vref_mv * 100000000) in ad7192_setup()
418 ((st->conf & AD7192_CONF_UNIPOLAR) ? 0 : 1)); in ad7192_setup()
421 st->scale_avail[i][1] = do_div(scale_uv, 100000000) * 10; in ad7192_setup()
422 st->scale_avail[i][0] = scale_uv; in ad7192_setup()
433 struct ad7192_state *st = iio_priv(indio_dev); in ad7192_show_ac_excitation() local
435 return sprintf(buf, "%d\n", !!(st->mode & AD7192_MODE_ACX)); in ad7192_show_ac_excitation()
443 struct ad7192_state *st = iio_priv(indio_dev); in ad7192_show_bridge_switch() local
445 return sprintf(buf, "%d\n", !!(st->gpocon & AD7192_GPOCON_BPDSW)); in ad7192_show_bridge_switch()
454 struct ad7192_state *st = iio_priv(indio_dev); in ad7192_set() local
470 st->gpocon |= AD7192_GPOCON_BPDSW; in ad7192_set()
472 st->gpocon &= ~AD7192_GPOCON_BPDSW; in ad7192_set()
474 ad_sd_write_reg(&st->sd, AD7192_REG_GPOCON, 1, st->gpocon); in ad7192_set()
478 st->mode |= AD7192_MODE_ACX; in ad7192_set()
480 st->mode &= ~AD7192_MODE_ACX; in ad7192_set()
482 ad_sd_write_reg(&st->sd, AD7192_REG_MODE, 3, st->mode); in ad7192_set()
493 static void ad7192_get_available_filter_freq(struct ad7192_state *st, in ad7192_get_available_filter_freq() argument
499 fadc = DIV_ROUND_CLOSEST(st->fclk, in ad7192_get_available_filter_freq()
500 AD7192_SYNC4_FILTER * AD7192_MODE_RATE(st->mode)); in ad7192_get_available_filter_freq()
503 fadc = DIV_ROUND_CLOSEST(st->fclk, in ad7192_get_available_filter_freq()
504 AD7192_SYNC3_FILTER * AD7192_MODE_RATE(st->mode)); in ad7192_get_available_filter_freq()
507 fadc = DIV_ROUND_CLOSEST(st->fclk, AD7192_MODE_RATE(st->mode)); in ad7192_get_available_filter_freq()
517 struct ad7192_state *st = iio_priv(indio_dev); in ad7192_show_filter_avail() local
521 ad7192_get_available_filter_freq(st, freq_avail); in ad7192_show_filter_avail()
570 static int ad7192_set_3db_filter_freq(struct ad7192_state *st, in ad7192_set_3db_filter_freq() argument
580 ad7192_get_available_filter_freq(st, freq_avail); in ad7192_set_3db_filter_freq()
592 st->f_order = AD7192_SYNC4_FILTER; in ad7192_set_3db_filter_freq()
593 st->mode &= ~AD7192_MODE_SINC3; in ad7192_set_3db_filter_freq()
595 st->conf |= AD7192_CONF_CHOP; in ad7192_set_3db_filter_freq()
598 st->f_order = AD7192_SYNC3_FILTER; in ad7192_set_3db_filter_freq()
599 st->mode |= AD7192_MODE_SINC3; in ad7192_set_3db_filter_freq()
601 st->conf |= AD7192_CONF_CHOP; in ad7192_set_3db_filter_freq()
604 st->f_order = AD7192_NO_SYNC_FILTER; in ad7192_set_3db_filter_freq()
605 st->mode &= ~AD7192_MODE_SINC3; in ad7192_set_3db_filter_freq()
607 st->conf &= ~AD7192_CONF_CHOP; in ad7192_set_3db_filter_freq()
610 st->f_order = AD7192_NO_SYNC_FILTER; in ad7192_set_3db_filter_freq()
611 st->mode |= AD7192_MODE_SINC3; in ad7192_set_3db_filter_freq()
613 st->conf &= ~AD7192_CONF_CHOP; in ad7192_set_3db_filter_freq()
617 ret = ad_sd_write_reg(&st->sd, AD7192_REG_MODE, 3, st->mode); in ad7192_set_3db_filter_freq()
621 return ad_sd_write_reg(&st->sd, AD7192_REG_CONF, 3, st->conf); in ad7192_set_3db_filter_freq()
624 static int ad7192_get_3db_filter_freq(struct ad7192_state *st) in ad7192_get_3db_filter_freq() argument
628 fadc = DIV_ROUND_CLOSEST(st->fclk, in ad7192_get_3db_filter_freq()
629 st->f_order * AD7192_MODE_RATE(st->mode)); in ad7192_get_3db_filter_freq()
631 if (st->conf & AD7192_CONF_CHOP) in ad7192_get_3db_filter_freq()
633 if (st->mode & AD7192_MODE_SINC3) in ad7192_get_3db_filter_freq()
645 struct ad7192_state *st = iio_priv(indio_dev); in ad7192_read_raw() local
646 bool unipolar = !!(st->conf & AD7192_CONF_UNIPOLAR); in ad7192_read_raw()
654 mutex_lock(&st->lock); in ad7192_read_raw()
655 *val = st->scale_avail[AD7192_CONF_GAIN(st->conf)][0]; in ad7192_read_raw()
656 *val2 = st->scale_avail[AD7192_CONF_GAIN(st->conf)][1]; in ad7192_read_raw()
657 mutex_unlock(&st->lock); in ad7192_read_raw()
676 *val = st->fclk / in ad7192_read_raw()
677 (st->f_order * 1024 * AD7192_MODE_RATE(st->mode)); in ad7192_read_raw()
680 *val = ad7192_get_3db_filter_freq(st); in ad7192_read_raw()
694 struct ad7192_state *st = iio_priv(indio_dev); in ad7192_write_raw() local
705 mutex_lock(&st->lock); in ad7192_write_raw()
706 for (i = 0; i < ARRAY_SIZE(st->scale_avail); i++) in ad7192_write_raw()
707 if (val2 == st->scale_avail[i][1]) { in ad7192_write_raw()
709 tmp = st->conf; in ad7192_write_raw()
710 st->conf &= ~AD7192_CONF_GAIN(-1); in ad7192_write_raw()
711 st->conf |= AD7192_CONF_GAIN(i); in ad7192_write_raw()
712 if (tmp == st->conf) in ad7192_write_raw()
714 ad_sd_write_reg(&st->sd, AD7192_REG_CONF, in ad7192_write_raw()
715 3, st->conf); in ad7192_write_raw()
716 ad7192_calibrate_all(st); in ad7192_write_raw()
719 mutex_unlock(&st->lock); in ad7192_write_raw()
727 div = st->fclk / (val * st->f_order * 1024); in ad7192_write_raw()
733 st->mode &= ~AD7192_MODE_RATE(-1); in ad7192_write_raw()
734 st->mode |= AD7192_MODE_RATE(div); in ad7192_write_raw()
735 ad_sd_write_reg(&st->sd, AD7192_REG_MODE, 3, st->mode); in ad7192_write_raw()
738 ret = ad7192_set_3db_filter_freq(st, val, val2 / 1000); in ad7192_write_raw()
770 struct ad7192_state *st = iio_priv(indio_dev); in ad7192_read_avail() local
774 *vals = (int *)st->scale_avail; in ad7192_read_avail()
777 *length = ARRAY_SIZE(st->scale_avail) * 2; in ad7192_read_avail()
892 struct ad7192_state *st = iio_priv(indio_dev); in ad7192_channels_config() local
894 switch (st->chip_info->chip_id) { in ad7192_channels_config()
910 struct ad7192_state *st; in ad7192_probe() local
919 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); in ad7192_probe()
923 st = iio_priv(indio_dev); in ad7192_probe()
925 mutex_init(&st->lock); in ad7192_probe()
927 st->avdd = devm_regulator_get(&spi->dev, "avdd"); in ad7192_probe()
928 if (IS_ERR(st->avdd)) in ad7192_probe()
929 return PTR_ERR(st->avdd); in ad7192_probe()
931 ret = regulator_enable(st->avdd); in ad7192_probe()
937 st->dvdd = devm_regulator_get(&spi->dev, "dvdd"); in ad7192_probe()
938 if (IS_ERR(st->dvdd)) { in ad7192_probe()
939 ret = PTR_ERR(st->dvdd); in ad7192_probe()
943 ret = regulator_enable(st->dvdd); in ad7192_probe()
949 ret = regulator_get_voltage(st->avdd); in ad7192_probe()
954 st->int_vref_mv = ret / 1000; in ad7192_probe()
957 st->chip_info = of_device_get_match_data(&spi->dev); in ad7192_probe()
958 indio_dev->name = st->chip_info->name; in ad7192_probe()
965 if (st->chip_info->chip_id == CHIPID_AD7195) in ad7192_probe()
970 ad_sd_init(&st->sd, indio_dev, spi, &ad7192_sigma_delta_info); in ad7192_probe()
976 st->fclk = AD7192_INT_FREQ_MHZ; in ad7192_probe()
978 st->mclk = devm_clk_get(&st->sd.spi->dev, "mclk"); in ad7192_probe()
979 if (IS_ERR(st->mclk) && PTR_ERR(st->mclk) != -ENOENT) { in ad7192_probe()
980 ret = PTR_ERR(st->mclk); in ad7192_probe()
984 st->clock_sel = ad7192_of_clock_select(st); in ad7192_probe()
986 if (st->clock_sel == AD7192_CLK_EXT_MCLK1_2 || in ad7192_probe()
987 st->clock_sel == AD7192_CLK_EXT_MCLK2) { in ad7192_probe()
988 ret = clk_prepare_enable(st->mclk); in ad7192_probe()
992 st->fclk = clk_get_rate(st->mclk); in ad7192_probe()
993 if (!ad7192_valid_external_frequency(st->fclk)) { in ad7192_probe()
1001 ret = ad7192_setup(st, spi->dev.of_node); in ad7192_probe()
1011 if (st->clock_sel == AD7192_CLK_EXT_MCLK1_2 || in ad7192_probe()
1012 st->clock_sel == AD7192_CLK_EXT_MCLK2) in ad7192_probe()
1013 clk_disable_unprepare(st->mclk); in ad7192_probe()
1017 regulator_disable(st->dvdd); in ad7192_probe()
1019 regulator_disable(st->avdd); in ad7192_probe()
1027 struct ad7192_state *st = iio_priv(indio_dev); in ad7192_remove() local
1030 if (st->clock_sel == AD7192_CLK_EXT_MCLK1_2 || in ad7192_remove()
1031 st->clock_sel == AD7192_CLK_EXT_MCLK2) in ad7192_remove()
1032 clk_disable_unprepare(st->mclk); in ad7192_remove()
1035 regulator_disable(st->dvdd); in ad7192_remove()
1036 regulator_disable(st->avdd); in ad7192_remove()