Lines Matching defs:bp
53 #define BNX2X_MIN_MSIX_VEC_CNT(bp) ((bp)->min_msix_vec_cnt) argument
169 #define REG_ADDR(bp, offset) ((bp->regview) + (offset)) argument
171 #define REG_RD(bp, offset) readl(REG_ADDR(bp, offset)) argument
172 #define REG_RD8(bp, offset) readb(REG_ADDR(bp, offset)) argument
173 #define REG_RD16(bp, offset) readw(REG_ADDR(bp, offset)) argument
175 #define REG_WR_RELAXED(bp, offset, val) \ argument
178 #define REG_WR16_RELAXED(bp, offset, val) \ argument
181 #define REG_WR(bp, offset, val) writel((u32)val, REG_ADDR(bp, offset)) argument
182 #define REG_WR8(bp, offset, val) writeb((u8)val, REG_ADDR(bp, offset)) argument
183 #define REG_WR16(bp, offset, val) writew((u16)val, REG_ADDR(bp, offset)) argument
185 #define REG_RD_IND(bp, offset) bnx2x_reg_rd_ind(bp, offset) argument
186 #define REG_WR_IND(bp, offset, val) bnx2x_reg_wr_ind(bp, offset, val) argument
188 #define REG_RD_DMAE(bp, offset, valp, len32) \ argument
194 #define REG_WR_DMAE(bp, offset, valp, len32) \ argument
201 #define REG_WR_DMAE_LEN(bp, offset, valp, len32) \ argument
204 #define VIRT_WR_DMAE_LEN(bp, data, addr, len32, le32_swap) \ argument
210 #define SHMEM_ADDR(bp, field) (bp->common.shmem_base + \ argument
212 #define SHMEM_RD(bp, field) REG_RD(bp, SHMEM_ADDR(bp, field)) argument
213 #define SHMEM_WR(bp, field, val) REG_WR(bp, SHMEM_ADDR(bp, field), val) argument
215 #define SHMEM2_ADDR(bp, field) (bp->common.shmem2_base + \ argument
217 #define SHMEM2_RD(bp, field) REG_RD(bp, SHMEM2_ADDR(bp, field)) argument
218 #define SHMEM2_WR(bp, field, val) REG_WR(bp, SHMEM2_ADDR(bp, field), val) argument
219 #define MF_CFG_ADDR(bp, field) (bp->common.mf_cfg_base + \ argument
221 #define MF2_CFG_ADDR(bp, field) (bp->common.mf2_cfg_base + \ argument
224 #define MF_CFG_RD(bp, field) REG_RD(bp, MF_CFG_ADDR(bp, field)) argument
225 #define MF_CFG_WR(bp, field, val) REG_WR(bp,\ argument
227 #define MF2_CFG_RD(bp, field) REG_RD(bp, MF2_CFG_ADDR(bp, field)) argument
229 #define SHMEM2_HAS(bp, field) ((bp)->common.shmem2_base && \ argument
233 #define EMAC_RD(bp, reg) REG_RD(bp, emac_base + reg) argument
234 #define EMAC_WR(bp, reg, val) REG_WR(bp, emac_base + reg, val) argument
287 #define BNX2X_1st_NON_L2_ETH_CID(bp) (BNX2X_NUM_NON_CNIC_QUEUES(bp) * \ argument
292 #define UIO_ROUNDUP(bp) (roundup(BNX2X_1st_NON_L2_ETH_CID(bp), \ argument
295 #define UIO_CID_OFFSET(bp) ((UIO_ROUNDUP(bp) + UIO_DPM) % \ argument
298 #define UIO_DPM_ALIGN(bp) (UIO_ROUNDUP(bp) + UIO_CID_OFFSET(bp)) argument
300 #define UIO_DPM_CID0_OFFSET(bp) ((UIO_DPM * 2) * \ argument
303 #define BNX2X_CNIC_START_ETH_CID(bp) (UIO_DPM_ALIGN(bp) + \ argument
306 #define UIO_CID_PAD(bp) (BNX2X_CNIC_START_ETH_CID(bp) - \ argument
309 #define BNX2X_ISCSI_ETH_CID(bp) (BNX2X_CNIC_START_ETH_CID(bp)) argument
311 #define BNX2X_FCOE_ETH_CID(bp) (BNX2X_CNIC_START_ETH_CID(bp) + 1) argument
313 #define CNIC_SUPPORT(bp) ((bp)->cnic_support) argument
314 #define CNIC_ENABLED(bp) ((bp)->cnic_enabled) argument
315 #define CNIC_LOADED(bp) ((bp)->cnic_loaded) argument
316 #define FCOE_INIT(bp) ((bp)->fcoe_init) argument
329 #define CID_TO_FP(cid, bp) ((cid) % BNX2X_NUM_NON_CNIC_QUEUES(bp)) argument
330 #define CID_COS_TO_TX_ONLY_CID(cid, cos, bp) \ argument
334 #define FP_COS_TO_TXQ(fp, cos, bp) \ argument
348 #define MAX_ETH_TXQ_IDX(bp) (BNX2X_NUM_NON_CNIC_QUEUES(bp) * (bp)->max_cos) argument
349 #define FCOE_TXQ_IDX(bp) (MAX_ETH_TXQ_IDX(bp) + FCOE_TXQ_IDX_OFFSET) argument
383 #define BRB_SIZE(bp) (CHIP_IS_E3(bp) ? 1024 : 512) argument
384 #define MAX_AGG_QS(bp) (CHIP_IS_E1(bp) ? \ argument
387 #define FW_DROP_LEVEL(bp) (3 + MAX_SPQ_PENDING + MAX_AGG_QS(bp)) argument
435 #define SGE_TH_LO(bp) (NUM_SGE_REQ + \ argument
437 #define SGE_TH_HI(bp) (SGE_TH_LO(bp) + DROPLESS_FC_HEADROOM) argument
551 struct bnx2x *bp; /* parent */ member
621 #define bnx2x_fp(bp, nr, var) ((bp)->fp[(nr)].var) argument
622 #define bnx2x_sp_obj(bp, fp) ((bp)->sp_objs[(fp)->index]) argument
623 #define bnx2x_fp_stats(bp, fp) (&((bp)->fp_stats[(fp)->index])) argument
624 #define bnx2x_fp_qstats(bp, fp) (&((bp)->fp_stats[(fp)->index].eth_q_stats)) argument
631 #define FCOE_IDX(bp) (BNX2X_NUM_NON_CNIC_QUEUES(bp) + \ argument
633 #define bnx2x_fcoe_fp(bp) (&bp->fp[FCOE_IDX(bp)]) argument
634 #define bnx2x_fcoe(bp, var) (bnx2x_fcoe_fp(bp)->var) argument
635 #define bnx2x_fcoe_inner_sp_obj(bp) (&bp->sp_objs[FCOE_IDX(bp)]) argument
636 #define bnx2x_fcoe_sp_obj(bp, var) (bnx2x_fcoe_inner_sp_obj(bp)->var) argument
637 #define bnx2x_fcoe_tx(bp, var) (bnx2x_fcoe_fp(bp)-> \ argument
699 #define BD_TH_LO(bp) (NUM_BD_REQ + \ argument
702 #define BD_TH_HI(bp) (BD_TH_LO(bp) + DROPLESS_FC_HEADROOM) argument
747 #define RCQ_TH_LO(bp) (NUM_RCQ_REQ + \ argument
750 #define RCQ_TH_HI(bp) (RCQ_TH_LO(bp) + DROPLESS_FC_HEADROOM) argument
773 #define DOORBELL_RELAXED(bp, cid, val) \ argument
851 #define CHIP_ID(bp) (bp->common.chip_id & 0xfffffff0) argument
853 #define CHIP_NUM(bp) (bp->common.chip_id >> 16) argument
877 #define CHIP_IS_E1(bp) (CHIP_NUM(bp) == CHIP_NUM_57710) argument
878 #define CHIP_IS_57711(bp) (CHIP_NUM(bp) == CHIP_NUM_57711) argument
879 #define CHIP_IS_57711E(bp) (CHIP_NUM(bp) == CHIP_NUM_57711E) argument
880 #define CHIP_IS_57712(bp) (CHIP_NUM(bp) == CHIP_NUM_57712) argument
881 #define CHIP_IS_57712_VF(bp) (CHIP_NUM(bp) == CHIP_NUM_57712_VF) argument
882 #define CHIP_IS_57712_MF(bp) (CHIP_NUM(bp) == CHIP_NUM_57712_MF) argument
883 #define CHIP_IS_57800(bp) (CHIP_NUM(bp) == CHIP_NUM_57800) argument
884 #define CHIP_IS_57800_MF(bp) (CHIP_NUM(bp) == CHIP_NUM_57800_MF) argument
885 #define CHIP_IS_57800_VF(bp) (CHIP_NUM(bp) == CHIP_NUM_57800_VF) argument
886 #define CHIP_IS_57810(bp) (CHIP_NUM(bp) == CHIP_NUM_57810) argument
887 #define CHIP_IS_57810_MF(bp) (CHIP_NUM(bp) == CHIP_NUM_57810_MF) argument
888 #define CHIP_IS_57810_VF(bp) (CHIP_NUM(bp) == CHIP_NUM_57810_VF) argument
889 #define CHIP_IS_57811(bp) (CHIP_NUM(bp) == CHIP_NUM_57811) argument
890 #define CHIP_IS_57811_MF(bp) (CHIP_NUM(bp) == CHIP_NUM_57811_MF) argument
891 #define CHIP_IS_57811_VF(bp) (CHIP_NUM(bp) == CHIP_NUM_57811_VF) argument
892 #define CHIP_IS_57840(bp) \ argument
896 #define CHIP_IS_57840_MF(bp) ((CHIP_NUM(bp) == CHIP_NUM_57840_MF) || \ argument
898 #define CHIP_IS_57840_VF(bp) (CHIP_NUM(bp) == CHIP_NUM_57840_VF) argument
899 #define CHIP_IS_E1H(bp) (CHIP_IS_57711(bp) || \ argument
901 #define CHIP_IS_57811xx(bp) (CHIP_IS_57811(bp) || \ argument
904 #define CHIP_IS_E2(bp) (CHIP_IS_57712(bp) || \ argument
907 #define CHIP_IS_E3(bp) (CHIP_IS_57800(bp) || \ argument
917 #define CHIP_IS_E1x(bp) (CHIP_IS_E1((bp)) || CHIP_IS_E1H((bp))) argument
918 #define USES_WARPCORE(bp) (CHIP_IS_E3(bp)) argument
923 #define CHIP_REV_VAL(bp) (bp->common.chip_id & CHIP_REV_MASK) argument
927 #define CHIP_REV_IS_SLOW(bp) (CHIP_REV_VAL(bp) > 0x00005000) argument
929 #define CHIP_REV_IS_EMUL(bp) ((CHIP_REV_IS_SLOW(bp)) && \ argument
932 #define CHIP_REV_IS_FPGA(bp) ((CHIP_REV_IS_SLOW(bp)) && \ argument
935 #define CHIP_TIME(bp) ((CHIP_REV_IS_EMUL(bp)) ? 2000 : \ argument
938 #define CHIP_METAL(bp) (bp->common.chip_id & 0x00000ff0) argument
939 #define CHIP_BOND_ID(bp) (bp->common.chip_id & 0x0000000f) argument
940 #define CHIP_REV_SIM(bp) (((CHIP_REV_MASK - CHIP_REV_VAL(bp)) >>\ argument
943 #define CHIP_REV(bp) (CHIP_REV_IS_SLOW(bp) ? \ argument
946 #define CHIP_IS_E3B0(bp) (CHIP_IS_E3(bp) && \ argument
948 #define CHIP_IS_E3A0(bp) (CHIP_IS_E3(bp) && \ argument
961 #define CONFIGURE_NIC_MODE(bp) (!CHIP_IS_E1x(bp) && !CNIC_ENABLED(bp)) argument
982 #define CHIP_INT_MODE_IS_NBC(bp) \ argument
985 #define CHIP_INT_MODE_IS_BC(bp) (!CHIP_INT_MODE_IS_NBC(bp)) argument
991 #define CHIP_MODE(bp) (bp->common.chip_port_mode) argument
992 #define CHIP_MODE_IS_4_PORT(bp) (CHIP_MODE(bp) == CHIP_4_PORT_MODE) argument
1180 #define bnx2x_sp(bp, var) (&bp->slowpath->var) argument
1181 #define bnx2x_sp_mapping(bp, var) \ argument
1360 #define BP_PATH(bp) (CHIP_IS_E1x(bp) ? 0 : (bp->pf_num & 1)) argument
1361 #define BP_PORT(bp) (bp->pfid & 1) argument
1362 #define BP_FUNC(bp) (bp->pfid) argument
1363 #define BP_ABS_FUNC(bp) (bp->pf_num) argument
1364 #define BP_VN(bp) ((bp)->pfid >> 1) argument
1365 #define BP_MAX_VN_NUM(bp) (CHIP_MODE_IS_4_PORT(bp) ? 2 : 4) argument
1366 #define BP_L_ID(bp) (BP_VN(bp) << 2) argument
1367 #define BP_FW_MB_IDX_VN(bp, vn) (BP_PORT(bp) +\ argument
1369 #define BP_FW_MB_IDX(bp) BP_FW_MB_IDX_VN(bp, BP_VN(bp)) argument
1493 #define BP_NOMCP(bp) ((bp)->flags & NO_MCP_FLAG) argument
1496 #define IS_VF(bp) ((bp)->flags & IS_VF_FLAG) argument
1497 #define IS_PF(bp) (!((bp)->flags & IS_VF_FLAG)) argument
1499 #define IS_VF(bp) false argument
1500 #define IS_PF(bp) true argument
1503 #define NO_ISCSI(bp) ((bp)->flags & NO_ISCSI_FLAG) argument
1504 #define NO_ISCSI_OOO(bp) ((bp)->flags & NO_ISCSI_OOO_FLAG) argument
1505 #define NO_FCOE(bp) ((bp)->flags & NO_FCOE_FLAG) argument
1551 #define IS_MF(bp) (bp->mf_mode != 0) argument
1552 #define IS_MF_SI(bp) (bp->mf_mode == MULTI_FUNCTION_SI) argument
1553 #define IS_MF_SD(bp) (bp->mf_mode == MULTI_FUNCTION_SD) argument
1554 #define IS_MF_AFEX(bp) (bp->mf_mode == MULTI_FUNCTION_AFEX) argument
1556 #define IS_MF_UFP(bp) (IS_MF_SD(bp) && \ argument
1558 #define IS_MF_BD(bp) (IS_MF_SD(bp) && \ argument
1651 #define BP_ILT(bp) ((bp)->ilt) argument
1657 #define BNX2X_MAX_RSS_COUNT(bp) ((bp)->igu_sb_cnt - CNIC_SUPPORT(bp)) argument
1664 #define BNX2X_L2_CID_COUNT(bp) (BNX2X_NUM_ETH_QUEUES(bp) * BNX2X_MULTI_TX_COS \ argument
1666 #define BNX2X_L2_MAX_CID(bp) (BNX2X_MAX_RSS_COUNT(bp) * BNX2X_MULTI_TX_COS \ argument
1668 #define L2_ILT_LINES(bp) (DIV_ROUND_UP(BNX2X_L2_CID_COUNT(bp),\ argument
1726 #define GUNZIP_BUF(bp) (bp->gunzip_buf) argument
1727 #define GUNZIP_PHYS(bp) (bp->gunzip_mapping) argument
1728 #define GUNZIP_OUTLEN(bp) (bp->gunzip_outlen) argument
1736 #define INIT_MODE_FLAGS(bp) (bp->init_mode_flags) argument
1746 #define INIT_OPS(bp) (bp->init_ops) argument
1747 #define INIT_OPS_OFFSETS(bp) (bp->init_ops_offsets) argument
1748 #define INIT_DATA(bp) (bp->init_data) argument
1749 #define INIT_TSEM_INT_TABLE_DATA(bp) (bp->tsem_int_table_data) argument
1750 #define INIT_TSEM_PRAM_DATA(bp) (bp->tsem_pram_data) argument
1751 #define INIT_USEM_INT_TABLE_DATA(bp) (bp->usem_int_table_data) argument
1752 #define INIT_USEM_PRAM_DATA(bp) (bp->usem_pram_data) argument
1753 #define INIT_XSEM_INT_TABLE_DATA(bp) (bp->xsem_int_table_data) argument
1754 #define INIT_XSEM_PRAM_DATA(bp) (bp->xsem_pram_data) argument
1755 #define INIT_CSEM_INT_TABLE_DATA(bp) (bp->csem_int_table_data) argument
1756 #define INIT_CSEM_PRAM_DATA(bp) (bp->csem_pram_data) argument
1763 #define IS_SRIOV(bp) ((bp)->vfdb) argument
1865 #define BNX2X_NUM_QUEUES(bp) (bp->num_queues) argument
1866 #define BNX2X_NUM_ETH_QUEUES(bp) ((bp)->num_ethernet_queues) argument
1867 #define BNX2X_NUM_NON_CNIC_QUEUES(bp) (BNX2X_NUM_QUEUES(bp) - \ argument
1869 #define BNX2X_NUM_RX_QUEUES(bp) BNX2X_NUM_QUEUES(bp) argument
1871 #define is_multi(bp) (BNX2X_NUM_QUEUES(bp) > 1) argument
1873 #define BNX2X_MAX_QUEUES(bp) BNX2X_MAX_RSS_COUNT(bp) argument
1898 #define for_each_cnic_queue(bp, var) \ argument
1905 #define for_each_eth_queue(bp, var) \ argument
1908 #define for_each_nondefault_eth_queue(bp, var) \ argument
1911 #define for_each_queue(bp, var) \ argument
1918 #define for_each_valid_rx_queue(bp, var) \ argument
1927 #define for_each_rx_queue_cnic(bp, var) \ argument
1934 #define for_each_rx_queue(bp, var) \ argument
1941 #define for_each_valid_tx_queue(bp, var) \ argument
1950 #define for_each_tx_queue_cnic(bp, var) \ argument
1957 #define for_each_tx_queue(bp, var) \ argument
1963 #define for_each_nondefault_queue(bp, var) \ argument
1975 #define skip_rx_queue(bp, idx) (NO_FCOE(bp) && IS_FCOE_IDX(idx)) argument
1980 #define skip_tx_queue(bp, idx) (NO_FCOE(bp) && IS_FCOE_IDX(idx)) argument
1982 #define skip_queue(bp, idx) (NO_FCOE(bp) && IS_FCOE_IDX(idx)) argument
2074 static inline u32 reg_poll(struct bnx2x *bp, u32 reg, u32 expected, int ms, in reg_poll()
2194 #define DMAE_LEN32_WR_MAX(bp) (CHIP_IS_E1(bp) ? 0x400 : 0x2000) argument
2201 #define INIT_DMAE_C(bp) (BP_PORT(bp) * MAX_DMAE_C_PER_PORT + \ argument
2203 #define PMF_DMAE_C(bp) (BP_PORT(bp) * MAX_DMAE_C_PER_PORT + \ argument
2221 #define BNX2X_NUM_TESTS(bp) (IS_MF(bp) ? BNX2X_NUM_TESTS_MF : \ argument
2236 #define HW_CID(bp, x) ((BP_PORT(bp) << 23) | \ argument
2279 #define IS_MF_STORAGE_ONLY(bp) (IS_MF_STORAGE_PERSONALITY_ONLY(bp) || \ argument
2407 #define MC_HASH_OFFSET(bp, i) (BAR_TSTRORM_INTMEM + \ argument
2441 #define BNX2X_MF_SD_PROTOCOL(bp) \ argument
2444 #define BNX2X_IS_MF_SD_PROTOCOL_ISCSI(bp) \ argument
2447 #define BNX2X_IS_MF_SD_PROTOCOL_FCOE(bp) \ argument
2450 #define IS_MF_ISCSI_SD(bp) (IS_MF_SD(bp) && BNX2X_IS_MF_SD_PROTOCOL_ISCSI(bp)) argument
2451 #define IS_MF_FCOE_SD(bp) (IS_MF_SD(bp) && BNX2X_IS_MF_SD_PROTOCOL_FCOE(bp)) argument
2452 #define IS_MF_ISCSI_SI(bp) (IS_MF_SI(bp) && BNX2X_IS_MF_EXT_PROTOCOL_ISCSI(bp)) argument
2454 #define IS_MF_ISCSI_ONLY(bp) (IS_MF_ISCSI_SD(bp) || IS_MF_ISCSI_SI(bp)) argument
2461 #define BNX2X_MF_EXT_PROT(bp) ((bp)->mf_ext_config & \ argument
2464 #define BNX2X_HAS_MF_EXT_PROTOCOL_FCOE(bp) \ argument
2467 #define BNX2X_IS_MF_EXT_PROTOCOL_FCOE(bp) \ argument
2470 #define BNX2X_IS_MF_EXT_PROTOCOL_ISCSI(bp) \ argument
2473 #define IS_MF_FCOE_AFEX(bp) \ argument
2476 #define IS_MF_SD_STORAGE_PERSONALITY_ONLY(bp) \ argument
2481 #define IS_MF_SI_STORAGE_PERSONALITY_ONLY(bp) \ argument
2486 #define IS_MF_STORAGE_PERSONALITY_ONLY(bp) \ argument
2493 #define IS_MF_PERCENT_BW(bp) (IS_MF_SI(bp) || IS_MF_UFP(bp) || IS_MF_BD(bp)) argument
2520 #define MCPR_SCRATCH_BASE(bp) \ argument