Lines Matching refs:reg

47 MLXSW_ITEM32(reg, sgcr, llb, 0x04, 0, 1);
70 MLXSW_ITEM_BUF(reg, spad, base_mac, 0x02, 6);
87 MLXSW_ITEM32(reg, smid, swid, 0x00, 24, 8);
94 MLXSW_ITEM32(reg, smid, mid, 0x00, 0, 16);
100 MLXSW_ITEM_BIT_ARRAY(reg, smid, port, 0x20, 0x20, 1);
106 MLXSW_ITEM_BIT_ARRAY(reg, smid, port_mask, 0x220, 0x20, 1);
137 MLXSW_ITEM32(reg, sspr, m, 0x00, 31, 1);
144 MLXSW_ITEM32(reg, sspr, local_port, 0x00, 16, 8);
152 MLXSW_ITEM32(reg, sspr, sub_port, 0x00, 8, 8);
162 MLXSW_ITEM32(reg, sspr, system_port, 0x04, 0, 16);
187 MLXSW_ITEM32(reg, sfdat, swid, 0x00, 24, 8);
196 MLXSW_ITEM32(reg, sfdat, age_time, 0x04, 0, 20);
225 MLXSW_ITEM32(reg, sfd, swid, 0x00, 24, 8);
259 MLXSW_ITEM32(reg, sfd, op, 0x04, 30, 2);
268 MLXSW_ITEM32(reg, sfd, record_locator, 0x04, 0, 30);
277 MLXSW_ITEM32(reg, sfd, num_rec, 0x08, 0, 8);
291 MLXSW_ITEM32_INDEXED(reg, sfd, rec_swid, MLXSW_REG_SFD_BASE_LEN, 24, 8,
305 MLXSW_ITEM32_INDEXED(reg, sfd, rec_type, MLXSW_REG_SFD_BASE_LEN, 20, 4,
323 MLXSW_ITEM32_INDEXED(reg, sfd, rec_policy, MLXSW_REG_SFD_BASE_LEN, 18, 2,
332 MLXSW_ITEM32_INDEXED(reg, sfd, rec_a, MLXSW_REG_SFD_BASE_LEN, 16, 1,
339 MLXSW_ITEM_BUF_INDEXED(reg, sfd, rec_mac, MLXSW_REG_SFD_BASE_LEN, 6,
359 MLXSW_ITEM32_INDEXED(reg, sfd, rec_action, MLXSW_REG_SFD_BASE_LEN, 28, 4,
368 MLXSW_ITEM32_INDEXED(reg, sfd, uc_sub_port, MLXSW_REG_SFD_BASE_LEN, 16, 8,
381 MLXSW_ITEM32_INDEXED(reg, sfd, uc_fid_vid, MLXSW_REG_SFD_BASE_LEN, 0, 16,
388 MLXSW_ITEM32_INDEXED(reg, sfd, uc_system_port, MLXSW_REG_SFD_BASE_LEN, 0, 16,
434 MLXSW_ITEM32_INDEXED(reg, sfd, uc_lag_sub_port, MLXSW_REG_SFD_BASE_LEN, 16, 8,
447 MLXSW_ITEM32_INDEXED(reg, sfd, uc_lag_fid_vid, MLXSW_REG_SFD_BASE_LEN, 0, 16,
454 MLXSW_ITEM32_INDEXED(reg, sfd, uc_lag_lag_vid, MLXSW_REG_SFD_BASE_LEN, 16, 12,
461 MLXSW_ITEM32_INDEXED(reg, sfd, uc_lag_lag_id, MLXSW_REG_SFD_BASE_LEN, 0, 10,
497 MLXSW_ITEM32_INDEXED(reg, sfd, mc_pgi, MLXSW_REG_SFD_BASE_LEN, 16, 13,
505 MLXSW_ITEM32_INDEXED(reg, sfd, mc_fid_vid, MLXSW_REG_SFD_BASE_LEN, 0, 16,
514 MLXSW_ITEM32_INDEXED(reg, sfd, mc_mid, MLXSW_REG_SFD_BASE_LEN, 0, 16,
535 MLXSW_ITEM32_INDEXED(reg, sfd, uc_tunnel_uip_msb, MLXSW_REG_SFD_BASE_LEN, 24,
542 MLXSW_ITEM32_INDEXED(reg, sfd, uc_tunnel_fid, MLXSW_REG_SFD_BASE_LEN, 0, 16,
554 MLXSW_ITEM32_INDEXED(reg, sfd, uc_tunnel_protocol, MLXSW_REG_SFD_BASE_LEN, 27,
564 MLXSW_ITEM32_INDEXED(reg, sfd, uc_tunnel_uip_lsb, MLXSW_REG_SFD_BASE_LEN, 0,
602 MLXSW_ITEM32(reg, sfn, swid, 0x00, 24, 8);
608 MLXSW_ITEM32(reg, sfn, end, 0x04, 20, 1);
618 MLXSW_ITEM32(reg, sfn, num_rec, 0x04, 0, 8);
632 MLXSW_ITEM32_INDEXED(reg, sfn, rec_swid, MLXSW_REG_SFN_BASE_LEN, 24, 8,
654 MLXSW_ITEM32_INDEXED(reg, sfn, rec_type, MLXSW_REG_SFN_BASE_LEN, 20, 4,
661 MLXSW_ITEM_BUF_INDEXED(reg, sfn, rec_mac, MLXSW_REG_SFN_BASE_LEN, 6,
669 MLXSW_ITEM32_INDEXED(reg, sfn, mac_sub_port, MLXSW_REG_SFN_BASE_LEN, 16, 8,
676 MLXSW_ITEM32_INDEXED(reg, sfn, mac_fid, MLXSW_REG_SFN_BASE_LEN, 0, 16,
683 MLXSW_ITEM32_INDEXED(reg, sfn, mac_system_port, MLXSW_REG_SFN_BASE_LEN, 0, 16,
699 MLXSW_ITEM32_INDEXED(reg, sfn, mac_lag_lag_id, MLXSW_REG_SFN_BASE_LEN, 0, 10,
717 MLXSW_ITEM32_INDEXED(reg, sfn, uc_tunnel_uip_msb, MLXSW_REG_SFN_BASE_LEN, 24,
729 MLXSW_ITEM32_INDEXED(reg, sfn, uc_tunnel_protocol, MLXSW_REG_SFN_BASE_LEN, 27,
738 MLXSW_ITEM32_INDEXED(reg, sfn, uc_tunnel_uip_lsb, MLXSW_REG_SFN_BASE_LEN, 0,
753 MLXSW_ITEM32_INDEXED(reg, sfn, tunnel_port, MLXSW_REG_SFN_BASE_LEN, 0, 4,
784 MLXSW_ITEM32(reg, spms, local_port, 0x00, 16, 8);
801 MLXSW_ITEM_BIT_ARRAY(reg, spms, state, 0x04, 0x400, 2);
828 MLXSW_ITEM32(reg, spvid, local_port, 0x00, 16, 8);
835 MLXSW_ITEM32(reg, spvid, sub_port, 0x00, 8, 8);
841 MLXSW_ITEM32(reg, spvid, pvid, 0x04, 0, 12);
871 MLXSW_ITEM32(reg, spvm, pt, 0x00, 31, 1);
878 MLXSW_ITEM32(reg, spvm, pte, 0x00, 30, 1);
884 MLXSW_ITEM32(reg, spvm, local_port, 0x00, 16, 8);
891 MLXSW_ITEM32(reg, spvm, sub_port, 0x00, 8, 8);
897 MLXSW_ITEM32(reg, spvm, num_rec, 0x00, 0, 8);
903 MLXSW_ITEM32_INDEXED(reg, spvm, rec_i,
911 MLXSW_ITEM32_INDEXED(reg, spvm, rec_e,
920 MLXSW_ITEM32_INDEXED(reg, spvm, rec_u,
928 MLXSW_ITEM32_INDEXED(reg, spvm, rec_vid,
967 MLXSW_ITEM32(reg, spaft, local_port, 0x00, 16, 8);
974 MLXSW_ITEM32(reg, spaft, sub_port, 0x00, 8, 8);
980 MLXSW_ITEM32(reg, spaft, allow_untagged, 0x04, 31, 1);
986 MLXSW_ITEM32(reg, spaft, allow_prio_tagged, 0x04, 30, 1);
992 MLXSW_ITEM32(reg, spaft, allow_tagged, 0x04, 29, 1);
1030 MLXSW_ITEM32(reg, sfgc, type, 0x00, 0, 4);
1042 MLXSW_ITEM32(reg, sfgc, bridge_type, 0x04, 24, 3);
1058 MLXSW_ITEM32(reg, sfgc, table_type, 0x04, 16, 3);
1065 MLXSW_ITEM32(reg, sfgc, flood_table, 0x04, 0, 6);
1071 MLXSW_ITEM32(reg, sfgc, mid, 0x08, 0, 16);
1077 MLXSW_ITEM32(reg, sfgc, counter_set_type, 0x0C, 24, 8);
1083 MLXSW_ITEM32(reg, sfgc, counter_index, 0x0C, 0, 24);
1113 MLXSW_ITEM32(reg, sftr, swid, 0x00, 24, 8);
1120 MLXSW_ITEM32(reg, sftr, flood_table, 0x00, 16, 6);
1127 MLXSW_ITEM32(reg, sftr, index, 0x00, 0, 16);
1133 MLXSW_ITEM32(reg, sftr, table_type, 0x04, 16, 3);
1139 MLXSW_ITEM32(reg, sftr, range, 0x04, 0, 16);
1145 MLXSW_ITEM_BIT_ARRAY(reg, sftr, port, 0x20, 0x20, 1);
1151 MLXSW_ITEM_BIT_ARRAY(reg, sftr, port_mask, 0x220, 0x20, 1);
1183 MLXSW_ITEM32(reg, sfdf, swid, 0x00, 24, 8);
1210 MLXSW_ITEM32(reg, sfdf, flush_type, 0x04, 28, 4);
1218 MLXSW_ITEM32(reg, sfdf, flush_static, 0x04, 24, 1);
1232 MLXSW_ITEM32(reg, sfdf, fid, 0x0C, 0, 16);
1238 MLXSW_ITEM32(reg, sfdf, system_port, 0x0C, 0, 16);
1244 MLXSW_ITEM32(reg, sfdf, port_fid_system_port, 0x08, 0, 16);
1250 MLXSW_ITEM32(reg, sfdf, lag_id, 0x0C, 0, 10);
1256 MLXSW_ITEM32(reg, sfdf, lag_fid_lag_id, 0x08, 0, 10);
1283 MLXSW_ITEM32(reg, sldr, op, 0x00, 29, 3);
1289 MLXSW_ITEM32(reg, sldr, lag_id, 0x00, 0, 10);
1311 MLXSW_ITEM32(reg, sldr, num_ports, 0x04, 24, 8);
1317 MLXSW_ITEM32_INDEXED(reg, sldr, system_port, 0x08, 0, 16, 4, 0, false);
1361 MLXSW_ITEM32(reg, slcr, pp, 0x00, 24, 1);
1370 MLXSW_ITEM32(reg, slcr, local_port, 0x00, 16, 8);
1382 MLXSW_ITEM32(reg, slcr, type, 0x00, 0, 4);
1442 MLXSW_ITEM32(reg, slcr, lag_hash, 0x04, 0, 20);
1448 MLXSW_ITEM32(reg, slcr, seed, 0x08, 0, 32);
1481 MLXSW_ITEM32(reg, slcor, col, 0x00, 30, 2);
1488 MLXSW_ITEM32(reg, slcor, local_port, 0x00, 16, 8);
1494 MLXSW_ITEM32(reg, slcor, lag_id, 0x00, 0, 10);
1501 MLXSW_ITEM32(reg, slcor, port_index, 0x04, 0, 10);
1556 MLXSW_ITEM32(reg, spmlr, local_port, 0x00, 16, 8);
1563 MLXSW_ITEM32(reg, spmlr, sub_port, 0x00, 8, 8);
1582 MLXSW_ITEM32(reg, spmlr, learn_mode, 0x04, 30, 2);
1607 MLXSW_ITEM32(reg, svfa, swid, 0x00, 24, 8);
1615 MLXSW_ITEM32(reg, svfa, local_port, 0x00, 16, 8);
1630 MLXSW_ITEM32(reg, svfa, mapping_table, 0x00, 8, 3);
1639 MLXSW_ITEM32(reg, svfa, v, 0x00, 0, 1);
1645 MLXSW_ITEM32(reg, svfa, fid, 0x04, 16, 16);
1651 MLXSW_ITEM32(reg, svfa, vid, 0x04, 0, 12);
1659 MLXSW_ITEM32(reg, svfa, counter_set_type, 0x08, 24, 8);
1667 MLXSW_ITEM32(reg, svfa, counter_index, 0x08, 0, 24);
1698 MLXSW_ITEM32(reg, svpe, local_port, 0x00, 16, 8);
1706 MLXSW_ITEM32(reg, svpe, vp_en, 0x00, 8, 1);
1736 MLXSW_ITEM32(reg, sfmr, op, 0x00, 24, 4);
1742 MLXSW_ITEM32(reg, sfmr, fid, 0x00, 0, 16);
1750 MLXSW_ITEM32(reg, sfmr, fid_offset, 0x08, 0, 16);
1759 MLXSW_ITEM32(reg, sfmr, vtfp, 0x0C, 31, 1);
1767 MLXSW_ITEM32(reg, sfmr, nve_tunnel_flood_ptr, 0x0C, 0, 24);
1776 MLXSW_ITEM32(reg, sfmr, vv, 0x10, 31, 1);
1784 MLXSW_ITEM32(reg, sfmr, vni, 0x10, 0, 24);
1818 MLXSW_ITEM32(reg, spvmlr, local_port, 0x00, 16, 8);
1824 MLXSW_ITEM32(reg, spvmlr, num_rec, 0x00, 0, 8);
1831 MLXSW_ITEM32_INDEXED(reg, spvmlr, rec_learn_enable, MLXSW_REG_SPVMLR_BASE_LEN,
1838 MLXSW_ITEM32_INDEXED(reg, spvmlr, rec_vid, MLXSW_REG_SPVMLR_BASE_LEN, 0, 12,
1876 MLXSW_ITEM32(reg, cwtp, local_port, 0, 16, 8);
1882 MLXSW_ITEM32(reg, cwtp, traffic_class, 32, 0, 8);
1888 MLXSW_ITEM32_INDEXED(reg, cwtp, profile_min, MLXSW_REG_CWTP_BASE_LEN,
1896 MLXSW_ITEM32_INDEXED(reg, cwtp, profile_percent, MLXSW_REG_CWTP_BASE_LEN,
1903 MLXSW_ITEM32_INDEXED(reg, cwtp, profile_max, MLXSW_REG_CWTP_BASE_LEN,
1954 MLXSW_ITEM32(reg, cwtpm, local_port, 0, 16, 8);
1960 MLXSW_ITEM32(reg, cwtpm, traffic_class, 32, 0, 8);
1968 MLXSW_ITEM32(reg, cwtpm, ew, 36, 1, 1);
1976 MLXSW_ITEM32(reg, cwtpm, ee, 36, 0, 1);
1984 MLXSW_ITEM32(reg, cwtpm, tcp_g, 52, 0, 2);
1992 MLXSW_ITEM32(reg, cwtpm, tcp_y, 56, 16, 2);
2000 MLXSW_ITEM32(reg, cwtpm, tcp_r, 56, 0, 2);
2008 MLXSW_ITEM32(reg, cwtpm, ntcp_g, 60, 0, 2);
2016 MLXSW_ITEM32(reg, cwtpm, ntcp_y, 64, 16, 2);
2024 MLXSW_ITEM32(reg, cwtpm, ntcp_r, 64, 0, 2);
2059 MLXSW_ITEM32(reg, pgcr, default_action_pointer_base, 0x1C, 0, 24);
2084 MLXSW_ITEM32(reg, ppbt, e, 0x00, 31, 1);
2094 MLXSW_ITEM32(reg, ppbt, op, 0x00, 28, 3);
2100 MLXSW_ITEM32(reg, ppbt, local_port, 0x00, 16, 8);
2108 MLXSW_ITEM32(reg, ppbt, g, 0x10, 31, 1);
2115 MLXSW_ITEM32(reg, ppbt, acl_info, 0x10, 0, 16);
2143 MLXSW_ITEM32(reg, pacl, v, 0x00, 24, 1);
2150 MLXSW_ITEM32(reg, pacl, acl_id, 0x08, 0, 16);
2159 MLXSW_ITEM_BUF(reg, pacl, tcam_region_info, 0x30,
2193 MLXSW_ITEM32(reg, pagt, size, 0x00, 0, 8);
2200 MLXSW_ITEM32(reg, pagt, acl_group_id, 0x08, 0, 16);
2208 MLXSW_ITEM32_INDEXED(reg, pagt, multi, 0x30, 31, 1, 0x04, 0x00, false);
2214 MLXSW_ITEM32_INDEXED(reg, pagt, acl_id, 0x30, 0, 16, 0x04, 0x00, false);
2261 MLXSW_ITEM32(reg, ptar, op, 0x00, 28, 4);
2268 MLXSW_ITEM32(reg, ptar, action_set_type, 0x00, 16, 8);
2279 MLXSW_ITEM32(reg, ptar, key_type, 0x00, 0, 8);
2289 MLXSW_ITEM32(reg, ptar, region_size, 0x04, 0, 16);
2296 MLXSW_ITEM32(reg, ptar, region_id, 0x08, 0, 16);
2304 MLXSW_ITEM_BUF(reg, ptar, tcam_region_info, 0x10,
2315 MLXSW_ITEM8_INDEXED(reg, ptar, flexible_key_id, 0x20, 0, 8,
2357 MLXSW_ITEM32(reg, ppbs, pbs_ptr, 0x08, 0, 24);
2363 MLXSW_ITEM32(reg, ppbs, system_port, 0x10, 0, 16);
2398 MLXSW_ITEM32(reg, prcr, op, 0x00, 28, 4);
2404 MLXSW_ITEM32(reg, prcr, offset, 0x00, 0, 16);
2410 MLXSW_ITEM32(reg, prcr, size, 0x04, 0, 16);
2416 MLXSW_ITEM_BUF(reg, prcr, tcam_region_info, 0x10,
2423 MLXSW_ITEM32(reg, prcr, dest_offset, 0x20, 0, 16);
2429 MLXSW_ITEM_BUF(reg, prcr, dest_tcam_region_info, 0x30,
2463 MLXSW_ITEM32(reg, pefa, index, 0x00, 0, 24);
2472 MLXSW_ITEM32(reg, pefa, a, 0x04, 29, 1);
2480 MLXSW_ITEM32(reg, pefa, ca, 0x04, 24, 1);
2489 MLXSW_ITEM_BUF(reg, pefa, flex_action_set, 0x08, MLXSW_REG_FLEX_ACTION_SET_LEN);
2526 MLXSW_ITEM32(reg, pemrbt, protocol, 0x00, 0, 1);
2533 MLXSW_ITEM32(reg, pemrbt, group_id, 0x10, 0, 16);
2560 MLXSW_ITEM32(reg, ptce2, v, 0x00, 31, 1);
2567 MLXSW_ITEM32(reg, ptce2, a, 0x00, 30, 1);
2590 MLXSW_ITEM32(reg, ptce2, op, 0x00, 20, 3);
2595 MLXSW_ITEM32(reg, ptce2, offset, 0x00, 0, 16);
2604 MLXSW_ITEM32(reg, ptce2, priority, 0x04, 0, 24);
2610 MLXSW_ITEM_BUF(reg, ptce2, tcam_region_info, 0x10,
2619 MLXSW_ITEM_BUF(reg, ptce2, flex_key_blocks, 0x20,
2628 MLXSW_ITEM_BUF(reg, ptce2, mask, 0x80,
2635 MLXSW_ITEM_BUF(reg, ptce2, flex_action_set, 0xE0,
2665 MLXSW_ITEM32(reg, perpt, erpt_bank, 0x00, 16, 4);
2672 MLXSW_ITEM32(reg, perpt, erpt_index, 0x00, 0, 8);
2684 MLXSW_ITEM32(reg, perpt, key_size, 0x04, 0, 4);
2693 MLXSW_ITEM32(reg, perpt, bf_bypass, 0x08, 8, 1);
2699 MLXSW_ITEM32(reg, perpt, erp_id, 0x08, 0, 4);
2706 MLXSW_ITEM32(reg, perpt, erpt_base_bank, 0x0C, 16, 4);
2713 MLXSW_ITEM32(reg, perpt, erpt_base_index, 0x0C, 0, 8);
2719 MLXSW_ITEM32(reg, perpt, erp_index_in_vector, 0x10, 0, 4);
2725 MLXSW_ITEM_BIT_ARRAY(reg, perpt, erp_vector, 0x14, 4, 1);
2733 MLXSW_ITEM_BUF(reg, perpt, mask, 0x20, MLXSW_REG_PTCEX_FLEX_KEY_BLOCKS_LEN);
2778 MLXSW_ITEM32(reg, perar, region_id, 0x00, 0, 16);
2794 MLXSW_ITEM32(reg, perar, hw_region, 0x04, 0, 16);
2818 MLXSW_ITEM32(reg, ptce3, v, 0x00, 31, 1);
2836 MLXSW_ITEM32(reg, ptce3, op, 0x00, 20, 3);
2844 MLXSW_ITEM32(reg, ptce3, priority, 0x04, 0, 24);
2850 MLXSW_ITEM_BUF(reg, ptce3, tcam_region_info, 0x10,
2858 MLXSW_ITEM_BUF(reg, ptce3, flex2_key_blocks, 0x20,
2865 MLXSW_ITEM32(reg, ptce3, erp_id, 0x80, 0, 4);
2872 MLXSW_ITEM32(reg, ptce3, delta_start, 0x84, 0, 10);
2883 MLXSW_ITEM32(reg, ptce3, delta_mask, 0x88, 16, 8);
2890 MLXSW_ITEM32(reg, ptce3, delta_value, 0x88, 0, 8);
2902 MLXSW_ITEM_BIT_ARRAY(reg, ptce3, prune_vector, 0x90, 4, 1);
2910 MLXSW_ITEM32(reg, ptce3, prune_ctcam, 0x94, 31, 1);
2923 MLXSW_ITEM32(reg, ptce3, large_exists, 0x98, 31, 1);
2933 MLXSW_ITEM32(reg, ptce3, large_entry_key_id, 0x98, 0, 24);
2940 MLXSW_ITEM32(reg, ptce3, action_pointer, 0xA0, 0, 24);
2981 MLXSW_ITEM32(reg, percr, region_id, 0x00, 0, 16);
2987 MLXSW_ITEM32(reg, percr, atcam_ignore_prune, 0x04, 25, 1);
2993 MLXSW_ITEM32(reg, percr, ctcam_ignore_prune, 0x04, 24, 1);
3002 MLXSW_ITEM32(reg, percr, bf_bypass, 0x04, 16, 1);
3010 MLXSW_ITEM_BUF(reg, percr, master_mask, 0x20, 96);
3036 MLXSW_ITEM32(reg, pererp, region_id, 0x00, 0, 16);
3042 MLXSW_ITEM32(reg, pererp, ctcam_le, 0x04, 28, 1);
3048 MLXSW_ITEM32(reg, pererp, erpt_pointer_valid, 0x10, 31, 1);
3055 MLXSW_ITEM32(reg, pererp, erpt_bank_pointer, 0x10, 16, 4);
3064 MLXSW_ITEM32(reg, pererp, erpt_pointer, 0x10, 0, 8);
3073 MLXSW_ITEM_BIT_ARRAY(reg, pererp, erpt_vector, 0x14, 4, 1);
3081 MLXSW_ITEM32(reg, pererp, master_rp_id, 0x18, 0, 4);
3126 MLXSW_ITEM32(reg, peabfe, size, 0x00, 0, 9);
3134 MLXSW_ITEM32_INDEXED(reg, peabfe, bf_entry_state,
3143 MLXSW_ITEM32_INDEXED(reg, peabfe, bf_entry_bank,
3152 MLXSW_ITEM32_INDEXED(reg, peabfe, bf_entry_index,
3193 MLXSW_ITEM32(reg, iedr, num_rec, 0x00, 0, 8);
3199 MLXSW_ITEM32_INDEXED(reg, iedr, rec_type, MLXSW_REG_IEDR_BASE_LEN, 24, 8,
3206 MLXSW_ITEM32_INDEXED(reg, iedr, rec_size, MLXSW_REG_IEDR_BASE_LEN, 0, 13,
3213 MLXSW_ITEM32_INDEXED(reg, iedr, rec_index_start, MLXSW_REG_IEDR_BASE_LEN, 0, 24,
3250 MLXSW_ITEM32(reg, qpts, local_port, 0x00, 16, 8);
3261 MLXSW_ITEM32(reg, qpts, trust_state, 0x04, 0, 3);
3291 MLXSW_ITEM32(reg, qpcr, g, 0x00, 14, 2);
3297 MLXSW_ITEM32(reg, qpcr, pid, 0x00, 0, 14);
3303 MLXSW_ITEM32(reg, qpcr, clear_counter, 0x04, 31, 1);
3310 MLXSW_ITEM32(reg, qpcr, color_aware, 0x04, 15, 1);
3318 MLXSW_ITEM32(reg, qpcr, bytes, 0x04, 14, 1);
3331 MLXSW_ITEM32(reg, qpcr, ir_units, 0x04, 12, 1);
3344 MLXSW_ITEM32(reg, qpcr, rate_type, 0x04, 8, 2);
3357 MLXSW_ITEM32(reg, qpcr, cbs, 0x08, 24, 6);
3366 MLXSW_ITEM32(reg, qpcr, cir, 0x0C, 0, 32);
3376 MLXSW_ITEM32(reg, qpcr, eir, 0x10, 0, 32);
3384 MLXSW_ITEM32(reg, qpcr, exceed_action, 0x14, 0, 4);
3400 MLXSW_ITEM32(reg, qpcr, violate_action, 0x18, 0, 4);
3406 MLXSW_ITEM64(reg, qpcr, violate_count, 0x20, 0, 64);
3454 MLXSW_ITEM32(reg, qtct, local_port, 0x00, 16, 8);
3461 MLXSW_ITEM32(reg, qtct, sub_port, 0x00, 8, 8);
3467 MLXSW_ITEM32(reg, qtct, switch_prio, 0x00, 0, 4);
3477 MLXSW_ITEM32(reg, qtct, tclass, 0x04, 0, 4);
3503 MLXSW_ITEM32(reg, qeec, local_port, 0x00, 16, 8);
3519 MLXSW_ITEM32(reg, qeec, element_hierarchy, 0x04, 16, 4);
3525 MLXSW_ITEM32(reg, qeec, element_index, 0x04, 0, 8);
3533 MLXSW_ITEM32(reg, qeec, next_element_index, 0x08, 0, 8);
3542 MLXSW_ITEM32(reg, qeec, mise, 0x0C, 31, 1);
3554 MLXSW_ITEM32(reg, qeec, ptps, 0x0C, 29, 1);
3570 MLXSW_ITEM32(reg, qeec, pb, 0x0C, 28, 1);
3581 MLXSW_ITEM32(reg, qeec, min_shaper_rate, 0x0C, 0, 28);
3590 MLXSW_ITEM32(reg, qeec, mase, 0x10, 31, 1);
3601 MLXSW_ITEM32(reg, qeec, max_shaper_rate, 0x10, 0, 31);
3610 MLXSW_ITEM32(reg, qeec, de, 0x18, 31, 1);
3619 MLXSW_ITEM32(reg, qeec, dwrr, 0x18, 15, 1);
3629 MLXSW_ITEM32(reg, qeec, dwrr_weight, 0x18, 0, 8);
3639 MLXSW_ITEM32(reg, qeec, max_shaper_bs, 0x1C, 0, 6);
3681 MLXSW_ITEM32(reg, qrwe, local_port, 0x00, 16, 8);
3687 MLXSW_ITEM32(reg, qrwe, dscp, 0x04, 1, 1);
3693 MLXSW_ITEM32(reg, qrwe, pcp, 0x04, 0, 1);
3722 MLXSW_ITEM32(reg, qpdsm, local_port, 0x00, 16, 8);
3728 MLXSW_ITEM32_INDEXED(reg, qpdsm, prio_entry_color0_e,
3737 MLXSW_ITEM32_INDEXED(reg, qpdsm, prio_entry_color0_dscp,
3745 MLXSW_ITEM32_INDEXED(reg, qpdsm, prio_entry_color1_e,
3754 MLXSW_ITEM32_INDEXED(reg, qpdsm, prio_entry_color1_dscp,
3762 MLXSW_ITEM32_INDEXED(reg, qpdsm, prio_entry_color2_e,
3771 MLXSW_ITEM32_INDEXED(reg, qpdsm, prio_entry_color2_dscp,
3808 MLXSW_ITEM32(reg, qpdp, local_port, 0x00, 16, 8);
3814 MLXSW_ITEM32(reg, qpdp, switch_prio, 0x04, 0, 4);
3843 MLXSW_ITEM32(reg, qpdpm, local_port, 0x00, 16, 8);
3851 MLXSW_ITEM16_INDEXED(reg, qpdpm, dscp_entry_e, MLXSW_REG_QPDPM_BASE_LEN, 15, 1,
3858 MLXSW_ITEM16_INDEXED(reg, qpdpm, dscp_entry_prio,
3894 MLXSW_ITEM32(reg, qtctm, local_port, 0x00, 16, 8);
3901 MLXSW_ITEM32(reg, qtctm, mc, 0x04, 0, 1);
3932 MLXSW_ITEM32(reg, qpsc, port_speed, 0x00, 0, 4);
3940 MLXSW_ITEM32(reg, qpsc, shaper_time_exp, 0x04, 16, 4);
3948 MLXSW_ITEM32(reg, qpsc, shaper_time_mantissa, 0x04, 0, 5);
3955 MLXSW_ITEM32(reg, qpsc, shaper_inc, 0x08, 0, 5);
3963 MLXSW_ITEM32(reg, qpsc, shaper_bs, 0x0C, 0, 6);
3969 MLXSW_ITEM32(reg, qpsc, ptsc_we, 0x10, 31, 1);
3977 MLXSW_ITEM32(reg, qpsc, port_to_shaper_credits, 0x10, 0, 8);
3987 MLXSW_ITEM32(reg, qpsc, ing_timestamp_inc, 0x20, 0, 32);
3997 MLXSW_ITEM32(reg, qpsc, egr_timestamp_inc, 0x24, 0, 32);
4031 MLXSW_ITEM32(reg, pmlp, rxtx, 0x00, 31, 1);
4037 MLXSW_ITEM32(reg, pmlp, local_port, 0x00, 16, 8);
4047 MLXSW_ITEM32(reg, pmlp, width, 0x00, 0, 8);
4053 MLXSW_ITEM32_INDEXED(reg, pmlp, module, 0x04, 0, 8, 0x04, 0x00, false);
4059 MLXSW_ITEM32_INDEXED(reg, pmlp, tx_lane, 0x04, 16, 4, 0x04, 0x00, false);
4066 MLXSW_ITEM32_INDEXED(reg, pmlp, rx_lane, 0x04, 24, 4, 0x04, 0x00, false);
4087 MLXSW_ITEM32(reg, pmtu, local_port, 0x00, 16, 8);
4096 MLXSW_ITEM32(reg, pmtu, max_mtu, 0x04, 16, 16);
4104 MLXSW_ITEM32(reg, pmtu, admin_mtu, 0x08, 16, 16);
4113 MLXSW_ITEM32(reg, pmtu, oper_mtu, 0x0C, 16, 16);
4143 MLXSW_ITEM32(reg, ptys, an_disable_admin, 0x00, 30, 1);
4149 MLXSW_ITEM32(reg, ptys, local_port, 0x00, 16, 8);
4161 MLXSW_ITEM32(reg, ptys, proto_mask, 0x00, 0, 3);
4173 MLXSW_ITEM32(reg, ptys, an_status, 0x04, 28, 4);
4192 MLXSW_ITEM32(reg, ptys, ext_eth_proto_cap, 0x08, 0, 32);
4222 MLXSW_ITEM32(reg, ptys, eth_proto_cap, 0x0C, 0, 32);
4228 MLXSW_ITEM32(reg, ptys, ib_link_width_cap, 0x10, 16, 16);
4241 MLXSW_ITEM32(reg, ptys, ib_proto_cap, 0x10, 0, 16);
4247 MLXSW_ITEM32(reg, ptys, ext_eth_proto_admin, 0x14, 0, 32);
4253 MLXSW_ITEM32(reg, ptys, eth_proto_admin, 0x18, 0, 32);
4259 MLXSW_ITEM32(reg, ptys, ib_link_width_admin, 0x1C, 16, 16);
4265 MLXSW_ITEM32(reg, ptys, ib_proto_admin, 0x1C, 0, 16);
4271 MLXSW_ITEM32(reg, ptys, ext_eth_proto_oper, 0x20, 0, 32);
4277 MLXSW_ITEM32(reg, ptys, eth_proto_oper, 0x24, 0, 32);
4283 MLXSW_ITEM32(reg, ptys, ib_link_width_oper, 0x28, 16, 16);
4289 MLXSW_ITEM32(reg, ptys, ib_proto_oper, 0x28, 0, 16);
4307 MLXSW_ITEM32(reg, ptys, connector_type, 0x2C, 0, 4);
4403 MLXSW_ITEM32(reg, ppad, single_base_mac, 0x00, 28, 1);
4409 MLXSW_ITEM32(reg, ppad, local_port, 0x00, 16, 8);
4416 MLXSW_ITEM_BUF(reg, ppad, mac, 0x02, 6);
4442 MLXSW_ITEM32(reg, paos, swid, 0x00, 24, 8);
4448 MLXSW_ITEM32(reg, paos, local_port, 0x00, 16, 8);
4459 MLXSW_ITEM32(reg, paos, admin_status, 0x00, 8, 4);
4469 MLXSW_ITEM32(reg, paos, oper_status, 0x00, 0, 4);
4475 MLXSW_ITEM32(reg, paos, ase, 0x04, 31, 1);
4482 MLXSW_ITEM32(reg, paos, ee, 0x04, 30, 1);
4491 MLXSW_ITEM32(reg, paos, e, 0x04, 0, 2);
4519 MLXSW_ITEM32(reg, pfcc, local_port, 0x00, 16, 8);
4527 MLXSW_ITEM32(reg, pfcc, pnat, 0x00, 14, 2);
4536 MLXSW_ITEM32(reg, pfcc, shl_cap, 0x00, 1, 1);
4545 MLXSW_ITEM32(reg, pfcc, shl_opr, 0x00, 0, 1);
4557 MLXSW_ITEM32(reg, pfcc, ppan, 0x04, 28, 4);
4564 MLXSW_ITEM32(reg, pfcc, prio_mask_tx, 0x04, 16, 8);
4571 MLXSW_ITEM32(reg, pfcc, prio_mask_rx, 0x04, 0, 8);
4579 MLXSW_ITEM32(reg, pfcc, pptx, 0x08, 31, 1);
4587 MLXSW_ITEM32(reg, pfcc, aptx, 0x08, 30, 1);
4599 MLXSW_ITEM32(reg, pfcc, pfctx, 0x08, 16, 8);
4607 MLXSW_ITEM32(reg, pfcc, pprx, 0x0C, 31, 1);
4615 MLXSW_ITEM32(reg, pfcc, aprx, 0x0C, 30, 1);
4624 MLXSW_ITEM32(reg, pfcc, pfcrx, 0x0C, 16, 8);
4661 MLXSW_ITEM32(reg, ppcnt, swid, 0x00, 24, 8);
4669 MLXSW_ITEM32(reg, ppcnt, local_port, 0x00, 16, 8);
4677 MLXSW_ITEM32(reg, ppcnt, pnat, 0x00, 14, 2);
4708 MLXSW_ITEM32(reg, ppcnt, grp, 0x00, 0, 6);
4716 MLXSW_ITEM32(reg, ppcnt, clr, 0x04, 31, 1);
4726 MLXSW_ITEM32(reg, ppcnt, prio_tc, 0x04, 0, 5);
4733 MLXSW_ITEM64(reg, ppcnt, a_frames_transmitted_ok,
4739 MLXSW_ITEM64(reg, ppcnt, a_frames_received_ok,
4745 MLXSW_ITEM64(reg, ppcnt, a_frame_check_sequence_errors,
4751 MLXSW_ITEM64(reg, ppcnt, a_alignment_errors,
4757 MLXSW_ITEM64(reg, ppcnt, a_octets_transmitted_ok,
4763 MLXSW_ITEM64(reg, ppcnt, a_octets_received_ok,
4769 MLXSW_ITEM64(reg, ppcnt, a_multicast_frames_xmitted_ok,
4775 MLXSW_ITEM64(reg, ppcnt, a_broadcast_frames_xmitted_ok,
4781 MLXSW_ITEM64(reg, ppcnt, a_multicast_frames_received_ok,
4787 MLXSW_ITEM64(reg, ppcnt, a_broadcast_frames_received_ok,
4793 MLXSW_ITEM64(reg, ppcnt, a_in_range_length_errors,
4799 MLXSW_ITEM64(reg, ppcnt, a_out_of_range_length_field,
4805 MLXSW_ITEM64(reg, ppcnt, a_frame_too_long_errors,
4811 MLXSW_ITEM64(reg, ppcnt, a_symbol_error_during_carrier,
4817 MLXSW_ITEM64(reg, ppcnt, a_mac_control_frames_transmitted,
4823 MLXSW_ITEM64(reg, ppcnt, a_mac_control_frames_received,
4829 MLXSW_ITEM64(reg, ppcnt, a_unsupported_opcodes_received,
4835 MLXSW_ITEM64(reg, ppcnt, a_pause_mac_ctrl_frames_received,
4841 MLXSW_ITEM64(reg, ppcnt, a_pause_mac_ctrl_frames_transmitted,
4849 MLXSW_ITEM64(reg, ppcnt, if_in_discards,
4855 MLXSW_ITEM64(reg, ppcnt, if_out_discards,
4861 MLXSW_ITEM64(reg, ppcnt, if_out_errors,
4869 MLXSW_ITEM64(reg, ppcnt, ether_stats_undersize_pkts,
4875 MLXSW_ITEM64(reg, ppcnt, ether_stats_oversize_pkts,
4881 MLXSW_ITEM64(reg, ppcnt, ether_stats_fragments,
4887 MLXSW_ITEM64(reg, ppcnt, ether_stats_pkts64octets,
4893 MLXSW_ITEM64(reg, ppcnt, ether_stats_pkts65to127octets,
4899 MLXSW_ITEM64(reg, ppcnt, ether_stats_pkts128to255octets,
4905 MLXSW_ITEM64(reg, ppcnt, ether_stats_pkts256to511octets,
4911 MLXSW_ITEM64(reg, ppcnt, ether_stats_pkts512to1023octets,
4917 MLXSW_ITEM64(reg, ppcnt, ether_stats_pkts1024to1518octets,
4923 MLXSW_ITEM64(reg, ppcnt, ether_stats_pkts1519to2047octets,
4929 MLXSW_ITEM64(reg, ppcnt, ether_stats_pkts2048to4095octets,
4935 MLXSW_ITEM64(reg, ppcnt, ether_stats_pkts4096to8191octets,
4941 MLXSW_ITEM64(reg, ppcnt, ether_stats_pkts8192to10239octets,
4949 MLXSW_ITEM64(reg, ppcnt, dot3stats_fcs_errors,
4955 MLXSW_ITEM64(reg, ppcnt, dot3stats_symbol_errors,
4961 MLXSW_ITEM64(reg, ppcnt, dot3control_in_unknown_opcodes,
4967 MLXSW_ITEM64(reg, ppcnt, dot3in_pause_frames,
4975 MLXSW_ITEM64(reg, ppcnt, ecn_marked,
4983 MLXSW_ITEM64(reg, ppcnt, ingress_general,
4989 MLXSW_ITEM64(reg, ppcnt, ingress_policy_engine,
4995 MLXSW_ITEM64(reg, ppcnt, ingress_vlan_membership,
5001 MLXSW_ITEM64(reg, ppcnt, ingress_tag_frame_type,
5007 MLXSW_ITEM64(reg, ppcnt, egress_vlan_membership,
5013 MLXSW_ITEM64(reg, ppcnt, loopback_filter,
5019 MLXSW_ITEM64(reg, ppcnt, egress_general,
5025 MLXSW_ITEM64(reg, ppcnt, egress_hoq,
5031 MLXSW_ITEM64(reg, ppcnt, egress_policy_engine,
5037 MLXSW_ITEM64(reg, ppcnt, ingress_tx_link_down,
5043 MLXSW_ITEM64(reg, ppcnt, egress_stp_filter,
5049 MLXSW_ITEM64(reg, ppcnt, egress_sll,
5057 MLXSW_ITEM64(reg, ppcnt, rx_octets,
5063 MLXSW_ITEM64(reg, ppcnt, rx_frames,
5069 MLXSW_ITEM64(reg, ppcnt, tx_octets,
5075 MLXSW_ITEM64(reg, ppcnt, tx_frames,
5081 MLXSW_ITEM64(reg, ppcnt, rx_pause,
5087 MLXSW_ITEM64(reg, ppcnt, rx_pause_duration,
5093 MLXSW_ITEM64(reg, ppcnt, tx_pause,
5099 MLXSW_ITEM64(reg, ppcnt, tx_pause_duration,
5105 MLXSW_ITEM64(reg, ppcnt, tx_pause_transition,
5116 MLXSW_ITEM64(reg, ppcnt, tc_transmit_queue,
5124 MLXSW_ITEM64(reg, ppcnt, tc_no_buffer_discard_uc,
5132 MLXSW_ITEM64(reg, ppcnt, wred_discard,
5161 MLXSW_ITEM32(reg, plib, local_port, 0x00, 16, 8);
5167 MLXSW_ITEM32(reg, plib, ib_port, 0x00, 0, 8);
5193 MLXSW_ITEM32(reg, pptb, mm, 0x00, 28, 2);
5199 MLXSW_ITEM32(reg, pptb, local_port, 0x00, 16, 8);
5205 MLXSW_ITEM32(reg, pptb, um, 0x00, 8, 1);
5212 MLXSW_ITEM32(reg, pptb, pm, 0x00, 0, 8);
5219 MLXSW_ITEM_BIT_ARRAY(reg, pptb, prio_to_buff, 0x04, 0x04, 4);
5226 MLXSW_ITEM32(reg, pptb, pm_msb, 0x08, 24, 8);
5235 MLXSW_ITEM32(reg, pptb, untagged_buff, 0x08, 0, 4);
5242 MLXSW_ITEM_BIT_ARRAY(reg, pptb, prio_to_buff_msb, 0x0C, 0x04, 4);
5276 MLXSW_ITEM32(reg, pbmc, local_port, 0x00, 16, 8);
5283 MLXSW_ITEM32(reg, pbmc, xoff_timer_value, 0x04, 16, 16);
5291 MLXSW_ITEM32(reg, pbmc, xoff_refresh, 0x04, 0, 16);
5301 MLXSW_ITEM32_INDEXED(reg, pbmc, buf_lossy, 0x0C, 25, 1, 0x08, 0x00, false);
5310 MLXSW_ITEM32_INDEXED(reg, pbmc, buf_epsb, 0x0C, 24, 1, 0x08, 0x00, false);
5317 MLXSW_ITEM32_INDEXED(reg, pbmc, buf_size, 0x0C, 0, 16, 0x08, 0x00, false);
5328 MLXSW_ITEM32_INDEXED(reg, pbmc, buf_xoff_threshold, 0x0C, 16, 16,
5340 MLXSW_ITEM32_INDEXED(reg, pbmc, buf_xon_threshold, 0x0C, 0, 16,
5386 MLXSW_ITEM32(reg, pspa, swid, 0x00, 24, 8);
5392 MLXSW_ITEM32(reg, pspa, local_port, 0x00, 16, 8);
5399 MLXSW_ITEM32(reg, pspa, sub_port, 0x00, 8, 8);
5422 MLXSW_ITEM32(reg, pmaos, slot_index, 0x00, 24, 4);
5428 MLXSW_ITEM32(reg, pmaos, module, 0x00, 16, 8);
5436 MLXSW_ITEM32(reg, pmaos, ase, 0x04, 31, 1);
5444 MLXSW_ITEM32(reg, pmaos, ee, 0x04, 30, 1);
5456 MLXSW_ITEM32(reg, pmaos, e, 0x04, 0, 2);
5480 MLXSW_ITEM32(reg, pplr, local_port, 0x00, 16, 8);
5491 MLXSW_ITEM32(reg, pplr, lb_en, 0x04, 0, 8);
5520 MLXSW_ITEM32(reg, pmpe, slot_index, 0x00, 24, 4);
5526 MLXSW_ITEM32(reg, pmpe, module, 0x00, 16, 8);
5539 MLXSW_ITEM32(reg, pmpe, module_status, 0x00, 0, 4);
5545 MLXSW_ITEM32(reg, pmpe, error_type, 0x04, 8, 4);
5560 MLXSW_ITEM32(reg, pddr, local_port, 0x00, 16, 8);
5570 MLXSW_ITEM32(reg, pddr, page_select, 0x04, 0, 8);
5581 MLXSW_ITEM32(reg, pddr, trblsh_group_opcode, 0x08, 0, 16);
5587 MLXSW_ITEM32(reg, pddr, trblsh_status_opcode, 0x0C, 0, 16);
5610 MLXSW_ITEM32(reg, pmtm, module, 0x00, 16, 8);
5645 MLXSW_ITEM32(reg, pmtm, module_type, 0x04, 0, 4);
5673 MLXSW_ITEM32(reg, htgt, swid, 0x00, 24, 8);
5681 MLXSW_ITEM32(reg, htgt, type, 0x00, 8, 4);
5729 MLXSW_ITEM32(reg, htgt, trap_group, 0x00, 0, 8);
5740 MLXSW_ITEM32(reg, htgt, pide, 0x04, 15, 1);
5748 MLXSW_ITEM32(reg, htgt, pid, 0x04, 0, 8);
5761 MLXSW_ITEM32(reg, htgt, mirror_action, 0x08, 8, 2);
5767 MLXSW_ITEM32(reg, htgt, mirroring_agent, 0x08, 0, 3);
5782 MLXSW_ITEM32(reg, htgt, priority, 0x0C, 0, 4);
5790 MLXSW_ITEM32(reg, htgt, local_path_cpu_tclass, 0x10, 16, 6);
5802 MLXSW_ITEM32(reg, htgt, local_path_rdq, 0x10, 0, 6);
5849 MLXSW_ITEM32(reg, hpkt, ack, 0x00, 24, 1);
5877 MLXSW_ITEM32(reg, hpkt, action, 0x00, 20, 3);
5883 MLXSW_ITEM32(reg, hpkt, trap_group, 0x00, 12, 6);
5892 MLXSW_ITEM32(reg, hpkt, trap_id, 0x00, 0, 10);
5908 MLXSW_ITEM32(reg, hpkt, ctrl, 0x04, 16, 2);
5937 MLXSW_ITEM32(reg, rgcr, ipv4_en, 0x00, 31, 1);
5943 MLXSW_ITEM32(reg, rgcr, ipv6_en, 0x00, 30, 1);
5950 MLXSW_ITEM32(reg, rgcr, max_router_interfaces, 0x10, 0, 16);
5960 MLXSW_ITEM32(reg, rgcr, usp, 0x18, 20, 1);
5971 MLXSW_ITEM32(reg, rgcr, pcp_rw, 0x18, 16, 2);
5987 MLXSW_ITEM32(reg, rgcr, activity_dis, 0x20, 0, 8);
6010 MLXSW_ITEM32(reg, ritr, enable, 0x00, 31, 1);
6017 MLXSW_ITEM32(reg, ritr, ipv4, 0x00, 29, 1);
6024 MLXSW_ITEM32(reg, ritr, ipv6, 0x00, 28, 1);
6030 MLXSW_ITEM32(reg, ritr, ipv4_mc, 0x00, 27, 1);
6036 MLXSW_ITEM32(reg, ritr, ipv6_mc, 0x00, 26, 1);
6053 MLXSW_ITEM32(reg, ritr, type, 0x00, 23, 3);
6069 MLXSW_ITEM32(reg, ritr, op, 0x00, 20, 2);
6075 MLXSW_ITEM32(reg, ritr, rif, 0x00, 0, 16);
6084 MLXSW_ITEM32(reg, ritr, ipv4_fe, 0x04, 29, 1);
6093 MLXSW_ITEM32(reg, ritr, ipv6_fe, 0x04, 28, 1);
6101 MLXSW_ITEM32(reg, ritr, ipv4_mc_fe, 0x04, 27, 1);
6109 MLXSW_ITEM32(reg, ritr, ipv6_mc_fe, 0x04, 26, 1);
6118 MLXSW_ITEM32(reg, ritr, lb_en, 0x04, 24, 1);
6124 MLXSW_ITEM32(reg, ritr, virtual_router, 0x04, 0, 16);
6130 MLXSW_ITEM32(reg, ritr, mtu, 0x34, 0, 16);
6136 MLXSW_ITEM32(reg, ritr, if_swid, 0x08, 24, 8);
6143 MLXSW_ITEM_BUF(reg, ritr, if_mac, 0x12, 6);
6150 MLXSW_ITEM32(reg, ritr, if_vrrp_id_ipv6, 0x1C, 8, 8);
6157 MLXSW_ITEM32(reg, ritr, if_vrrp_id_ipv4, 0x1C, 0, 8);
6165 MLXSW_ITEM32(reg, ritr, vlan_if_vid, 0x08, 0, 12);
6174 MLXSW_ITEM32(reg, ritr, fid_if_fid, 0x08, 0, 16);
6193 MLXSW_ITEM32(reg, ritr, sp_if_lag, 0x08, 24, 1);
6200 MLXSW_ITEM32(reg, ritr, sp_if_system_port, 0x08, 0, 16);
6206 MLXSW_ITEM32(reg, ritr, sp_if_vid, 0x18, 0, 12);
6222 MLXSW_ITEM32(reg, ritr, loopback_protocol, 0x08, 28, 4);
6237 MLXSW_ITEM32(reg, ritr, loopback_ipip_type, 0x10, 24, 4);
6247 MLXSW_ITEM32(reg, ritr, loopback_ipip_options, 0x10, 20, 4);
6255 MLXSW_ITEM32(reg, ritr, loopback_ipip_uvr, 0x10, 0, 16);
6262 MLXSW_ITEM32(reg, ritr, loopback_ipip_underlay_rif, 0x14, 0, 16);
6268 MLXSW_ITEM_BUF(reg, ritr, loopback_ipip_usip6, 0x18, 16);
6269 MLXSW_ITEM32(reg, ritr, loopback_ipip_usip4, 0x24, 0, 32);
6276 MLXSW_ITEM32(reg, ritr, loopback_ipip_gre_key, 0x28, 0, 32);
6295 MLXSW_ITEM32(reg, ritr, ingress_counter_index, 0x38, 0, 24);
6301 MLXSW_ITEM32(reg, ritr, ingress_counter_set_type, 0x38, 24, 8);
6307 MLXSW_ITEM32(reg, ritr, egress_counter_index, 0x3C, 0, 24);
6313 MLXSW_ITEM32(reg, ritr, egress_counter_set_type, 0x3C, 24, 8);
6419 MLXSW_ITEM32(reg, rtar, op, 0x00, 28, 4);
6430 MLXSW_ITEM32(reg, rtar, key_type, 0x00, 0, 8);
6439 MLXSW_ITEM32(reg, rtar, region_size, 0x04, 0, 16);
6484 MLXSW_ITEM32(reg, ratr, op, 0x00, 28, 4);
6498 MLXSW_ITEM32(reg, ratr, v, 0x00, 24, 1);
6505 MLXSW_ITEM32(reg, ratr, a, 0x00, 16, 1);
6537 MLXSW_ITEM32(reg, ratr, type, 0x04, 28, 4);
6546 MLXSW_ITEM32(reg, ratr, adjacency_index_low, 0x04, 0, 16);
6552 MLXSW_ITEM32(reg, ratr, egress_router_interface, 0x08, 0, 16);
6566 MLXSW_ITEM32(reg, ratr, trap_action, 0x0C, 28, 4);
6572 MLXSW_ITEM32(reg, ratr, adjacency_index_high, 0x0C, 16, 8);
6585 MLXSW_ITEM32(reg, ratr, trap_id, 0x0C, 0, 8);
6591 MLXSW_ITEM_BUF(reg, ratr, eth_destination_mac, 0x12, 6);
6605 MLXSW_ITEM32(reg, ratr, ipip_type, 0x10, 16, 4);
6612 MLXSW_ITEM32(reg, ratr, ipip_ipv4_udip, 0x18, 0, 32);
6619 MLXSW_ITEM32(reg, ratr, ipip_ipv6_ptr, 0x1C, 0, 24);
6634 MLXSW_ITEM32(reg, ratr, counter_set_type, 0x28, 24, 8);
6640 MLXSW_ITEM32(reg, ratr, counter_index, 0x28, 0, 24);
6702 MLXSW_ITEM8_INDEXED(reg, rdpm, dscp_entry_e, MLXSW_REG_RDPM_LAST_ENTRY, 7, 1,
6709 MLXSW_ITEM8_INDEXED(reg, rdpm, dscp_entry_prio, MLXSW_REG_RDPM_LAST_ENTRY, 0, 4,
6732 MLXSW_ITEM32(reg, ricnt, counter_index, 0x04, 0, 24);
6750 MLXSW_ITEM32(reg, ricnt, counter_set_type, 0x04, 24, 8);
6765 MLXSW_ITEM32(reg, ricnt, op, 0x00, 28, 4);
6771 MLXSW_ITEM64(reg, ricnt, good_unicast_packets, 0x08, 0, 64);
6777 MLXSW_ITEM64(reg, ricnt, good_multicast_packets, 0x10, 0, 64);
6783 MLXSW_ITEM64(reg, ricnt, good_broadcast_packets, 0x18, 0, 64);
6790 MLXSW_ITEM64(reg, ricnt, good_unicast_bytes, 0x20, 0, 64);
6797 MLXSW_ITEM64(reg, ricnt, good_multicast_bytes, 0x28, 0, 64);
6804 MLXSW_ITEM64(reg, ricnt, good_broadcast_bytes, 0x30, 0, 64);
6810 MLXSW_ITEM64(reg, ricnt, error_packets, 0x38, 0, 64);
6816 MLXSW_ITEM64(reg, ricnt, discard_packets, 0x40, 0, 64);
6823 MLXSW_ITEM64(reg, ricnt, error_bytes, 0x48, 0, 64);
6830 MLXSW_ITEM64(reg, ricnt, discard_bytes, 0x50, 0, 64);
6861 MLXSW_ITEM32(reg, rrcr, op, 0x00, 28, 4);
6867 MLXSW_ITEM32(reg, rrcr, offset, 0x00, 0, 16);
6873 MLXSW_ITEM32(reg, rrcr, size, 0x04, 0, 16);
6880 MLXSW_ITEM32(reg, rrcr, table_id, 0x10, 0, 4);
6886 MLXSW_ITEM32(reg, rrcr, dest_offset, 0x20, 0, 16);
6916 MLXSW_ITEM32(reg, ralta, op, 0x00, 28, 2);
6928 MLXSW_ITEM32(reg, ralta, protocol, 0x00, 24, 4);
6936 MLXSW_ITEM32(reg, ralta, tree_id, 0x00, 0, 8);
6968 MLXSW_ITEM32(reg, ralst, root_bin, 0x00, 16, 8);
6974 MLXSW_ITEM32(reg, ralst, tree_id, 0x00, 0, 8);
6986 MLXSW_ITEM16_INDEXED(reg, ralst, left_child_bin, 0x04, 8, 8, 0x02, 0x00, false);
6994 MLXSW_ITEM16_INDEXED(reg, ralst, right_child_bin, 0x04, 0, 8, 0x02, 0x00,
7034 MLXSW_ITEM32(reg, raltb, virtual_router, 0x00, 16, 16);
7040 MLXSW_ITEM32(reg, raltb, protocol, 0x00, 12, 4);
7048 MLXSW_ITEM32(reg, raltb, tree_id, 0x00, 0, 8);
7074 MLXSW_ITEM32(reg, ralue, protocol, 0x00, 24, 4);
7107 MLXSW_ITEM32(reg, ralue, op, 0x00, 20, 3);
7116 MLXSW_ITEM32(reg, ralue, a, 0x00, 16, 1);
7123 MLXSW_ITEM32(reg, ralue, virtual_router, 0x04, 16, 16);
7136 MLXSW_ITEM32(reg, ralue, op_u_mask, 0x04, 8, 3);
7144 MLXSW_ITEM32(reg, ralue, prefix_len, 0x08, 0, 8);
7154 MLXSW_ITEM32(reg, ralue, dip4, 0x18, 0, 32);
7155 MLXSW_ITEM_BUF(reg, ralue, dip6, 0x0C, 16);
7168 MLXSW_ITEM32(reg, ralue, entry_type, 0x1C, 30, 2);
7178 MLXSW_ITEM32(reg, ralue, bmp_len, 0x1C, 16, 8);
7195 MLXSW_ITEM32(reg, ralue, action_type, 0x1C, 0, 2);
7210 MLXSW_ITEM32(reg, ralue, trap_action, 0x20, 28, 4);
7218 MLXSW_ITEM32(reg, ralue, trap_id, 0x20, 0, 9);
7225 MLXSW_ITEM32(reg, ralue, adjacency_index, 0x24, 0, 24);
7235 MLXSW_ITEM32(reg, ralue, ecmp_size, 0x28, 0, 13);
7242 MLXSW_ITEM32(reg, ralue, local_erif, 0x24, 0, 16);
7254 MLXSW_ITEM32(reg, ralue, ip2me_v, 0x24, 31, 1);
7262 MLXSW_ITEM32(reg, ralue, ip2me_tunnel_ptr, 0x24, 0, 24);
7358 MLXSW_ITEM32(reg, rauht, type, 0x00, 24, 2);
7389 MLXSW_ITEM32(reg, rauht, op, 0x00, 20, 3);
7398 MLXSW_ITEM32(reg, rauht, a, 0x00, 16, 1);
7404 MLXSW_ITEM32(reg, rauht, rif, 0x00, 0, 16);
7410 MLXSW_ITEM32(reg, rauht, dip4, 0x1C, 0x0, 32);
7411 MLXSW_ITEM_BUF(reg, rauht, dip6, 0x10, 16);
7424 MLXSW_ITEM32(reg, rauht, trap_action, 0x60, 28, 4);
7438 MLXSW_ITEM32(reg, rauht, trap_id, 0x60, 0, 9);
7444 MLXSW_ITEM32(reg, rauht, counter_set_type, 0x68, 24, 8);
7450 MLXSW_ITEM32(reg, rauht, counter_index, 0x68, 0, 24);
7456 MLXSW_ITEM_BUF(reg, rauht, mac, 0x6E, 6);
7508 MLXSW_ITEM32(reg, raleu, protocol, 0x00, 24, 4);
7515 MLXSW_ITEM32(reg, raleu, virtual_router, 0x00, 0, 16);
7521 MLXSW_ITEM32(reg, raleu, adjacency_index, 0x10, 0, 24);
7527 MLXSW_ITEM32(reg, raleu, ecmp_size, 0x14, 0, 13);
7533 MLXSW_ITEM32(reg, raleu, new_adjacency_index, 0x20, 0, 24);
7539 MLXSW_ITEM32(reg, raleu, new_ecmp_size, 0x24, 0, 13);
7586 MLXSW_ITEM32(reg, rauhtd, filter_fields, 0x00, 0, 8);
7596 MLXSW_ITEM32(reg, rauhtd, op, 0x04, 24, 2);
7606 MLXSW_ITEM32(reg, rauhtd, num_rec, 0x04, 0, 8);
7613 MLXSW_ITEM32(reg, rauhtd, entry_a, 0x08, 16, 1);
7626 MLXSW_ITEM32(reg, rauhtd, type, 0x08, 0, 4);
7633 MLXSW_ITEM32(reg, rauhtd, entry_rif, 0x0C, 0, 16);
7654 MLXSW_ITEM32_INDEXED(reg, rauhtd, ipv4_rec_num_entries,
7664 MLXSW_ITEM32_INDEXED(reg, rauhtd, rec_type, MLXSW_REG_RAUHTD_BASE_LEN, 24, 2,
7674 MLXSW_ITEM32_INDEXED(reg, rauhtd, ipv4_ent_a, MLXSW_REG_RAUHTD_BASE_LEN, 16, 1,
7681 MLXSW_ITEM32_INDEXED(reg, rauhtd, ipv4_ent_rif, MLXSW_REG_RAUHTD_BASE_LEN, 0,
7688 MLXSW_ITEM32_INDEXED(reg, rauhtd, ipv4_ent_dip, MLXSW_REG_RAUHTD_BASE_LEN, 0,
7698 MLXSW_ITEM32_INDEXED(reg, rauhtd, ipv6_ent_a, MLXSW_REG_RAUHTD_BASE_LEN, 16, 1,
7705 MLXSW_ITEM32_INDEXED(reg, rauhtd, ipv6_ent_rif, MLXSW_REG_RAUHTD_BASE_LEN, 0,
7712 MLXSW_ITEM_BUF_INDEXED(reg, rauhtd, ipv6_ent_dip, MLXSW_REG_RAUHTD_BASE_LEN,
7750 MLXSW_ITEM32(reg, rtdp, type, 0x00, 28, 4);
7757 MLXSW_ITEM32(reg, rtdp, tunnel_index, 0x00, 0, 24);
7764 MLXSW_ITEM32(reg, rtdp, egress_router_interface, 0x40, 0, 16);
7772 MLXSW_ITEM32(reg, rtdp, ipip_irif, 0x04, 16, 16);
7792 MLXSW_ITEM32(reg, rtdp, ipip_sip_check, 0x04, 0, 3);
7806 MLXSW_ITEM32(reg, rtdp, ipip_type_check, 0x08, 24, 3);
7817 MLXSW_ITEM32(reg, rtdp, ipip_gre_key_check, 0x08, 23, 1);
7824 MLXSW_ITEM32(reg, rtdp, ipip_ipv4_usip, 0x0C, 0, 32);
7833 MLXSW_ITEM32(reg, rtdp, ipip_ipv6_usip_ptr, 0x10, 0, 24);
7840 MLXSW_ITEM32(reg, rtdp, ipip_expected_gre_key, 0x14, 0, 32);
7881 MLXSW_ITEM32(reg, rigr2, rigr_index, 0x04, 0, 24);
7887 MLXSW_ITEM32(reg, rigr2, vnext, 0x08, 31, 1);
7894 MLXSW_ITEM32(reg, rigr2, next_rigr_index, 0x08, 0, 24);
7900 MLXSW_ITEM32(reg, rigr2, vrmid, 0x20, 31, 1);
7909 MLXSW_ITEM32(reg, rigr2, rmid_index, 0x20, 0, 16);
7919 MLXSW_ITEM32_INDEXED(reg, rigr2, erif_entry_v, 0x24, 31, 1, 4, 0, false);
7927 MLXSW_ITEM32_INDEXED(reg, rigr2, erif_entry_erif, 0x24, 0, 16, 4, 0, false);
7959 MLXSW_ITEM32(reg, recr2, pp, 0x00, 24, 1);
7965 MLXSW_ITEM32(reg, recr2, sh, 0x00, 8, 1);
7971 MLXSW_ITEM32(reg, recr2, seed, 0x08, 0, 32);
7993 MLXSW_ITEM_BIT_ARRAY(reg, recr2, outer_header_enables, 0x10, 0x04, 1);
8026 MLXSW_ITEM_BIT_ARRAY(reg, recr2, outer_header_fields_enable, 0x14, 0x14, 1);
8091 MLXSW_ITEM32(reg, rmft2, v, 0x00, 31, 1);
8101 MLXSW_ITEM32(reg, rmft2, type, 0x00, 28, 2);
8118 MLXSW_ITEM32(reg, rmft2, op, 0x00, 20, 2);
8125 MLXSW_ITEM32(reg, rmft2, a, 0x00, 16, 1);
8131 MLXSW_ITEM32(reg, rmft2, offset, 0x00, 0, 16);
8137 MLXSW_ITEM32(reg, rmft2, virtual_router, 0x04, 0, 16);
8148 MLXSW_ITEM32(reg, rmft2, irif_mask, 0x08, 24, 1);
8154 MLXSW_ITEM32(reg, rmft2, irif, 0x08, 0, 16);
8160 MLXSW_ITEM_BUF(reg, rmft2, dip6, 0x10, 16);
8161 MLXSW_ITEM32(reg, rmft2, dip4, 0x1C, 0, 32);
8168 MLXSW_ITEM_BUF(reg, rmft2, dip6_mask, 0x20, 16);
8169 MLXSW_ITEM32(reg, rmft2, dip4_mask, 0x2C, 0, 32);
8175 MLXSW_ITEM_BUF(reg, rmft2, sip6, 0x30, 16);
8176 MLXSW_ITEM32(reg, rmft2, sip4, 0x3C, 0, 32);
8183 MLXSW_ITEM_BUF(reg, rmft2, sip6_mask, 0x40, 16);
8184 MLXSW_ITEM32(reg, rmft2, sip4_mask, 0x4C, 0, 32);
8197 MLXSW_ITEM_BUF(reg, rmft2, flexible_action_set, 0x80,
8273 MLXSW_ITEM32(reg, mfcr, pwm_frequency, 0x00, 0, 7);
8281 MLXSW_ITEM32(reg, mfcr, tacho_active, 0x04, 16, MLXSW_MFCR_TACHOS_MAX);
8289 MLXSW_ITEM32(reg, mfcr, pwm_active, 0x04, 0, MLXSW_MFCR_PWMS_MAX);
8322 MLXSW_ITEM32(reg, mfsc, pwm, 0x00, 24, 3);
8329 MLXSW_ITEM32(reg, mfsc, pwm_duty_cycle, 0x04, 0, 8);
8353 MLXSW_ITEM32(reg, mfsm, tacho, 0x00, 24, 4);
8359 MLXSW_ITEM32(reg, mfsm, rpm, 0x04, 0, 16);
8382 MLXSW_ITEM32(reg, mfsl, tacho, 0x00, 24, 4);
8388 MLXSW_ITEM32(reg, mfsl, tach_min, 0x04, 0, 16);
8394 MLXSW_ITEM32(reg, mfsl, tach_max, 0x08, 0, 16);
8431 MLXSW_ITEM32(reg, fore, fan_under_limit, 0x00, 16, 10);
8459 MLXSW_ITEM32(reg, mtcap, sensor_count, 0x00, 0, 7);
8480 MLXSW_ITEM32(reg, mtmp, sensor_index, 0x00, 0, 12);
8493 MLXSW_ITEM32(reg, mtmp, temperature, 0x04, 0, 16);
8499 MLXSW_ITEM32(reg, mtmp, mte, 0x08, 31, 1);
8505 MLXSW_ITEM32(reg, mtmp, mtr, 0x08, 30, 1);
8512 MLXSW_ITEM32(reg, mtmp, max_temperature, 0x08, 0, 16);
8528 MLXSW_ITEM32(reg, mtmp, tee, 0x0C, 30, 2);
8536 MLXSW_ITEM32(reg, mtmp, temperature_threshold_hi, 0x0C, 0, 16);
8543 MLXSW_ITEM32(reg, mtmp, temperature_threshold_lo, 0x10, 0, 16);
8551 MLXSW_ITEM_BUF(reg, mtmp, sensor_name, 0x18, MLXSW_REG_MTMP_SENSOR_NAME_SIZE);
8597 MLXSW_ITEM_BIT_ARRAY(reg, mtwe, sensor_warning, 0x0, 0x10, 1);
8618 MLXSW_ITEM32(reg, mtbr, base_sensor_index, 0x00, 0, 12);
8627 MLXSW_ITEM32(reg, mtbr, num_rec, 0x04, 0, 8);
8634 MLXSW_ITEM32_INDEXED(reg, mtbr, rec_max_temp, MLXSW_REG_MTBR_BASE_LEN, 16,
8642 MLXSW_ITEM32_INDEXED(reg, mtbr, rec_temp, MLXSW_REG_MTBR_BASE_LEN, 0, 16,
8689 MLXSW_ITEM32(reg, mcia, l, 0x00, 31, 1);
8695 MLXSW_ITEM32(reg, mcia, module, 0x00, 16, 8);
8701 MLXSW_ITEM32(reg, mcia, status, 0x00, 0, 8);
8707 MLXSW_ITEM32(reg, mcia, i2c_device_address, 0x04, 24, 8);
8713 MLXSW_ITEM32(reg, mcia, page_number, 0x04, 16, 8);
8719 MLXSW_ITEM32(reg, mcia, device_address, 0x04, 0, 16);
8725 MLXSW_ITEM32(reg, mcia, size, 0x08, 0, 16);
8765 MLXSW_ITEM_BUF(reg, mcia, eeprom, 0x10, MLXSW_REG_MCIA_EEPROM_SIZE);
8802 MLXSW_ITEM32(reg, mpat, pa_id, 0x00, 28, 4);
8809 MLXSW_ITEM32(reg, mpat, session_id, 0x00, 24, 4);
8815 MLXSW_ITEM32(reg, mpat, system_port, 0x00, 0, 16);
8821 MLXSW_ITEM32(reg, mpat, e, 0x04, 31, 1);
8832 MLXSW_ITEM32(reg, mpat, qos, 0x04, 26, 1);
8842 MLXSW_ITEM32(reg, mpat, be, 0x04, 25, 1);
8866 MLXSW_ITEM32(reg, mpat, span_type, 0x04, 0, 4);
8872 MLXSW_ITEM32(reg, mpat, pide, 0x0C, 15, 1);
8878 MLXSW_ITEM32(reg, mpat, pid, 0x0C, 0, 14);
8888 MLXSW_ITEM32(reg, mpat, eth_rspan_vid, 0x18, 0, 12);
8902 MLXSW_ITEM32(reg, mpat, eth_rspan_version, 0x10, 18, 4);
8908 MLXSW_ITEM_BUF(reg, mpat, eth_rspan_mac, 0x12, 6);
8914 MLXSW_ITEM32(reg, mpat, eth_rspan_tp, 0x18, 16, 1);
8929 MLXSW_ITEM32(reg, mpat, eth_rspan_protocol, 0x18, 24, 4);
8935 MLXSW_ITEM32(reg, mpat, eth_rspan_ttl, 0x1C, 4, 8);
8941 MLXSW_ITEM_BUF(reg, mpat, eth_rspan_smac, 0x22, 6);
8947 MLXSW_ITEM32(reg, mpat, eth_rspan_dip4, 0x4C, 0, 32);
8948 MLXSW_ITEM_BUF(reg, mpat, eth_rspan_dip6, 0x40, 16);
8954 MLXSW_ITEM32(reg, mpat, eth_rspan_sip4, 0x5C, 0, 32);
8955 MLXSW_ITEM_BUF(reg, mpat, eth_rspan_sip6, 0x50, 16);
9026 MLXSW_ITEM32(reg, mpar, local_port, 0x00, 16, 8);
9037 MLXSW_ITEM32(reg, mpar, i_e, 0x00, 0, 4);
9044 MLXSW_ITEM32(reg, mpar, enable, 0x04, 31, 1);
9050 MLXSW_ITEM32(reg, mpar, pa_id, 0x04, 0, 4);
9076 MLXSW_ITEM32(reg, mgir, hw_info_device_hw_revision, 0x0, 16, 16);
9084 MLXSW_ITEM_BUF(reg, mgir, fw_info_psid, 0x30, MLXSW_REG_MGIR_FW_INFO_PSID_SIZE);
9089 MLXSW_ITEM32(reg, mgir, fw_info_extended_major, 0x44, 0, 32);
9094 MLXSW_ITEM32(reg, mgir, fw_info_extended_minor, 0x48, 0, 32);
9099 MLXSW_ITEM32(reg, mgir, fw_info_extended_sub_minor, 0x4C, 0, 32);
9133 MLXSW_ITEM32(reg, mrsr, command, 0x00, 0, 4);
9154 MLXSW_ITEM32(reg, mlcr, local_port, 0x00, 16, 8);
9164 MLXSW_ITEM32(reg, mlcr, beacon_duration, 0x04, 0, 16);
9171 MLXSW_ITEM32(reg, mlcr, beacon_remain, 0x08, 0, 16);
9197 MLXSW_ITEM32(reg, mtpps, enable, 0x20, 31, 1);
9208 MLXSW_ITEM32(reg, mtpps, pin_mode, 0x20, 8, 4);
9216 MLXSW_ITEM32(reg, mtpps, pin, 0x20, 0, 8);
9226 MLXSW_ITEM64(reg, mtpps, time_stamp, 0x28, 0, 64);
9257 MLXSW_ITEM32(reg, mtutc, operation, 0x00, 0, 4);
9265 MLXSW_ITEM32(reg, mtutc, freq_adjustment, 0x04, 0, 32);
9271 MLXSW_ITEM32(reg, mtutc, utc_sec, 0x10, 0, 32);
9298 MLXSW_ITEM32(reg, mcqi, component_index, 0x00, 0, 16);
9308 MLXSW_ITEM32(reg, mcqi, info_type, 0x08, 0, 5);
9315 MLXSW_ITEM32(reg, mcqi, offset, 0x10, 0, 32);
9322 MLXSW_ITEM32(reg, mcqi, data_size, 0x14, 0, 16);
9328 MLXSW_ITEM32(reg, mcqi, cap_max_component_size, 0x20, 0, 32);
9335 MLXSW_ITEM32(reg, mcqi, cap_log_mcda_word_size, 0x24, 28, 4);
9341 MLXSW_ITEM32(reg, mcqi, cap_mcda_max_write_size, 0x24, 0, 16);
9389 MLXSW_ITEM32(reg, mcc, instruction, 0x00, 0, 8);
9396 MLXSW_ITEM32(reg, mcc, component_index, 0x04, 0, 16);
9402 MLXSW_ITEM32(reg, mcc, update_handle, 0x08, 0, 24);
9409 MLXSW_ITEM32(reg, mcc, error_code, 0x0C, 8, 8);
9415 MLXSW_ITEM32(reg, mcc, control_state, 0x0C, 0, 4);
9423 MLXSW_ITEM32(reg, mcc, component_size, 0x10, 0, 32);
9464 MLXSW_ITEM32(reg, mcda, update_handle, 0x00, 0, 24);
9471 MLXSW_ITEM32(reg, mcda, offset, 0x04, 0, 32);
9477 MLXSW_ITEM32(reg, mcda, size, 0x08, 0, 16);
9483 MLXSW_ITEM32_INDEXED(reg, mcda, data, 0x10, 0, 32, 4, 0, false);
9513 MLXSW_ITEM32(reg, mpsc, local_port, 0x00, 16, 8);
9519 MLXSW_ITEM32(reg, mpsc, e, 0x04, 30, 1);
9528 MLXSW_ITEM32(reg, mpsc, rate, 0x08, 0, 32);
9551 MLXSW_ITEM32(reg, mgpc, counter_set_type, 0x00, 24, 8);
9557 MLXSW_ITEM32(reg, mgpc, counter_index, 0x00, 0, 24);
9570 MLXSW_ITEM32(reg, mgpc, opcode, 0x04, 28, 4);
9576 MLXSW_ITEM64(reg, mgpc, byte_counter, 0x08, 0, 64);
9582 MLXSW_ITEM64(reg, mgpc, packet_counter, 0x10, 0, 64);
9610 MLXSW_ITEM32(reg, mprs, parsing_depth, 0x00, 0, 16);
9618 MLXSW_ITEM32(reg, mprs, parsing_en, 0x04, 0, 16);
9626 MLXSW_ITEM32(reg, mprs, vxlan_udp_dport, 0x10, 0, 16);
9652 MLXSW_ITEM32(reg, mogcr, ptp_iftc, 0x00, 1, 1);
9661 MLXSW_ITEM32(reg, mogcr, ptp_eftc, 0x00, 0, 1);
9669 MLXSW_ITEM32(reg, mogcr, mirroring_pid_base, 0x0C, 0, 14);
9696 MLXSW_ITEM32(reg, mpagr, trigger, 0x00, 0, 4);
9702 MLXSW_ITEM32(reg, mpagr, pa_id, 0x04, 0, 4);
9710 MLXSW_ITEM32(reg, mpagr, probability_rate, 0x08, 0, 32);
9736 MLXSW_ITEM32(reg, momte, local_port, 0x00, 16, 8);
9753 MLXSW_ITEM32(reg, momte, type, 0x04, 0, 8);
9761 MLXSW_ITEM_BIT_ARRAY(reg, momte, tclass_en, 0x08, 0x08, 1);
9790 MLXSW_ITEM32(reg, mtpppc, ing_timestamp_message_type, 0x08, 0, 16);
9799 MLXSW_ITEM32(reg, mtpppc, egr_timestamp_message_type, 0x0C, 0, 16);
9831 MLXSW_ITEM32(reg, mtpptr, local_port, 0x00, 16, 8);
9842 MLXSW_ITEM32(reg, mtpptr, dir, 0x00, 0, 1);
9848 MLXSW_ITEM32(reg, mtpptr, clr, 0x04, 31, 1);
9855 MLXSW_ITEM32(reg, mtpptr, num_rec, 0x08, 0, 4);
9862 MLXSW_ITEM32_INDEXED(reg, mtpptr, rec_message_type,
9870 MLXSW_ITEM32_INDEXED(reg, mtpptr, rec_domain_number,
9878 MLXSW_ITEM32_INDEXED(reg, mtpptr, rec_sequence_id,
9888 MLXSW_ITEM32_INDEXED(reg, mtpptr, rec_timestamp_high,
9896 MLXSW_ITEM32_INDEXED(reg, mtpptr, rec_timestamp_low,
9936 MLXSW_ITEM32(reg, mtptpt, trap_id, 0x00, 0, 4);
9944 MLXSW_ITEM32(reg, mtptpt, message_type, 0x04, 0, 16);
9968 MLXSW_ITEM32(reg, mfgd, fatal_event_mode, 0x00, 9, 2);
9973 MLXSW_ITEM32(reg, mfgd, trigger_test, 0x00, 11, 1);
9993 MLXSW_ITEM32(reg, mgpir, device_type, 0x00, 24, 4);
9999 MLXSW_ITEM32(reg, mgpir, devices_per_flash, 0x00, 16, 8);
10005 MLXSW_ITEM32(reg, mgpir, num_of_devices, 0x00, 0, 8);
10011 MLXSW_ITEM32(reg, mgpir, num_of_modules, 0x04, 0, 8);
10046 MLXSW_ITEM32(reg, mfde, irisc_id, 0x00, 8, 4);
10057 MLXSW_ITEM32(reg, mfde, event_id, 0x00, 0, 8);
10067 MLXSW_ITEM32(reg, mfde, method, 0x04, 29, 1);
10073 MLXSW_ITEM32(reg, mfde, long_process, 0x04, 28, 1);
10084 MLXSW_ITEM32(reg, mfde, command_type, 0x04, 24, 2);
10090 MLXSW_ITEM32(reg, mfde, reg_attr_id, 0x04, 0, 16);
10097 MLXSW_ITEM32(reg, mfde, log_address, 0x10, 0, 32);
10104 MLXSW_ITEM32(reg, mfde, log_id, 0x14, 0, 4);
10110 MLXSW_ITEM32(reg, mfde, pipes_mask, 0x10, 0, 16);
10134 MLXSW_ITEM32(reg, tngcr, type, 0x00, 0, 4);
10140 MLXSW_ITEM32(reg, tngcr, nve_valid, 0x04, 31, 1);
10146 MLXSW_ITEM32(reg, tngcr, nve_ttl_uc, 0x04, 0, 8);
10152 MLXSW_ITEM32(reg, tngcr, nve_ttl_mc, 0x08, 0, 8);
10168 MLXSW_ITEM32(reg, tngcr, nve_flc, 0x0C, 25, 1);
10185 MLXSW_ITEM32(reg, tngcr, nve_flh, 0x0C, 24, 1);
10191 MLXSW_ITEM32(reg, tngcr, nve_fl_prefix, 0x0C, 8, 12);
10198 MLXSW_ITEM32(reg, tngcr, nve_fl_suffix, 0x0C, 0, 8);
10215 MLXSW_ITEM32(reg, tngcr, nve_udp_sport_type, 0x10, 24, 1);
10222 MLXSW_ITEM32(reg, tngcr, nve_udp_sport_prefix, 0x10, 8, 8);
10232 MLXSW_ITEM32(reg, tngcr, nve_group_size_mc, 0x18, 0, 8);
10242 MLXSW_ITEM32(reg, tngcr, nve_group_size_flood, 0x1C, 0, 8);
10249 MLXSW_ITEM32(reg, tngcr, learn_enable, 0x20, 31, 1);
10256 MLXSW_ITEM32(reg, tngcr, underlay_virtual_router, 0x20, 0, 16);
10263 MLXSW_ITEM32(reg, tngcr, underlay_rif, 0x24, 0, 16);
10269 MLXSW_ITEM32(reg, tngcr, usipv4, 0x28, 0, 32);
10276 MLXSW_ITEM_BUF(reg, tngcr, usipv6, 0x30, 16);
10316 MLXSW_ITEM32(reg, tnumt, record_type, 0x00, 28, 4);
10329 MLXSW_ITEM32(reg, tnumt, tunnel_port, 0x00, 24, 4);
10336 MLXSW_ITEM32(reg, tnumt, underlay_mc_ptr, 0x00, 0, 24);
10342 MLXSW_ITEM32(reg, tnumt, vnext, 0x04, 31, 1);
10348 MLXSW_ITEM32(reg, tnumt, next_underlay_mc_ptr, 0x04, 0, 24);
10355 MLXSW_ITEM32(reg, tnumt, record_size, 0x08, 0, 3);
10361 MLXSW_ITEM32_INDEXED(reg, tnumt, udip, 0x0C, 0, 32, 0x04, 0x00, false);
10368 MLXSW_ITEM32_INDEXED(reg, tnumt, udip_ptr, 0x0C, 0, 24, 0x04, 0x00, false);
10403 MLXSW_ITEM32(reg, tnqcr, enc_set_dscp, 0x04, 28, 1);
10425 MLXSW_ITEM32(reg, tnqdr, local_port, 0x00, 16, 8);
10431 MLXSW_ITEM32(reg, tnqdr, dscp, 0x04, 0, 6);
10454 MLXSW_ITEM32(reg, tneem, overlay_ecn, 0x04, 24, 2);
10460 MLXSW_ITEM32(reg, tneem, underlay_ecn, 0x04, 16, 2);
10484 MLXSW_ITEM32(reg, tndem, underlay_ecn, 0x04, 24, 2);
10490 MLXSW_ITEM32(reg, tndem, overlay_ecn, 0x04, 16, 2);
10497 MLXSW_ITEM32(reg, tndem, eip_ecn, 0x04, 8, 2);
10505 MLXSW_ITEM32(reg, tndem, trap_en, 0x08, 28, 4);
10512 MLXSW_ITEM32(reg, tndem, trap_id, 0x08, 0, 9);
10547 MLXSW_ITEM32(reg, tnpc, tunnel_port, 0x00, 0, 4);
10553 MLXSW_ITEM32(reg, tnpc, learn_enable_v6, 0x04, 1, 1);
10559 MLXSW_ITEM32(reg, tnpc, learn_enable_v4, 0x04, 0, 1);
10585 MLXSW_ITEM32(reg, tigcr, ttlc, 0x04, 8, 1);
10592 MLXSW_ITEM32(reg, tigcr, ttl_uc, 0x04, 0, 8);
10615 MLXSW_ITEM32(reg, tieem, overlay_ecn, 0x04, 24, 2);
10621 MLXSW_ITEM32(reg, tieem, underlay_ecn, 0x04, 16, 2);
10645 MLXSW_ITEM32(reg, tidem, underlay_ecn, 0x04, 24, 2);
10651 MLXSW_ITEM32(reg, tidem, overlay_ecn, 0x04, 16, 2);
10658 MLXSW_ITEM32(reg, tidem, eip_ecn, 0x04, 8, 2);
10666 MLXSW_ITEM32(reg, tidem, trap_en, 0x08, 28, 4);
10673 MLXSW_ITEM32(reg, tidem, trap_id, 0x08, 0, 9);
10706 MLXSW_ITEM32(reg, sbpr, dir, 0x00, 24, 2);
10712 MLXSW_ITEM32(reg, sbpr, pool, 0x00, 0, 4);
10718 MLXSW_ITEM32(reg, sbpr, infi_size, 0x04, 31, 1);
10725 MLXSW_ITEM32(reg, sbpr, size, 0x04, 0, 24);
10736 MLXSW_ITEM32(reg, sbpr, mode, 0x08, 0, 4);
10768 MLXSW_ITEM32(reg, sbcm, local_port, 0x00, 16, 8);
10778 MLXSW_ITEM32(reg, sbcm, pg_buff, 0x00, 8, 6);
10784 MLXSW_ITEM32(reg, sbcm, dir, 0x00, 0, 2);
10790 MLXSW_ITEM32(reg, sbcm, min_buff, 0x18, 0, 24);
10800 MLXSW_ITEM32(reg, sbcm, infi_max, 0x1C, 31, 1);
10814 MLXSW_ITEM32(reg, sbcm, max_buff, 0x1C, 0, 24);
10820 MLXSW_ITEM32(reg, sbcm, pool, 0x24, 0, 4);
10854 MLXSW_ITEM32(reg, sbpm, local_port, 0x00, 16, 8);
10860 MLXSW_ITEM32(reg, sbpm, pool, 0x00, 8, 4);
10866 MLXSW_ITEM32(reg, sbpm, dir, 0x00, 0, 2);
10872 MLXSW_ITEM32(reg, sbpm, buff_occupancy, 0x10, 0, 24);
10880 MLXSW_ITEM32(reg, sbpm, clr, 0x14, 31, 1);
10887 MLXSW_ITEM32(reg, sbpm, max_buff_occupancy, 0x14, 0, 24);
10893 MLXSW_ITEM32(reg, sbpm, min_buff, 0x18, 0, 24);
10906 MLXSW_ITEM32(reg, sbpm, max_buff, 0x1C, 0, 24);
10943 MLXSW_ITEM32(reg, sbmm, prio, 0x00, 8, 4);
10949 MLXSW_ITEM32(reg, sbmm, min_buff, 0x18, 0, 24);
10962 MLXSW_ITEM32(reg, sbmm, max_buff, 0x1C, 0, 24);
10968 MLXSW_ITEM32(reg, sbmm, pool, 0x24, 0, 4);
11004 MLXSW_ITEM32(reg, sbsr, clr, 0x00, 31, 1);
11013 MLXSW_ITEM_BIT_ARRAY(reg, sbsr, ingress_port_mask, 0x10, 0x20, 1);
11023 MLXSW_ITEM_BIT_ARRAY(reg, sbsr, pg_buff_mask, 0x30, 0x4, 1);
11032 MLXSW_ITEM_BIT_ARRAY(reg, sbsr, egress_port_mask, 0x34, 0x20, 1);
11042 MLXSW_ITEM_BIT_ARRAY(reg, sbsr, tclass_mask, 0x54, 0x8, 1);
11054 MLXSW_ITEM32_INDEXED(reg, sbsr, rec_buff_occupancy, MLXSW_REG_SBSR_BASE_LEN,
11062 MLXSW_ITEM32_INDEXED(reg, sbsr, rec_max_buff_occupancy, MLXSW_REG_SBSR_BASE_LEN,
11093 MLXSW_ITEM32(reg, sbib, local_port, 0x00, 16, 8);
11101 MLXSW_ITEM32(reg, sbib, buff_size, 0x08, 0, 24);
11272 MLXSW_ITEM32(reg, pude, swid, 0x00, 24, 8);
11278 MLXSW_ITEM32(reg, pude, local_port, 0x00, 16, 8);
11289 MLXSW_ITEM32(reg, pude, admin_status, 0x00, 8, 4);
11299 MLXSW_ITEM32(reg, pude, oper_status, 0x00, 0, 4);