Lines Matching refs:uint32_t
80 uint32_t Revision:8;
81 uint32_t InId:24;
83 uint32_t word;
89 uint32_t CmdRsp:16;
90 uint32_t Size:16;
92 uint32_t word;
115 uint32_t PortID;
134 uint32_t PortId; /* For RFT_ID requests */
137 uint32_t rsvd0:16;
138 uint32_t rsvd1:7;
139 uint32_t fcpReg:1; /* Type 8 */
140 uint32_t rsvd2:2;
141 uint32_t ipReg:1; /* Type 5 */
142 uint32_t rsvd3:5;
144 uint32_t rsvd0:16;
145 uint32_t fcpReg:1; /* Type 8 */
146 uint32_t rsvd1:7;
147 uint32_t rsvd3:5;
148 uint32_t ipReg:1; /* Type 5 */
149 uint32_t rsvd2:2;
152 uint32_t rsvd[7];
155 uint32_t PortId; /* For RNN_ID requests */
164 uint32_t port_id;
167 uint32_t PortId;
172 uint32_t PortId;
178 uint32_t PortId;
181 uint32_t fc4_types[8];
185 uint32_t PortId;
440 uint32_t r_a_tov; /* R_A_TOV must be in B.E. format */
443 uint32_t e_d_tov; /* E_D_TOV must be in B.E. format */
526 uint32_t vid;
528 uint32_t flags;
538 uint32_t word0;
557 uint32_t word1;
660 uint32_t lsRjtError;
711 uint32_t nPortId32; /* Access nPortId as a word */
762 uint32_t origProcAssoc; /* FC Parm Word 1, bit 0:31 */
764 uint32_t respProcAssoc; /* FC Parm Word 2, bit 0:31 */
834 uint32_t origProcAssoc; /* FC Parm Word 1, bit 0:31 */
836 uint32_t respProcAssoc; /* FC Parm Word 2, bit 0:31 */
838 uint32_t word3Reserved1; /* FC Parm Word 3, bit 0:31 */
842 uint32_t hardAL_PA;
845 uint32_t DID;
849 uint32_t Mflags:8;
850 uint32_t Odid:24;
860 uint32_t Rflags:8;
861 uint32_t Rdid:24;
873 uint32_t Fdid;
892 uint32_t unitType;
896 uint32_t physPort;
897 uint32_t attachedNodes;
923 uint32_t rls;
933 uint32_t linkFailureCnt;
934 uint32_t lossSyncCnt;
935 uint32_t lossSignalCnt;
936 uint32_t primSeqErrCnt;
937 uint32_t invalidXmitWord;
938 uint32_t crcCnt;
942 uint32_t rrq;
949 uint32_t rrq_exchg;
962 uint32_t ratov;
963 uint32_t edtov;
964 uint32_t qtov;
984 uint32_t maxsize;
985 uint32_t index;
989 uint32_t portNum;
990 uint32_t portID;
995 uint32_t listLen;
996 uint32_t index;
1003 uint32_t word;
1055 uint32_t lcb_command; /* ELS command opcode (0x81) */
1075 uint32_t lcb_ls_acc; /* Acceptance of LCB request (0x02) */
1120 uint32_t link_failure_cnt;
1121 uint32_t loss_of_synch_cnt;
1122 uint32_t loss_of_signal_cnt;
1123 uint32_t primitive_seq_proto_err;
1124 uint32_t invalid_trans_word;
1125 uint32_t invalid_crc_cnt;
1131 uint32_t tag; /* 0001 0003h */
1132 uint32_t length; /* set to size of payload struct */
1138 uint32_t CorrectedBlocks;
1139 uint32_t UncorrectableBlocks;
1144 uint32_t tag;
1145 uint32_t length;
1151 uint32_t port_type; /* bits 31-30 only */
1156 uint32_t tag; /* 0001 0002h */
1157 uint32_t length; /* set to size of payload struct */
1193 uint32_t tag; /* 00010001h */
1194 uint32_t length; /* set to size of payload struct */
1201 uint32_t tag; /* 0000 0003h, big endian */
1202 uint32_t length; /* size of RDP_N_PORT_ID struct */
1203 uint32_t nport_id : 12;
1204 uint32_t reserved : 8;
1209 uint32_t els_req; /* Request payload word 0 value.*/
1214 uint32_t tag; /* Descriptor tag 1 */
1215 uint32_t length; /* set to size of payload struct. */
1231 uint32_t tag;
1232 uint32_t length; /* set to size of sfp_info struct */
1238 uint32_t port_bbc; /* FC_Port buffer-to-buffer credit */
1239 uint32_t attached_port_bbc;
1240 uint32_t rtt; /* Round trip time */
1244 uint32_t tag;
1245 uint32_t length;
1268 uint32_t function_flags;
1272 uint32_t tag;
1273 uint32_t length;
1288 uint32_t tag;
1289 uint32_t length;
1294 uint32_t rdp_command; /* ELS command opcode (0x18)*/
1295 uint32_t rdp_des_length; /* RDP Payload Word 1 */
1301 uint32_t reply_sequence; /* FC word0 LS_ACC or LS_RJT */
1302 uint32_t length; /* FC Word 1 */
1330 uint32_t AttrInt;
1339 uint32_t AttrType:16;
1340 uint32_t AttrLen:16;
1349 uint32_t EntryCnt; /* Number of HBA attribute entries */
1371 uint32_t EntryCnt;
1638 uint32_t hostAtt; /* See definitions for Host Attention
1640 uint32_t chipAtt; /* See definitions for Chip Attention
1642 uint32_t hostStatus; /* See definitions for Host Status register */
1643 uint32_t hostControl; /* See definitions for Host Control register */
1644 uint32_t buiConfig; /* See definitions for BIU configuration
1983 uint32_t bdeAddress;
1985 uint32_t bdeReserved:4;
1986 uint32_t bdeAddrHigh:4;
1987 uint32_t bdeSize:24;
1989 uint32_t bdeSize:24;
1990 uint32_t bdeAddrHigh:4;
1991 uint32_t bdeReserved:4;
1997 uint32_t bdeFlags:8; /* BDL Flags */
1998 uint32_t bdeSize:24; /* Size of BDL array in host memory (bytes) */
2000 uint32_t bdeSize:24; /* Size of BDL array in host memory (bytes) */
2001 uint32_t bdeFlags:8; /* BDL Flags */
2004 uint32_t addrLow; /* Address 0:31 */
2005 uint32_t addrHigh; /* Address 32:63 */
2006 uint32_t ulpIoTag32; /* Can be used for 32 bit I/O Tag */
2037 uint32_t word0;
2044 uint32_t reftag; /* Reference Tag Value */
2045 uint32_t reftagtr; /* Reference Tag Translation Value */
2049 uint32_t word0;
2056 uint32_t word1;
2069 uint32_t word2;
2100 uint32_t word0;
2107 uint32_t addrHigh;
2108 uint32_t addrLow;
2115 uint32_t rsvd2:25;
2116 uint32_t acknowledgment:1;
2117 uint32_t version:1;
2118 uint32_t erase_or_prog:1;
2119 uint32_t update_flash:1;
2120 uint32_t update_ram:1;
2121 uint32_t method:1;
2122 uint32_t load_cmplt:1;
2124 uint32_t load_cmplt:1;
2125 uint32_t method:1;
2126 uint32_t update_ram:1;
2127 uint32_t update_flash:1;
2128 uint32_t erase_or_prog:1;
2129 uint32_t version:1;
2130 uint32_t acknowledgment:1;
2131 uint32_t rsvd2:25;
2134 uint32_t dl_to_adr_low;
2135 uint32_t dl_to_adr_high;
2136 uint32_t dl_len;
2138 uint32_t dl_from_mbx_offset;
2148 uint32_t rsvd1[3]; /* Read as all one's */
2149 uint32_t rsvd2; /* Read as all zero's */
2150 uint32_t portname[2]; /* N_PORT name */
2151 uint32_t nodename[2]; /* NODE name */
2154 uint32_t pref_DID:24;
2155 uint32_t hardAL_PA:8;
2157 uint32_t hardAL_PA:8;
2158 uint32_t pref_DID:24;
2161 uint32_t rsvd3[21]; /* Read as all one's */
2167 uint32_t rsvd1[3]; /* Must be all one's */
2168 uint32_t rsvd2; /* Must be all zero's */
2169 uint32_t portname[2]; /* N_PORT name */
2170 uint32_t nodename[2]; /* NODE name */
2173 uint32_t pref_DID:24;
2174 uint32_t hardAL_PA:8;
2176 uint32_t hardAL_PA:8;
2177 uint32_t pref_DID:24;
2180 uint32_t rsvd3[21]; /* Must be all one's */
2187 uint32_t rsvd1;
2202 uint32_t word1;
2207 uint32_t offset;
2215 uint32_t rsvd1:24;
2216 uint32_t lipsr_AL_PA:8; /* AL_PA to issue Lip Selective Reset to */
2218 uint32_t lipsr_AL_PA:8; /* AL_PA to issue Lip Selective Reset to */
2219 uint32_t rsvd1:24;
2244 uint32_t link_speed;
2262 uint32_t rsvd1;
2269 uint32_t cr:1;
2270 uint32_t ci:1;
2271 uint32_t cr_delay:6;
2272 uint32_t cr_count:8;
2273 uint32_t rsvd1:8;
2274 uint32_t MaxBBC:8;
2276 uint32_t MaxBBC:8;
2277 uint32_t rsvd1:8;
2278 uint32_t cr_count:8;
2279 uint32_t cr_delay:6;
2280 uint32_t ci:1;
2281 uint32_t cr:1;
2284 uint32_t myId;
2285 uint32_t rsvd2;
2286 uint32_t edtov;
2287 uint32_t arbtov;
2288 uint32_t ratov;
2289 uint32_t rttov;
2290 uint32_t altov;
2291 uint32_t crtov;
2294 uint32_t rsvd4:19;
2295 uint32_t cscn:1;
2296 uint32_t bbscn:4;
2297 uint32_t rsvd3:8;
2299 uint32_t rsvd3:8;
2300 uint32_t bbscn:4;
2301 uint32_t cscn:1;
2302 uint32_t rsvd4:19;
2306 uint32_t rrq_enable:1;
2307 uint32_t rrq_immed:1;
2308 uint32_t rsvd5:29;
2309 uint32_t ack0_enable:1;
2311 uint32_t ack0_enable:1;
2312 uint32_t rsvd5:29;
2313 uint32_t rrq_immed:1;
2314 uint32_t rrq_enable:1;
2337 uint32_t unused1:24;
2338 uint32_t numRing:8;
2340 uint32_t numRing:8;
2341 uint32_t unused1:24;
2345 uint32_t hbainit;
2352 uint32_t unused2:6;
2353 uint32_t recvSeq:1;
2354 uint32_t recvNotify:1;
2355 uint32_t numMask:8;
2356 uint32_t profile:8;
2357 uint32_t unused1:4;
2358 uint32_t ring:4;
2360 uint32_t ring:4;
2361 uint32_t unused1:4;
2362 uint32_t profile:8;
2363 uint32_t numMask:8;
2364 uint32_t recvNotify:1;
2365 uint32_t recvSeq:1;
2366 uint32_t unused2:6;
2383 uint32_t ring_no;
2390 uint32_t cr:1;
2391 uint32_t ci:1;
2392 uint32_t cr_delay:6;
2393 uint32_t cr_count:8;
2394 uint32_t InitBBC:8;
2395 uint32_t MaxBBC:8;
2397 uint32_t MaxBBC:8;
2398 uint32_t InitBBC:8;
2399 uint32_t cr_count:8;
2400 uint32_t cr_delay:6;
2401 uint32_t ci:1;
2402 uint32_t cr:1;
2406 uint32_t topology:8;
2407 uint32_t myDid:24;
2409 uint32_t myDid:24;
2410 uint32_t topology:8;
2415 uint32_t AR:1;
2416 uint32_t IR:1;
2417 uint32_t rsvd1:29;
2418 uint32_t ack0:1;
2420 uint32_t ack0:1;
2421 uint32_t rsvd1:29;
2422 uint32_t IR:1;
2423 uint32_t AR:1;
2426 uint32_t edtov;
2427 uint32_t arbtov;
2428 uint32_t ratov;
2429 uint32_t rttov;
2430 uint32_t altov;
2431 uint32_t lmt;
2443 uint32_t rsvd2;
2444 uint32_t rsvd3;
2445 uint32_t max_xri;
2446 uint32_t max_iocb;
2447 uint32_t max_rpi;
2448 uint32_t avail_xri;
2449 uint32_t avail_iocb;
2450 uint32_t avail_rpi;
2451 uint32_t max_vpi;
2452 uint32_t rsvd4;
2453 uint32_t rsvd5;
2454 uint32_t avail_vpi;
2461 uint32_t rsvd2:7;
2462 uint32_t recvNotify:1;
2463 uint32_t numMask:8;
2464 uint32_t profile:8;
2465 uint32_t rsvd1:4;
2466 uint32_t ring:4;
2468 uint32_t ring:4;
2469 uint32_t rsvd1:4;
2470 uint32_t profile:8;
2471 uint32_t numMask:8;
2472 uint32_t recvNotify:1;
2473 uint32_t rsvd2:7;
2511 uint32_t rsvd1;
2512 uint32_t rsvd2;
2531 uint32_t rsvd1:31;
2532 uint32_t clrCounters:1;
2536 uint32_t clrCounters:1;
2537 uint32_t rsvd1:31;
2542 uint32_t xmitByteCnt;
2543 uint32_t rcvByteCnt;
2544 uint32_t xmitFrameCnt;
2545 uint32_t rcvFrameCnt;
2546 uint32_t xmitSeqCnt;
2547 uint32_t rcvSeqCnt;
2548 uint32_t totalOrigExchanges;
2549 uint32_t totalRespExchanges;
2550 uint32_t rcvPbsyCnt;
2551 uint32_t rcvFbsyCnt;
2561 uint32_t rsvd2:8;
2562 uint32_t DID:24;
2566 uint32_t DID:24;
2567 uint32_t rsvd2:8;
2585 uint32_t rsvd2:8;
2586 uint32_t DID:24;
2587 uint32_t rsvd3:8;
2588 uint32_t SID:24;
2589 uint32_t rsvd4;
2595 uint32_t rsvd6:30;
2596 uint32_t si:1;
2597 uint32_t exchOrig:1;
2603 uint32_t DID:24;
2604 uint32_t rsvd2:8;
2605 uint32_t SID:24;
2606 uint32_t rsvd3:8;
2607 uint32_t rsvd4;
2613 uint32_t exchOrig:1;
2614 uint32_t si:1;
2615 uint32_t rsvd6:30;
2623 uint32_t cv:1;
2624 uint32_t rr:1;
2625 uint32_t rsvd2:2;
2626 uint32_t v3req:1;
2627 uint32_t v3rsp:1;
2628 uint32_t rsvd1:25;
2629 uint32_t rv:1;
2631 uint32_t rv:1;
2632 uint32_t rsvd1:25;
2633 uint32_t v3rsp:1;
2634 uint32_t v3req:1;
2635 uint32_t rsvd2:2;
2636 uint32_t rr:1;
2637 uint32_t cv:1;
2640 uint32_t biuRev;
2641 uint32_t smRev;
2643 uint32_t smFwRev;
2665 uint32_t endecRev;
2678 uint32_t postKernRev;
2679 uint32_t opFwRev;
2681 uint32_t sli1FwRev;
2683 uint32_t sli2FwRev;
2685 uint32_t sli3Feat;
2686 uint32_t RandomData[6];
2692 uint32_t word0;
2722 uint32_t linkFailureCnt;
2723 uint32_t lossSyncCnt;
2724 uint32_t lossSignalCnt;
2725 uint32_t primSeqErrCnt;
2726 uint32_t invalidXmitWord;
2727 uint32_t crcCnt;
2728 uint32_t primSeqTimeout;
2729 uint32_t elasticOverrun;
2730 uint32_t arbTimeout;
2731 uint32_t advRecBufCredit;
2732 uint32_t curRecBufCredit;
2733 uint32_t advTransBufCredit;
2734 uint32_t curTransBufCredit;
2735 uint32_t recEofCount;
2736 uint32_t recEofdtiCount;
2737 uint32_t recEofniCount;
2738 uint32_t recSofcount;
2739 uint32_t rsvd1;
2740 uint32_t rsvd2;
2741 uint32_t recDrpXriCount;
2742 uint32_t fecCorrBlkCount;
2743 uint32_t fecUncorrBlkCount;
2753 uint32_t rsvd2:8;
2754 uint32_t did:24;
2758 uint32_t did:24;
2759 uint32_t rsvd2:8;
2790 uint32_t word;
2799 uint32_t rsvd2;
2800 uint32_t rsvd3;
2801 uint32_t rsvd4;
2802 uint32_t rsvd5;
2808 uint32_t rsvd2;
2809 uint32_t rsvd3;
2810 uint32_t rsvd4;
2811 uint32_t rsvd5;
2820 uint32_t rsvd1;
2821 uint32_t rsvd2:7;
2822 uint32_t upd:1;
2823 uint32_t sid:24;
2824 uint32_t wwn[2];
2825 uint32_t rsvd5;
2829 uint32_t rsvd1;
2830 uint32_t sid:24;
2831 uint32_t upd:1;
2832 uint32_t rsvd2:7;
2833 uint32_t wwn[2];
2834 uint32_t rsvd5;
2842 uint32_t rsvd1;
2850 uint32_t rsvd3;
2851 uint32_t rsvd4;
2852 uint32_t rsvd5;
2865 uint32_t did;
2866 uint32_t rsvd2;
2867 uint32_t rsvd3;
2868 uint32_t rsvd4;
2869 uint32_t rsvd5;
2881 uint32_t eventTag; /* Event tag */
2882 uint32_t word2;
2902 uint32_t word3;
2921 uint32_t word7;
2940 uint32_t word8;
2975 uint32_t eventTag; /* Event tag */
2976 uint32_t rsvd1;
2983 uint32_t rsvd:25;
2984 uint32_t ra:1;
2985 uint32_t co:1;
2986 uint32_t cv:1;
2987 uint32_t type:4;
2988 uint32_t entry_index:16;
2989 uint32_t region_id:16;
2991 uint32_t type:4;
2992 uint32_t cv:1;
2993 uint32_t co:1;
2994 uint32_t ra:1;
2995 uint32_t rsvd:25;
2996 uint32_t region_id:16;
2997 uint32_t entry_index:16;
3000 uint32_t sli4_length;
3001 uint32_t word_cnt;
3002 uint32_t resp_offset;
3035 uint32_t signature;
3036 uint32_t rev;
3038 uint32_t resvd[66];
3046 uint32_t ver:4; /* Major Version */
3047 uint32_t rev:4; /* Revision */
3048 uint32_t lev:2; /* Level */
3049 uint32_t dist:2; /* Dist Type */
3050 uint32_t num:4; /* number after dist type */
3052 uint32_t num:4; /* number after dist type */
3053 uint32_t dist:2; /* Dist Type */
3054 uint32_t lev:2; /* Level */
3055 uint32_t rev:4; /* Revision */
3056 uint32_t ver:4; /* Major Version */
3066 uint32_t rsvd2:16;
3067 uint32_t type:8;
3068 uint32_t rsvd:1;
3069 uint32_t ra:1;
3070 uint32_t co:1;
3071 uint32_t cv:1;
3072 uint32_t req:4;
3073 uint32_t entry_length:16;
3074 uint32_t region_id:16;
3076 uint32_t req:4;
3077 uint32_t cv:1;
3078 uint32_t co:1;
3079 uint32_t ra:1;
3080 uint32_t rsvd:1;
3081 uint32_t type:8;
3082 uint32_t rsvd2:16;
3083 uint32_t region_id:16;
3084 uint32_t entry_length:16;
3087 uint32_t resp_info;
3088 uint32_t byte_cnt;
3089 uint32_t data_offset;
3111 uint32_t rsvd1 :7;
3112 uint32_t recvNotify :1; /* Receive Notification */
3113 uint32_t numMask :8; /* # Mask Entries */
3114 uint32_t profile :8; /* Selection Profile */
3115 uint32_t rsvd2 :8;
3117 uint32_t rsvd2 :8;
3118 uint32_t profile :8; /* Selection Profile */
3119 uint32_t numMask :8; /* # Mask Entries */
3120 uint32_t recvNotify :1; /* Receive Notification */
3121 uint32_t rsvd1 :7;
3125 uint32_t hbqId :16;
3126 uint32_t rsvd3 :12;
3127 uint32_t ringMask :4;
3129 uint32_t ringMask :4;
3130 uint32_t rsvd3 :12;
3131 uint32_t hbqId :16;
3135 uint32_t entry_count :16;
3136 uint32_t rsvd4 :8;
3137 uint32_t headerLen :8;
3139 uint32_t headerLen :8;
3140 uint32_t rsvd4 :8;
3141 uint32_t entry_count :16;
3144 uint32_t hbqaddrLow;
3145 uint32_t hbqaddrHigh;
3148 uint32_t rsvd5 :31;
3149 uint32_t logEntry :1;
3151 uint32_t logEntry :1;
3152 uint32_t rsvd5 :31;
3155 uint32_t rsvd6; /* w7 */
3156 uint32_t rsvd7; /* w8 */
3157 uint32_t rsvd8; /* w9 */
3163 uint32_t allprofiles[12];
3167 uint32_t seqlenoff :16;
3168 uint32_t maxlen :16;
3170 uint32_t maxlen :16;
3171 uint32_t seqlenoff :16;
3174 uint32_t rsvd1 :28;
3175 uint32_t seqlenbcnt :4;
3177 uint32_t seqlenbcnt :4;
3178 uint32_t rsvd1 :28;
3180 uint32_t rsvd[10];
3185 uint32_t seqlenoff :16;
3186 uint32_t maxlen :16;
3188 uint32_t maxlen :16;
3189 uint32_t seqlenoff :16;
3192 uint32_t cmdcodeoff :28;
3193 uint32_t rsvd1 :12;
3194 uint32_t seqlenbcnt :4;
3196 uint32_t seqlenbcnt :4;
3197 uint32_t rsvd1 :12;
3198 uint32_t cmdcodeoff :28;
3200 uint32_t cmdmatch[8];
3202 uint32_t rsvd[2];
3207 uint32_t seqlenoff :16;
3208 uint32_t maxlen :16;
3210 uint32_t maxlen :16;
3211 uint32_t seqlenoff :16;
3214 uint32_t cmdcodeoff :28;
3215 uint32_t rsvd1 :12;
3216 uint32_t seqlenbcnt :4;
3218 uint32_t seqlenbcnt :4;
3219 uint32_t rsvd1 :12;
3220 uint32_t cmdcodeoff :28;
3222 uint32_t cmdmatch[8];
3224 uint32_t rsvd[2];
3236 uint32_t cBE : 1;
3237 uint32_t cET : 1;
3238 uint32_t cHpcb : 1;
3239 uint32_t cMA : 1;
3240 uint32_t sli_mode : 4;
3241 uint32_t pcbLen : 24; /* bit 23:0 of memory based port
3244 uint32_t pcbLen : 24; /* bit 23:0 of memory based port
3246 uint32_t sli_mode : 4;
3247 uint32_t cMA : 1;
3248 uint32_t cHpcb : 1;
3249 uint32_t cET : 1;
3250 uint32_t cBE : 1;
3253 uint32_t pcbLow; /* bit 31:0 of memory based port config block */
3254 uint32_t pcbHigh; /* bit 63:32 of memory based port config block */
3255 uint32_t hbainit[5];
3257 uint32_t hps : 1; /* bit 31 word9 Host Pointer in slim */
3258 uint32_t rsvd : 31; /* least significant 31 bits of word 9 */
3260 uint32_t rsvd : 31; /* least significant 31 bits of word 9 */
3261 uint32_t hps : 1; /* bit 31 word9 Host Pointer in slim */
3265 uint32_t rsvd1 : 20; /* Reserved */
3266 uint32_t casabt : 1; /* Configure async abts status notice */
3267 uint32_t rsvd2 : 2; /* Reserved */
3268 uint32_t cbg : 1; /* Configure BlockGuard */
3269 uint32_t cmv : 1; /* Configure Max VPIs */
3270 uint32_t ccrp : 1; /* Config Command Ring Polling */
3271 uint32_t csah : 1; /* Configure Synchronous Abort Handling */
3272 uint32_t chbs : 1; /* Cofigure Host Backing store */
3273 uint32_t cinb : 1; /* Enable Interrupt Notification Block */
3274 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */
3275 uint32_t cmx : 1; /* Configure Max XRIs */
3276 uint32_t cmr : 1; /* Configure Max RPIs */
3278 uint32_t cmr : 1; /* Configure Max RPIs */
3279 uint32_t cmx : 1; /* Configure Max XRIs */
3280 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */
3281 uint32_t cinb : 1; /* Enable Interrupt Notification Block */
3282 uint32_t chbs : 1; /* Cofigure Host Backing store */
3283 uint32_t csah : 1; /* Configure Synchronous Abort Handling */
3284 uint32_t ccrp : 1; /* Config Command Ring Polling */
3285 uint32_t cmv : 1; /* Configure Max VPIs */
3286 uint32_t cbg : 1; /* Configure BlockGuard */
3287 uint32_t rsvd2 : 2; /* Reserved */
3288 uint32_t casabt : 1; /* Configure async abts status notice */
3289 uint32_t rsvd1 : 20; /* Reserved */
3292 uint32_t rsvd3 : 20; /* Reserved */
3293 uint32_t gasabt : 1; /* Grant async abts status notice */
3294 uint32_t rsvd4 : 2; /* Reserved */
3295 uint32_t gbg : 1; /* Grant BlockGuard */
3296 uint32_t gmv : 1; /* Grant Max VPIs */
3297 uint32_t gcrp : 1; /* Grant Command Ring Polling */
3298 uint32_t gsah : 1; /* Grant Synchronous Abort Handling */
3299 uint32_t ghbs : 1; /* Grant Host Backing Store */
3300 uint32_t ginb : 1; /* Grant Interrupt Notification Block */
3301 uint32_t gerbm : 1; /* Grant ERBM Request */
3302 uint32_t gmx : 1; /* Grant Max XRIs */
3303 uint32_t gmr : 1; /* Grant Max RPIs */
3305 uint32_t gmr : 1; /* Grant Max RPIs */
3306 uint32_t gmx : 1; /* Grant Max XRIs */
3307 uint32_t gerbm : 1; /* Grant ERBM Request */
3308 uint32_t ginb : 1; /* Grant Interrupt Notification Block */
3309 uint32_t ghbs : 1; /* Grant Host Backing Store */
3310 uint32_t gsah : 1; /* Grant Synchronous Abort Handling */
3311 uint32_t gcrp : 1; /* Grant Command Ring Polling */
3312 uint32_t gmv : 1; /* Grant Max VPIs */
3313 uint32_t gbg : 1; /* Grant BlockGuard */
3314 uint32_t rsvd4 : 2; /* Reserved */
3315 uint32_t gasabt : 1; /* Grant async abts status notice */
3316 uint32_t rsvd3 : 20; /* Reserved */
3320 uint32_t max_rpi : 16; /* Max RPIs Port should configure */
3321 uint32_t max_xri : 16; /* Max XRIs Port should configure */
3323 uint32_t max_xri : 16; /* Max XRIs Port should configure */
3324 uint32_t max_rpi : 16; /* Max RPIs Port should configure */
3328 uint32_t max_hbq : 16; /* Max HBQs Host expect to configure */
3329 uint32_t rsvd5 : 16; /* Max HBQs Host expect to configure */
3331 uint32_t rsvd5 : 16; /* Max HBQs Host expect to configure */
3332 uint32_t max_hbq : 16; /* Max HBQs Host expect to configure */
3335 uint32_t rsvd6; /* Reserved */
3338 uint32_t rsvd7 : 16;
3339 uint32_t max_vpi : 16; /* Max number of virt N-Ports */
3341 uint32_t max_vpi : 16; /* Max number of virt N-Ports */
3342 uint32_t rsvd7 : 16;
3350 uint32_t dfltMsgNum:8; /* Default message number */
3351 uint32_t rsvd1:11; /* Reserved */
3352 uint32_t NID:5; /* Number of secondary attention IDs */
3353 uint32_t rsvd2:5; /* Reserved */
3354 uint32_t dfltPresent:1; /* Default message number present */
3355 uint32_t addFlag:1; /* Add association flag */
3356 uint32_t reportFlag:1; /* Report association flag */
3358 uint32_t reportFlag:1; /* Report association flag */
3359 uint32_t addFlag:1; /* Add association flag */
3360 uint32_t dfltPresent:1; /* Default message number present */
3361 uint32_t rsvd2:5; /* Reserved */
3362 uint32_t NID:5; /* Number of secondary attention IDs */
3363 uint32_t rsvd1:11; /* Reserved */
3364 uint32_t dfltMsgNum:8; /* Default message number */
3366 uint32_t attentionConditions[2];
3370 uint32_t autoClearHA[2];
3372 uint32_t rsvd3:16;
3373 uint32_t autoClearID:16;
3375 uint32_t autoClearID:16;
3376 uint32_t rsvd3:16;
3378 uint32_t rsvd4;
3387 uint32_t cmdEntries;
3388 uint32_t cmdAddrLow;
3389 uint32_t cmdAddrHigh;
3391 uint32_t rspEntries;
3392 uint32_t rspAddrLow;
3393 uint32_t rspAddrHigh;
3398 uint32_t type:8;
3400 uint32_t feature:8;
3402 uint32_t rsvd:12;
3403 uint32_t maxRing:4;
3405 uint32_t maxRing:4;
3406 uint32_t rsvd:12;
3407 uint32_t feature:8;
3409 uint32_t type:8;
3413 uint32_t mailBoxSize;
3414 uint32_t mbAddrLow;
3415 uint32_t mbAddrHigh;
3417 uint32_t hgpAddrLow;
3418 uint32_t hgpAddrHigh;
3420 uint32_t pgpAddrLow;
3421 uint32_t pgpAddrHigh;
3428 uint32_t rsvd0:27;
3429 uint32_t discardFarp:1;
3430 uint32_t IPEnable:1;
3431 uint32_t nodeName:1;
3432 uint32_t portName:1;
3433 uint32_t filterEnable:1;
3435 uint32_t filterEnable:1;
3436 uint32_t portName:1;
3437 uint32_t nodeName:1;
3438 uint32_t IPEnable:1;
3439 uint32_t discardFarp:1;
3440 uint32_t rsvd:27;
3445 uint32_t rsvd1;
3446 uint32_t rsvd2;
3447 uint32_t rsvd3;
3448 uint32_t IPAddress;
3455 uint32_t rsvd:30;
3456 uint32_t ring:2; /* Ring for ASYNC_EVENT iocb Bits 0-1*/
3458 uint32_t ring:2; /* Ring for ASYNC_EVENT iocb Bits 0-1*/
3459 uint32_t rsvd:30;
3465 #define MAILBOX_CMD_SIZE (MAILBOX_CMD_WSIZE * sizeof(uint32_t))
3468 #define MAILBOX_EXT_SIZE (MAILBOX_EXT_WSIZE * sizeof(uint32_t))
3474 uint32_t varWords[MAILBOX_CMD_WSIZE - 1]; /* first word is type/
3531 uint32_t unused1[16];
3538 uint32_t reserved[8];
3539 uint32_t hbq_put[16];
3544 uint32_t hbq_get[16];
3695 uint32_t reserved;
3700 uint32_t reserved[4];
3707 uint32_t xrsqRo; /* Starting Relative Offset */
3717 uint32_t word4Rsvd:7;
3718 uint32_t fl:1;
3719 uint32_t myID:24;
3720 uint32_t word5Rsvd:8;
3721 uint32_t remoteID:24;
3723 uint32_t myID:24;
3724 uint32_t fl:1;
3725 uint32_t word4Rsvd:7;
3726 uint32_t remoteID:24;
3727 uint32_t word5Rsvd:8;
3734 uint32_t parmRo;
3737 uint32_t word5Rsvd:8;
3738 uint32_t remoteID:24;
3740 uint32_t remoteID:24;
3741 uint32_t word5Rsvd:8;
3747 uint32_t rsvd[3];
3748 uint32_t abortType;
3751 uint32_t parm;
3763 uint32_t rsvd[3];
3764 uint32_t abortType;
3765 uint32_t parm;
3766 uint32_t iotag32;
3771 uint32_t rsvd[4];
3772 uint32_t parmRo;
3774 uint32_t word5Rsvd:8;
3775 uint32_t remoteID:24;
3777 uint32_t remoteID:24;
3778 uint32_t word5Rsvd:8;
3786 uint32_t fcpi_parm;
3787 uint32_t fcpi_XRdy; /* transfer ready for IWRITE */
3793 uint32_t fcpt_Offset;
3794 uint32_t fcpt_Length; /* transfer ready for IWRITE */
3802 uint32_t xrsqRo; /* Starting Relative Offset */
3812 uint32_t rsvd1;
3813 uint32_t xrsqRo; /* Starting Relative Offset */
3821 uint32_t word4Rsvd:7;
3822 uint32_t fl:1;
3823 uint32_t myID:24;
3824 uint32_t word5Rsvd:8;
3825 uint32_t remoteID:24;
3827 uint32_t myID:24;
3828 uint32_t fl:1;
3829 uint32_t word4Rsvd:7;
3830 uint32_t remoteID:24;
3831 uint32_t word5Rsvd:8;
3838 uint32_t xrsqRo; /* Starting Relative Offset */
3845 uint32_t rcvd1;
3846 uint32_t parmRo;
3849 uint32_t word5Rsvd:8;
3850 uint32_t remoteID:24;
3852 uint32_t remoteID:24;
3853 uint32_t word5Rsvd:8;
3860 uint32_t hbq_1;
3861 uint32_t parmRo;
3863 uint32_t rctl:8;
3864 uint32_t type:8;
3865 uint32_t dfctl:8;
3866 uint32_t ls:1;
3867 uint32_t fs:1;
3868 uint32_t rsvd2:3;
3869 uint32_t si:1;
3870 uint32_t bc:1;
3871 uint32_t rsvd3:1;
3873 uint32_t rsvd3:1;
3874 uint32_t bc:1;
3875 uint32_t si:1;
3876 uint32_t rsvd2:3;
3877 uint32_t fs:1;
3878 uint32_t ls:1;
3879 uint32_t dfctl:8;
3880 uint32_t type:8;
3881 uint32_t rctl:8;
3888 uint32_t fcpi_parm;
3889 uint32_t fcpi_XRdy; /* transfer ready for IWRITE */
3895 uint32_t fcpt_Offset;
3896 uint32_t fcpt_Length; /* transfer ready for IWRITE */
3901 uint32_t rsvd[4];
3902 uint32_t param;
3932 uint32_t word10Rsvd;
3933 uint32_t acc_len; /* accumulated length */
3940 uint32_t buffer_tag;
3946 uint32_t rsvd;
3947 uint32_t rsvd1;
3951 uint32_t iotag64_low;
3952 uint32_t iotag64_high;
3953 uint32_t ebde_count;
3954 uint32_t rsvd;
3959 uint32_t filler[6]; /* word 8-13 in IOCB */
3960 uint32_t bghm; /* word 14 - BlockGuard High Water Mark */
3980 uint32_t bgstat; /* word 15 - BlockGuard Status */
3983 static inline uint32_t
3984 lpfc_bgs_get_bidir_bg_prof(uint32_t bgstat) in lpfc_bgs_get_bidir_bg_prof()
3990 static inline uint32_t
3991 lpfc_bgs_get_bidir_err_cond(uint32_t bgstat) in lpfc_bgs_get_bidir_err_cond()
3997 static inline uint32_t
3998 lpfc_bgs_get_bg_prof(uint32_t bgstat) in lpfc_bgs_get_bg_prof()
4004 static inline uint32_t
4005 lpfc_bgs_get_invalid_prof(uint32_t bgstat) in lpfc_bgs_get_invalid_prof()
4011 static inline uint32_t
4012 lpfc_bgs_get_uninit_dif_block(uint32_t bgstat) in lpfc_bgs_get_uninit_dif_block()
4018 static inline uint32_t
4019 lpfc_bgs_get_hi_water_mark_present(uint32_t bgstat) in lpfc_bgs_get_hi_water_mark_present()
4025 static inline uint32_t
4026 lpfc_bgs_get_reftag_err(uint32_t bgstat) in lpfc_bgs_get_reftag_err()
4032 static inline uint32_t
4033 lpfc_bgs_get_apptag_err(uint32_t bgstat) in lpfc_bgs_get_apptag_err()
4039 static inline uint32_t
4040 lpfc_bgs_get_guard_err(uint32_t bgstat) in lpfc_bgs_get_guard_err()
4048 uint32_t io_tag64_low;
4049 uint32_t io_tag64_high;
4061 uint32_t reserved4;
4093 uint32_t ulpWord[IOCB_WORD_SZ - 2]; /* generic 6 'words' */
4122 uint32_t ulpTimeout:8;
4123 uint32_t ulpXS:1;
4124 uint32_t ulpFCP2Rcvy:1;
4125 uint32_t ulpPU:2;
4126 uint32_t ulpIr:1;
4127 uint32_t ulpClass:3;
4128 uint32_t ulpCommand:8;
4129 uint32_t ulpStatus:4;
4130 uint32_t ulpBdeCount:2;
4131 uint32_t ulpLe:1;
4132 uint32_t ulpOwner:1; /* Low order bit word 7 */
4134 uint32_t ulpOwner:1; /* Low order bit word 7 */
4135 uint32_t ulpLe:1;
4136 uint32_t ulpBdeCount:2;
4137 uint32_t ulpStatus:4;
4138 uint32_t ulpCommand:8;
4139 uint32_t ulpClass:3;
4140 uint32_t ulpIr:1;
4141 uint32_t ulpPU:2;
4142 uint32_t ulpFCP2Rcvy:1;
4143 uint32_t ulpXS:1;
4144 uint32_t ulpTimeout:8;
4153 uint32_t sli3Words[24]; /* 96 extra bytes for SLI-3 */
4207 sizeof(uint32_t) * MAILBOX_EXT_WSIZE))
4215 uint32_t mbx_ext_words[MAILBOX_EXT_WSIZE];