628 	u8		width;  member
634 #define clk_div_mask(width)	((1 << (width)) - 1)  argument
651 		unsigned long flags, unsigned long width);
655 			       u8 width, unsigned long flags);
658 				  const struct clk_div_table *table, u8 width,
661 		const struct clk_div_table *table, u8 width,
668 		void __iomem *reg, u8 shift, u8 width, u8 clk_divider_flags,
672 		void __iomem *reg, u8 shift, u8 width,
687 #define clk_register_divider(dev, name, parent_name, flags, reg, shift, width, \  argument
690 				   (reg), (shift), (width),		       \
705 				width, clk_divider_flags, lock)		      \  argument
707 				  NULL, (flags), (reg), (shift), (width),     \
723 					  shift, width, clk_divider_flags,    \  argument
726 				  NULL, (flags), (reg), (shift), (width),     \
742 					    reg, shift, width,		      \  argument
746 				  (width), (clk_divider_flags), NULL, (lock))
762 				      shift, width, clk_divider_flags, table, \  argument
765 				  NULL, (flags), (reg), (shift), (width),     \
782 						reg, shift, width,	      \  argument
786 				  NULL, (flags), (reg), (shift), (width),     \
803 						  flags, reg, shift, width,   \  argument
808 				  (width), (clk_divider_flags), (table),      \
878 			 shift, width, clk_mux_flags, lock)		      \  argument
880 			       (flags), (reg), (shift), BIT((width)) - 1,     \
897 			    shift, width, clk_mux_flags, lock)		      \  argument
900 			      (shift), BIT((width)) - 1, (clk_mux_flags),     \
903 				reg, shift, width, clk_mux_flags, lock)	      \  argument
906 			      BIT((width)) - 1, (clk_mux_flags), NULL, (lock))
908 					flags, reg, shift, width,	      \  argument
912 			      BIT((width)) - 1, (clk_mux_flags), NULL, (lock))
1036 	u8		width;  member
1171 				      u8 width, unsigned long flags)  in divider_round_rate()  argument
1174 					 rate, prate, table, width, flags);  in divider_round_rate()
1180 					 u8 width, unsigned long flags,  in divider_ro_round_rate()  argument
1184 					    rate, prate, table, width, flags,  in divider_ro_round_rate()