Lines Matching refs:SRC
93 #define BPF_ALU64_REG(OP, DST, SRC) \ argument
97 .src_reg = SRC, \
101 #define BPF_ALU32_REG(OP, DST, SRC) \ argument
105 .src_reg = SRC, \
139 #define BPF_MOV64_REG(DST, SRC) \ argument
143 .src_reg = SRC, \
147 #define BPF_MOV32_REG(DST, SRC) \ argument
151 .src_reg = SRC, \
191 #define BPF_LD_IMM64_RAW(DST, SRC, IMM) \ argument
195 .src_reg = SRC, \
211 #define BPF_MOV64_RAW(TYPE, DST, SRC, IMM) \ argument
215 .src_reg = SRC, \
219 #define BPF_MOV32_RAW(TYPE, DST, SRC, IMM) \ argument
223 .src_reg = SRC, \
239 #define BPF_LD_IND(SIZE, SRC, IMM) \ argument
243 .src_reg = SRC, \
249 #define BPF_LDX_MEM(SIZE, DST, SRC, OFF) \ argument
253 .src_reg = SRC, \
259 #define BPF_STX_MEM(SIZE, DST, SRC, OFF) \ argument
263 .src_reg = SRC, \
269 #define BPF_STX_XADD(SIZE, DST, SRC, OFF) \ argument
273 .src_reg = SRC, \
289 #define BPF_JMP_REG(OP, DST, SRC, OFF) \ argument
293 .src_reg = SRC, \
309 #define BPF_JMP32_REG(OP, DST, SRC, OFF) \ argument
313 .src_reg = SRC, \
362 #define BPF_RAW_INSN(CODE, DST, SRC, OFF, IMM) \ argument
366 .src_reg = SRC, \