Lines Matching refs:GENMASK
50 #define SSCR0_DSS GENMASK(3, 0) /* Data Size Select (mask) */
52 #define SSCR0_FRF GENMASK(5, 4) /* FRame Format (mask) */
65 #define SSCR0_FRDC GENMASK(26, 24) /* Frame rate divider control (mask) */
78 #define SSSR_ALT_FRM_MASK GENMASK(1, 0) /* Masks the SFRM signal number */
89 #define SSSR_TFL_MASK GENMASK(11, 8) /* Transmit FIFO Level mask */
90 #define SSSR_RFL_MASK GENMASK(15, 12) /* Receive FIFO Level mask */
92 #define SSCR1_TFT GENMASK(9, 6) /* Transmit FIFO Threshold (mask) */
94 #define SSCR1_RFT GENMASK(13, 10) /* Receive FIFO Threshold (mask) */
100 #define CE4100_SSSR_TFL_MASK GENMASK(9, 8) /* Transmit FIFO Level mask */
101 #define CE4100_SSSR_RFL_MASK GENMASK(13, 12) /* Receive FIFO Level mask */
103 #define CE4100_SSCR1_TFT GENMASK(7, 6) /* Transmit FIFO Threshold (mask) */
105 #define CE4100_SSCR1_RFT GENMASK(11, 10) /* Receive FIFO Threshold (mask) */
109 #define QUARK_X1000_SSCR0_DSS GENMASK(4, 0) /* Data Size Select (mask) */
111 #define QUARK_X1000_SSCR0_FRF GENMASK(6, 5) /* FRame Format (mask) */
117 #define QUARK_X1000_SSSR_TFL_MASK GENMASK(12, 8) /* Transmit FIFO Level mask */
118 #define QUARK_X1000_SSSR_RFL_MASK GENMASK(17, 13) /* Receive FIFO Level mask */
120 #define QUARK_X1000_SSCR1_TFT GENMASK(10, 6) /* Transmit FIFO Threshold (mask) */
122 #define QUARK_X1000_SSCR1_RFT GENMASK(15, 11) /* Receive FIFO Threshold (mask) */