143 			 u8 reg, u8 value)  in ak4396_write()  argument
156 			 AK4396_WRITE | (reg << 8) | value);  in ak4396_write()
157 	data->ak4396_regs[codec][reg] = value;  in ak4396_write()
161 				u8 reg, u8 value)  in ak4396_write_cached()  argument
165 	if (value != data->ak4396_regs[codec][reg])  in ak4396_write_cached()
166 		ak4396_write(chip, codec, reg, value);  in ak4396_write_cached()
169 static void wm8785_write(struct oxygen *chip, u8 reg, unsigned int value)  in wm8785_write()  argument
178 			 (reg << 9) | value);  in wm8785_write()
180 		data->wm8785_regs[reg] = value;  in wm8785_write()
338 	u8 value;  in set_ak4396_params()  local
340 	value = data->ak4396_regs[0][AK4396_CONTROL_2] & ~AK4396_DFS_MASK;  in set_ak4396_params()
342 		value |= AK4396_DFS_NORMAL;  in set_ak4396_params()
344 		value |= AK4396_DFS_DOUBLE;  in set_ak4396_params()
346 		value |= AK4396_DFS_QUAD;  in set_ak4396_params()
350 	if (value != data->ak4396_regs[0][AK4396_CONTROL_2]) {  in set_ak4396_params()
354 			ak4396_write(chip, i, AK4396_CONTROL_2, value);  in set_ak4396_params()
378 	u8 value;  in update_ak4396_mute()  local
380 	value = data->ak4396_regs[0][AK4396_CONTROL_2] & ~AK4396_SMUTE;  in update_ak4396_mute()
382 		value |= AK4396_SMUTE;  in update_ak4396_mute()
384 		ak4396_write_cached(chip, i, AK4396_CONTROL_2, value);  in update_ak4396_mute()
391 	unsigned int value;  in set_wm8785_params()  local
393 	value = WM8785_MCR_SLAVE | WM8785_FORMAT_LJUST;  in set_wm8785_params()
395 		value |= WM8785_OSR_SINGLE;  in set_wm8785_params()
397 		value |= WM8785_OSR_DOUBLE;  in set_wm8785_params()
399 		value |= WM8785_OSR_QUAD;  in set_wm8785_params()
400 	if (value != data->wm8785_regs[0]) {  in set_wm8785_params()
402 		wm8785_write(chip, WM8785_R0, value);  in set_wm8785_params()
410 	unsigned int value;  in set_ak5385_params()  local
413 		value = GPIO_AK5385_DFS_NORMAL;  in set_ak5385_params()
415 		value = GPIO_AK5385_DFS_DOUBLE;  in set_ak5385_params()
417 		value = GPIO_AK5385_DFS_QUAD;  in set_ak5385_params()
419 			      value, GPIO_AK5385_DFS_MASK);  in set_ak5385_params()
437 		       struct snd_ctl_elem_value *value)  in rolloff_get()  argument
442 	value->value.enumerated.item[0] =  in rolloff_get()
448 		       struct snd_ctl_elem_value *value)  in rolloff_put()  argument
458 	if (value->value.enumerated.item[0])  in rolloff_put()
488 static int hpf_get(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)  in hpf_get()  argument
493 	value->value.enumerated.item[0] =  in hpf_get()
498 static int hpf_put(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)  in hpf_put()  argument
507 	if (value->value.enumerated.item[0])  in hpf_put()
541 				   struct snd_ctl_elem_value *value)  in meridian_dig_source_get()  argument
545 	value->value.enumerated.item[0] =  in meridian_dig_source_get()
552 				struct snd_ctl_elem_value *value)  in claro_dig_source_get()  argument
556 	value->value.enumerated.item[0] =  in claro_dig_source_get()
563 				   struct snd_ctl_elem_value *value)  in meridian_dig_source_put()  argument
572 	if (value->value.enumerated.item[0] == 0)  in meridian_dig_source_put()
584 				struct snd_ctl_elem_value *value)  in claro_dig_source_put()  argument
593 	if (value->value.enumerated.item[0])  in claro_dig_source_put()