Lines Matching refs:mgr
59 #define PCXHR_INPB(mgr,x) inb((mgr)->port[PCXHR_REG_TO_PORT(x)] + (x)) argument
60 #define PCXHR_INPL(mgr,x) inl((mgr)->port[PCXHR_REG_TO_PORT(x)] + (x)) argument
61 #define PCXHR_OUTPB(mgr,x,data) outb((data), (mgr)->port[PCXHR_REG_TO_PORT(x)] + (x)) argument
62 #define PCXHR_OUTPL(mgr,x,data) outl((data), (mgr)->port[PCXHR_REG_TO_PORT(x)] + (x)) argument
113 static int pcxhr_check_reg_bit(struct pcxhr_mgr *mgr, unsigned int reg, in pcxhr_check_reg_bit() argument
120 *read = PCXHR_INPB(mgr, reg); in pcxhr_check_reg_bit()
123 dev_dbg(&mgr->pci->dev, in pcxhr_check_reg_bit()
130 dev_err(&mgr->pci->dev, in pcxhr_check_reg_bit()
166 static int pcxhr_send_it_dsp(struct pcxhr_mgr *mgr, in pcxhr_send_it_dsp() argument
174 PCXHR_OUTPL(mgr, PCXHR_PLX_MBOX0, in pcxhr_send_it_dsp()
175 PCXHR_INPL(mgr, PCXHR_PLX_MBOX0) & in pcxhr_send_it_dsp()
186 PCXHR_OUTPB(mgr, PCXHR_DSP_ICR, reg); in pcxhr_send_it_dsp()
190 PCXHR_OUTPB(mgr, PCXHR_DSP_CVR, reg); in pcxhr_send_it_dsp()
204 err = pcxhr_check_reg_bit(mgr, PCXHR_DSP_CVR, PCXHR_CVR_HI08_HC, 0, in pcxhr_send_it_dsp()
207 dev_err(&mgr->pci->dev, "pcxhr_send_it_dsp : TIMEOUT CVR\n"); in pcxhr_send_it_dsp()
212 err = pcxhr_check_reg_bit(mgr, PCXHR_PLX_MBOX0, in pcxhr_send_it_dsp()
218 dev_err(&mgr->pci->dev, in pcxhr_send_it_dsp()
226 void pcxhr_reset_xilinx_com(struct pcxhr_mgr *mgr) in pcxhr_reset_xilinx_com() argument
229 PCXHR_OUTPL(mgr, PCXHR_PLX_CHIPSC, in pcxhr_reset_xilinx_com()
233 static void pcxhr_enable_irq(struct pcxhr_mgr *mgr, int enable) in pcxhr_enable_irq() argument
235 unsigned int reg = PCXHR_INPL(mgr, PCXHR_PLX_IRQCS); in pcxhr_enable_irq()
241 PCXHR_OUTPL(mgr, PCXHR_PLX_IRQCS, reg); in pcxhr_enable_irq()
244 void pcxhr_reset_dsp(struct pcxhr_mgr *mgr) in pcxhr_reset_dsp() argument
247 pcxhr_enable_irq(mgr, 0); in pcxhr_reset_dsp()
250 PCXHR_OUTPB(mgr, PCXHR_DSP_RESET, 0); in pcxhr_reset_dsp()
252 PCXHR_OUTPB(mgr, PCXHR_DSP_RESET, 3); in pcxhr_reset_dsp()
256 PCXHR_OUTPL(mgr, PCXHR_PLX_MBOX0, 0); in pcxhr_reset_dsp()
259 void pcxhr_enable_dsp(struct pcxhr_mgr *mgr) in pcxhr_enable_dsp() argument
262 pcxhr_enable_irq(mgr, 1); in pcxhr_enable_dsp()
268 int pcxhr_load_xilinx_binary(struct pcxhr_mgr *mgr, in pcxhr_load_xilinx_binary() argument
278 chipsc = PCXHR_INPL(mgr, PCXHR_PLX_CHIPSC); in pcxhr_load_xilinx_binary()
285 dev_err(&mgr->pci->dev, "error loading first xilinx\n"); in pcxhr_load_xilinx_binary()
290 PCXHR_OUTPL(mgr, PCXHR_PLX_CHIPSC, chipsc); in pcxhr_load_xilinx_binary()
302 PCXHR_OUTPL(mgr, PCXHR_PLX_CHIPSC, chipsc); in pcxhr_load_xilinx_binary()
304 PCXHR_OUTPL(mgr, PCXHR_PLX_CHIPSC, chipsc); in pcxhr_load_xilinx_binary()
311 PCXHR_OUTPL(mgr, PCXHR_PLX_CHIPSC, chipsc); in pcxhr_load_xilinx_binary()
320 static int pcxhr_download_dsp(struct pcxhr_mgr *mgr, const struct firmware *dsp) in pcxhr_download_dsp() argument
346 err = pcxhr_check_reg_bit(mgr, PCXHR_DSP_ISR, in pcxhr_download_dsp()
351 dev_err(&mgr->pci->dev, in pcxhr_download_dsp()
356 PCXHR_OUTPB(mgr, PCXHR_DSP_TXH, data[0]); in pcxhr_download_dsp()
357 PCXHR_OUTPB(mgr, PCXHR_DSP_TXM, data[1]); in pcxhr_download_dsp()
358 PCXHR_OUTPB(mgr, PCXHR_DSP_TXL, data[2]); in pcxhr_download_dsp()
371 int pcxhr_load_eeprom_binary(struct pcxhr_mgr *mgr, in pcxhr_load_eeprom_binary() argument
379 if (PCXHR_INPL(mgr, PCXHR_PLX_MBOX0) & PCXHR_MBOX0_BOOT_HERE) { in pcxhr_load_eeprom_binary()
383 PCXHR_OUTPB(mgr, PCXHR_DSP_ICR, reg | PCXHR_ICR_HI08_INIT); in pcxhr_load_eeprom_binary()
385 PCXHR_OUTPB(mgr, PCXHR_DSP_ICR, reg); in pcxhr_load_eeprom_binary()
387 dev_dbg(&mgr->pci->dev, "no need to load eeprom boot\n"); in pcxhr_load_eeprom_binary()
390 PCXHR_OUTPB(mgr, PCXHR_DSP_ICR, reg); in pcxhr_load_eeprom_binary()
392 err = pcxhr_download_dsp(mgr, eeprom); in pcxhr_load_eeprom_binary()
396 return pcxhr_check_reg_bit(mgr, PCXHR_DSP_ISR, PCXHR_ISR_HI08_CHK, in pcxhr_load_eeprom_binary()
403 int pcxhr_load_boot_binary(struct pcxhr_mgr *mgr, const struct firmware *boot) in pcxhr_load_boot_binary() argument
406 unsigned int physaddr = mgr->hostport.addr; in pcxhr_load_boot_binary()
412 PCXHR_OUTPL(mgr, PCXHR_PLX_MBOX1, (physaddr >> 8)); in pcxhr_load_boot_binary()
414 err = pcxhr_send_it_dsp(mgr, PCXHR_IT_DOWNLOAD_BOOT, 0); in pcxhr_load_boot_binary()
418 PCXHR_OUTPL(mgr, PCXHR_PLX_MBOX0, in pcxhr_load_boot_binary()
419 PCXHR_INPL(mgr, PCXHR_PLX_MBOX0) & ~PCXHR_MBOX0_HF5); in pcxhr_load_boot_binary()
421 err = pcxhr_download_dsp(mgr, boot); in pcxhr_load_boot_binary()
425 return pcxhr_check_reg_bit(mgr, PCXHR_PLX_MBOX0, PCXHR_MBOX0_HF5, in pcxhr_load_boot_binary()
432 int pcxhr_load_dsp_binary(struct pcxhr_mgr *mgr, const struct firmware *dsp) in pcxhr_load_dsp_binary() argument
436 err = pcxhr_send_it_dsp(mgr, PCXHR_IT_RESET_BOARD_FUNC, 0); in pcxhr_load_dsp_binary()
439 err = pcxhr_send_it_dsp(mgr, PCXHR_IT_DOWNLOAD_DSP, 0); in pcxhr_load_dsp_binary()
442 err = pcxhr_download_dsp(mgr, dsp); in pcxhr_load_dsp_binary()
446 return pcxhr_check_reg_bit(mgr, PCXHR_DSP_ISR, in pcxhr_load_dsp_binary()
532 static int pcxhr_read_rmh_status(struct pcxhr_mgr *mgr, struct pcxhr_rmh *rmh) in pcxhr_read_rmh_status() argument
547 err = pcxhr_check_reg_bit(mgr, PCXHR_DSP_ISR, in pcxhr_read_rmh_status()
552 dev_err(&mgr->pci->dev, in pcxhr_read_rmh_status()
558 data = PCXHR_INPB(mgr, PCXHR_DSP_TXH) << 16; in pcxhr_read_rmh_status()
559 data |= PCXHR_INPB(mgr, PCXHR_DSP_TXM) << 8; in pcxhr_read_rmh_status()
560 data |= PCXHR_INPB(mgr, PCXHR_DSP_TXL); in pcxhr_read_rmh_status()
582 dev_dbg(&mgr->pci->dev, " stat[%d]=%x\n", i, data); in pcxhr_read_rmh_status()
588 dev_dbg(&mgr->pci->dev, "PCXHR : rmh->stat_len=%x too big\n", in pcxhr_read_rmh_status()
595 static int pcxhr_send_msg_nolock(struct pcxhr_mgr *mgr, struct pcxhr_rmh *rmh) in pcxhr_send_msg_nolock() argument
604 err = pcxhr_send_it_dsp(mgr, PCXHR_IT_MESSAGE, 1); in pcxhr_send_msg_nolock()
606 dev_err(&mgr->pci->dev, in pcxhr_send_msg_nolock()
611 err = pcxhr_check_reg_bit(mgr, PCXHR_DSP_ISR, PCXHR_ISR_HI08_CHK, in pcxhr_send_msg_nolock()
616 err = pcxhr_send_it_dsp(mgr, PCXHR_IT_RESET_CHK, 1); in pcxhr_send_msg_nolock()
620 err = pcxhr_check_reg_bit(mgr, PCXHR_DSP_ISR, PCXHR_ISR_HI08_CHK, 0, in pcxhr_send_msg_nolock()
633 dev_dbg(&mgr->pci->dev, "MSG cmd[0]=%x (%s)\n", in pcxhr_send_msg_nolock()
637 err = pcxhr_check_reg_bit(mgr, PCXHR_DSP_ISR, PCXHR_ISR_HI08_TRDY, in pcxhr_send_msg_nolock()
641 PCXHR_OUTPB(mgr, PCXHR_DSP_TXH, (data>>16)&0xFF); in pcxhr_send_msg_nolock()
642 PCXHR_OUTPB(mgr, PCXHR_DSP_TXM, (data>>8)&0xFF); in pcxhr_send_msg_nolock()
643 PCXHR_OUTPB(mgr, PCXHR_DSP_TXL, (data&0xFF)); in pcxhr_send_msg_nolock()
648 err = pcxhr_check_reg_bit(mgr, PCXHR_DSP_ISR, in pcxhr_send_msg_nolock()
654 PCXHR_OUTPB(mgr, PCXHR_DSP_TXH, (data>>16)&0xFF); in pcxhr_send_msg_nolock()
655 PCXHR_OUTPB(mgr, PCXHR_DSP_TXM, (data>>8)&0xFF); in pcxhr_send_msg_nolock()
656 PCXHR_OUTPB(mgr, PCXHR_DSP_TXL, (data&0xFF)); in pcxhr_send_msg_nolock()
663 dev_dbg(&mgr->pci->dev, in pcxhr_send_msg_nolock()
666 err = pcxhr_check_reg_bit(mgr, PCXHR_DSP_ISR, in pcxhr_send_msg_nolock()
672 PCXHR_OUTPB(mgr, PCXHR_DSP_TXH, (data>>16)&0xFF); in pcxhr_send_msg_nolock()
673 PCXHR_OUTPB(mgr, PCXHR_DSP_TXM, (data>>8)&0xFF); in pcxhr_send_msg_nolock()
674 PCXHR_OUTPB(mgr, PCXHR_DSP_TXL, (data&0xFF)); in pcxhr_send_msg_nolock()
678 err = pcxhr_check_reg_bit(mgr, PCXHR_DSP_ISR, PCXHR_ISR_HI08_CHK, in pcxhr_send_msg_nolock()
685 err = pcxhr_check_reg_bit(mgr, PCXHR_DSP_ISR, in pcxhr_send_msg_nolock()
690 dev_err(&mgr->pci->dev, in pcxhr_send_msg_nolock()
695 data = PCXHR_INPB(mgr, PCXHR_DSP_TXH) << 16; in pcxhr_send_msg_nolock()
696 data |= PCXHR_INPB(mgr, PCXHR_DSP_TXM) << 8; in pcxhr_send_msg_nolock()
697 data |= PCXHR_INPB(mgr, PCXHR_DSP_TXL); in pcxhr_send_msg_nolock()
698 dev_err(&mgr->pci->dev, "ERROR RMH(%d): 0x%x\n", in pcxhr_send_msg_nolock()
703 err = pcxhr_read_rmh_status(mgr, rmh); in pcxhr_send_msg_nolock()
706 if (pcxhr_send_it_dsp(mgr, PCXHR_IT_RESET_SEMAPHORE, 1) < 0) in pcxhr_send_msg_nolock()
755 int pcxhr_send_msg(struct pcxhr_mgr *mgr, struct pcxhr_rmh *rmh) in pcxhr_send_msg() argument
759 mutex_lock(&mgr->msg_lock); in pcxhr_send_msg()
760 err = pcxhr_send_msg_nolock(mgr, rmh); in pcxhr_send_msg()
761 mutex_unlock(&mgr->msg_lock); in pcxhr_send_msg()
765 static inline int pcxhr_pipes_running(struct pcxhr_mgr *mgr) in pcxhr_pipes_running() argument
767 int start_mask = PCXHR_INPL(mgr, PCXHR_PLX_MBOX2); in pcxhr_pipes_running()
774 dev_dbg(&mgr->pci->dev, "CMD_PIPE_STATE MBOX2=0x%06x\n", start_mask); in pcxhr_pipes_running()
781 static int pcxhr_prepair_pipe_start(struct pcxhr_mgr *mgr, in pcxhr_prepair_pipe_start() argument
801 err = pcxhr_send_msg(mgr, &rmh); in pcxhr_prepair_pipe_start()
803 dev_err(&mgr->pci->dev, in pcxhr_prepair_pipe_start()
821 static int pcxhr_stop_pipes(struct pcxhr_mgr *mgr, int audio_mask) in pcxhr_stop_pipes() argument
839 err = pcxhr_send_msg(mgr, &rmh); in pcxhr_stop_pipes()
841 dev_err(&mgr->pci->dev, in pcxhr_stop_pipes()
853 static int pcxhr_toggle_pipes(struct pcxhr_mgr *mgr, int audio_mask) in pcxhr_toggle_pipes() argument
868 err = pcxhr_send_msg(mgr, &rmh); in pcxhr_toggle_pipes()
870 dev_err(&mgr->pci->dev, in pcxhr_toggle_pipes()
881 err = pcxhr_send_msg(mgr, &rmh); in pcxhr_toggle_pipes()
883 dev_err(&mgr->pci->dev, in pcxhr_toggle_pipes()
893 int pcxhr_set_pipe_state(struct pcxhr_mgr *mgr, int playback_mask, in pcxhr_set_pipe_state() argument
907 state = pcxhr_pipes_running(mgr); in pcxhr_set_pipe_state()
908 dev_dbg(&mgr->pci->dev, in pcxhr_set_pipe_state()
916 err = pcxhr_prepair_pipe_start(mgr, state, &state); in pcxhr_set_pipe_state()
929 err = pcxhr_toggle_pipes(mgr, audio_mask); in pcxhr_set_pipe_state()
935 state = pcxhr_pipes_running(mgr); in pcxhr_set_pipe_state()
940 dev_err(&mgr->pci->dev, "error pipe start/stop\n"); in pcxhr_set_pipe_state()
946 err = pcxhr_stop_pipes(mgr, audio_mask); in pcxhr_set_pipe_state()
953 dev_dbg(&mgr->pci->dev, "***SET PIPE STATE*** TIME = %ld (err = %x)\n", in pcxhr_set_pipe_state()
959 int pcxhr_write_io_num_reg_cont(struct pcxhr_mgr *mgr, unsigned int mask, in pcxhr_write_io_num_reg_cont() argument
965 mutex_lock(&mgr->msg_lock); in pcxhr_write_io_num_reg_cont()
966 if ((mgr->io_num_reg_cont & mask) == value) { in pcxhr_write_io_num_reg_cont()
967 dev_dbg(&mgr->pci->dev, in pcxhr_write_io_num_reg_cont()
972 mutex_unlock(&mgr->msg_lock); in pcxhr_write_io_num_reg_cont()
980 err = pcxhr_send_msg_nolock(mgr, &rmh); in pcxhr_write_io_num_reg_cont()
982 mgr->io_num_reg_cont &= ~mask; in pcxhr_write_io_num_reg_cont()
983 mgr->io_num_reg_cont |= value; in pcxhr_write_io_num_reg_cont()
987 mutex_unlock(&mgr->msg_lock); in pcxhr_write_io_num_reg_cont()
1005 static int pcxhr_handle_async_err(struct pcxhr_mgr *mgr, u32 err, in pcxhr_handle_async_err() argument
1021 dev_dbg(&mgr->pci->dev, "CMD_ASYNC : Error %s %s Pipe %d err=%x\n", in pcxhr_handle_async_err()
1025 mgr->async_err_stream_xrun++; in pcxhr_handle_async_err()
1027 mgr->async_err_pipe_xrun++; in pcxhr_handle_async_err()
1029 mgr->async_err_other_last = (int)err; in pcxhr_handle_async_err()
1034 static void pcxhr_msg_thread(struct pcxhr_mgr *mgr) in pcxhr_msg_thread() argument
1036 struct pcxhr_rmh *prmh = mgr->prmh; in pcxhr_msg_thread()
1040 if (mgr->src_it_dsp & PCXHR_IRQ_FREQ_CHANGE) in pcxhr_msg_thread()
1041 dev_dbg(&mgr->pci->dev, in pcxhr_msg_thread()
1043 if (mgr->src_it_dsp & PCXHR_IRQ_TIME_CODE) in pcxhr_msg_thread()
1044 dev_dbg(&mgr->pci->dev, in pcxhr_msg_thread()
1046 if (mgr->src_it_dsp & PCXHR_IRQ_NOTIFY) in pcxhr_msg_thread()
1047 dev_dbg(&mgr->pci->dev, in pcxhr_msg_thread()
1049 if (mgr->src_it_dsp & (PCXHR_IRQ_FREQ_CHANGE | PCXHR_IRQ_TIME_CODE)) { in pcxhr_msg_thread()
1052 err = pcxhr_send_msg(mgr, prmh); in pcxhr_msg_thread()
1053 dev_dbg(&mgr->pci->dev, "CMD_TEST_IT : err=%x, stat=%x\n", in pcxhr_msg_thread()
1056 if (mgr->src_it_dsp & PCXHR_IRQ_ASYNC) { in pcxhr_msg_thread()
1057 dev_dbg(&mgr->pci->dev, in pcxhr_msg_thread()
1064 err = pcxhr_send_msg(mgr, prmh); in pcxhr_msg_thread()
1066 dev_err(&mgr->pci->dev, "ERROR pcxhr_msg_thread=%x;\n", in pcxhr_msg_thread()
1079 dev_dbg(&mgr->pci->dev, in pcxhr_msg_thread()
1087 pcxhr_handle_async_err(mgr, err2, in pcxhr_msg_thread()
1095 pcxhr_handle_async_err(mgr, err2, in pcxhr_msg_thread()
1105 pcxhr_handle_async_err(mgr, err2, in pcxhr_msg_thread()
1115 static u_int64_t pcxhr_stream_read_position(struct pcxhr_mgr *mgr, in pcxhr_stream_read_position() argument
1130 err = pcxhr_send_msg(mgr, &rmh); in pcxhr_stream_read_position()
1137 dev_dbg(&mgr->pci->dev, in pcxhr_stream_read_position()
1143 mgr->granularity); in pcxhr_stream_read_position()
1147 static void pcxhr_update_timer_pos(struct pcxhr_mgr *mgr, in pcxhr_update_timer_pos() argument
1161 samples_to_add = mgr->granularity; in pcxhr_update_timer_pos()
1169 pcxhr_stream_read_position(mgr, stream); in pcxhr_update_timer_pos()
1171 if (new_sample_count >= mgr->granularity) { in pcxhr_update_timer_pos()
1176 new_sample_count -= mgr->granularity; in pcxhr_update_timer_pos()
1204 dev_err(&mgr->pci->dev, in pcxhr_update_timer_pos()
1210 mutex_unlock(&mgr->lock); in pcxhr_update_timer_pos()
1212 mutex_lock(&mgr->lock); in pcxhr_update_timer_pos()
1219 struct pcxhr_mgr *mgr = dev_id; in pcxhr_interrupt() local
1223 reg = PCXHR_INPL(mgr, PCXHR_PLX_IRQCS); in pcxhr_interrupt()
1230 reg = PCXHR_INPL(mgr, PCXHR_PLX_L2PCIDB); in pcxhr_interrupt()
1231 PCXHR_OUTPL(mgr, PCXHR_PLX_L2PCIDB, reg); in pcxhr_interrupt()
1236 if (timer_toggle == mgr->timer_toggle) { in pcxhr_interrupt()
1237 dev_dbg(&mgr->pci->dev, "ERROR TIMER TOGGLE\n"); in pcxhr_interrupt()
1238 mgr->dsp_time_err++; in pcxhr_interrupt()
1241 mgr->timer_toggle = timer_toggle; in pcxhr_interrupt()
1242 mgr->src_it_dsp = reg; in pcxhr_interrupt()
1253 mgr->dsp_time_last = PCXHR_DSP_TIME_INVALID; in pcxhr_interrupt()
1255 mgr->src_it_dsp = reg; in pcxhr_interrupt()
1260 dev_dbg(&mgr->pci->dev, "FATAL DSP ERROR : %x\n", reg); in pcxhr_interrupt()
1268 struct pcxhr_mgr *mgr = dev_id; in pcxhr_threaded_irq() local
1272 mutex_lock(&mgr->lock); in pcxhr_threaded_irq()
1273 if (mgr->src_it_dsp & PCXHR_IRQ_TIMER) { in pcxhr_threaded_irq()
1276 PCXHR_INPL(mgr, PCXHR_PLX_MBOX4) & PCXHR_DSP_TIME_MASK; in pcxhr_threaded_irq()
1277 int dsp_time_diff = dsp_time_new - mgr->dsp_time_last; in pcxhr_threaded_irq()
1280 (mgr->dsp_time_last != PCXHR_DSP_TIME_INVALID)) { in pcxhr_threaded_irq()
1283 dev_dbg(&mgr->pci->dev, in pcxhr_threaded_irq()
1285 mgr->dsp_time_last, dsp_time_new); in pcxhr_threaded_irq()
1286 if (tmp_diff > 0 && tmp_diff <= (2*mgr->granularity)) { in pcxhr_threaded_irq()
1287 dev_dbg(&mgr->pci->dev, in pcxhr_threaded_irq()
1292 dev_dbg(&mgr->pci->dev, in pcxhr_threaded_irq()
1294 mgr->dsp_time_err++; in pcxhr_threaded_irq()
1299 dev_dbg(&mgr->pci->dev, in pcxhr_threaded_irq()
1302 else if (dsp_time_diff >= (2*mgr->granularity)) in pcxhr_threaded_irq()
1303 dev_dbg(&mgr->pci->dev, in pcxhr_threaded_irq()
1305 mgr->dsp_time_last, in pcxhr_threaded_irq()
1306 dsp_time_new - mgr->dsp_time_last); in pcxhr_threaded_irq()
1307 else if (dsp_time_diff % mgr->granularity) in pcxhr_threaded_irq()
1308 dev_dbg(&mgr->pci->dev, in pcxhr_threaded_irq()
1312 mgr->dsp_time_last = dsp_time_new; in pcxhr_threaded_irq()
1314 for (i = 0; i < mgr->num_cards; i++) { in pcxhr_threaded_irq()
1315 chip = mgr->chip[i]; in pcxhr_threaded_irq()
1317 pcxhr_update_timer_pos(mgr, in pcxhr_threaded_irq()
1321 for (i = 0; i < mgr->num_cards; i++) { in pcxhr_threaded_irq()
1322 chip = mgr->chip[i]; in pcxhr_threaded_irq()
1324 pcxhr_update_timer_pos(mgr, in pcxhr_threaded_irq()
1330 pcxhr_msg_thread(mgr); in pcxhr_threaded_irq()
1331 mutex_unlock(&mgr->lock); in pcxhr_threaded_irq()