151 #define catpt_writel_ssp(cdev, ssp, reg, val) \  argument
152 	writel(val, catpt_ssp_addr(cdev, ssp) + (reg))
154 #define catpt_readl_shim(cdev, reg) \  argument
155 	readl(catpt_shim_addr(cdev) + CATPT_SHIM_##reg)
156 #define catpt_writel_shim(cdev, reg, val) \  argument
157 	writel(val, catpt_shim_addr(cdev) + CATPT_SHIM_##reg)
158 #define catpt_updatel_shim(cdev, reg, mask, val) \  argument
159 	catpt_writel_shim(cdev, reg, \
160 			  (catpt_readl_shim(cdev, reg) & ~(mask)) | (val))
162 #define catpt_readl_poll_shim(cdev, reg, val, cond, delay_us, timeout_us) \  argument
163 	readl_poll_timeout(catpt_shim_addr(cdev) + CATPT_SHIM_##reg, \
166 #define catpt_readl_pci(cdev, reg) \  argument
167 	readl(cdev->pci_ba + CATPT_PCI_##reg)
168 #define catpt_writel_pci(cdev, reg, val) \  argument
169 	writel(val, cdev->pci_ba + CATPT_PCI_##reg)
170 #define catpt_updatel_pci(cdev, reg, mask, val) \  argument
171 	catpt_writel_pci(cdev, reg, \
172 			 (catpt_readl_pci(cdev, reg) & ~(mask)) | (val))
174 #define catpt_readl_poll_pci(cdev, reg, val, cond, delay_us, timeout_us) \  argument
175 	readl_poll_timeout((cdev)->pci_ba + CATPT_PCI_##reg, \