Lines Matching refs:id
103 static const char *core_id_to_str(__u64 id) in core_id_to_str() argument
105 __u64 core_off = id & ~REG_MASK, idx; in core_id_to_str()
142 TEST_FAIL("Unknown core reg id: 0x%llx", id); in core_id_to_str()
146 static const char *sve_id_to_str(__u64 id) in sve_id_to_str() argument
150 if (id == KVM_REG_ARM64_SVE_VLS) in sve_id_to_str()
153 sve_off = id & ~(REG_MASK | ((1ULL << 5) - 1)); in sve_id_to_str()
154 i = id & (KVM_ARM64_SVE_MAX_SLICES - 1); in sve_id_to_str()
156 TEST_ASSERT(i == 0, "Currently we don't expect slice > 0, reg id 0x%llx", id); in sve_id_to_str()
161 n = (id >> 5) & (KVM_ARM64_SVE_NUM_ZREGS - 1); in sve_id_to_str()
162 TEST_ASSERT(id == KVM_REG_ARM64_SVE_ZREG(n, 0), in sve_id_to_str()
163 "Unexpected bits set in SVE ZREG id: 0x%llx", id); in sve_id_to_str()
167 n = (id >> 5) & (KVM_ARM64_SVE_NUM_PREGS - 1); in sve_id_to_str()
168 TEST_ASSERT(id == KVM_REG_ARM64_SVE_PREG(n, 0), in sve_id_to_str()
169 "Unexpected bits set in SVE PREG id: 0x%llx", id); in sve_id_to_str()
172 TEST_ASSERT(id == KVM_REG_ARM64_SVE_FFR(0), in sve_id_to_str()
173 "Unexpected bits set in SVE FFR id: 0x%llx", id); in sve_id_to_str()
180 static void print_reg(__u64 id) in print_reg() argument
185 TEST_ASSERT((id & KVM_REG_ARCH_MASK) == KVM_REG_ARM64, in print_reg()
186 "KVM_REG_ARM64 missing in reg id: 0x%llx", id); in print_reg()
188 switch (id & KVM_REG_SIZE_MASK) { in print_reg()
218 (id & KVM_REG_SIZE_MASK) >> KVM_REG_SIZE_SHIFT, id); in print_reg()
221 switch (id & KVM_REG_ARM_COPROC_MASK) { in print_reg()
223 printf("\tKVM_REG_ARM64 | %s | KVM_REG_ARM_CORE | %s,\n", reg_size, core_id_to_str(id)); in print_reg()
226 TEST_ASSERT(!(id & ~(REG_MASK | KVM_REG_ARM_DEMUX_ID_MASK | KVM_REG_ARM_DEMUX_VAL_MASK)), in print_reg()
227 "Unexpected bits set in DEMUX reg id: 0x%llx", id); in print_reg()
229 reg_size, id & KVM_REG_ARM_DEMUX_VAL_MASK); in print_reg()
232 op0 = (id & KVM_REG_ARM64_SYSREG_OP0_MASK) >> KVM_REG_ARM64_SYSREG_OP0_SHIFT; in print_reg()
233 op1 = (id & KVM_REG_ARM64_SYSREG_OP1_MASK) >> KVM_REG_ARM64_SYSREG_OP1_SHIFT; in print_reg()
234 crn = (id & KVM_REG_ARM64_SYSREG_CRN_MASK) >> KVM_REG_ARM64_SYSREG_CRN_SHIFT; in print_reg()
235 crm = (id & KVM_REG_ARM64_SYSREG_CRM_MASK) >> KVM_REG_ARM64_SYSREG_CRM_SHIFT; in print_reg()
236 op2 = (id & KVM_REG_ARM64_SYSREG_OP2_MASK) >> KVM_REG_ARM64_SYSREG_OP2_SHIFT; in print_reg()
237 TEST_ASSERT(id == ARM64_SYS_REG(op0, op1, crn, crm, op2), in print_reg()
238 "Unexpected bits set in SYSREG reg id: 0x%llx", id); in print_reg()
242 TEST_ASSERT(id == KVM_REG_ARM_FW_REG(id & 0xffff), in print_reg()
243 "Unexpected bits set in FW reg id: 0x%llx", id); in print_reg()
244 printf("\tKVM_REG_ARM_FW_REG(%lld),\n", id & 0xffff); in print_reg()
248 printf("\t%s,\n", sve_id_to_str(id)); in print_reg()
250 TEST_FAIL("KVM_REG_ARM64_SVE is an unexpected coproc type in reg id: 0x%llx", id); in print_reg()
254 (id & KVM_REG_ARM_COPROC_MASK) >> KVM_REG_ARM_COPROC_SHIFT, id); in print_reg()
267 __u64 id, core_off; in core_reg_fixup() local
273 id = reg_list->reg[i]; in core_reg_fixup()
275 if ((id & KVM_REG_ARM_COPROC_MASK) != KVM_REG_ARM_CORE) { in core_reg_fixup()
276 tmp->reg[tmp->n++] = id; in core_reg_fixup()
280 core_off = id & ~REG_MASK; in core_reg_fixup()
293 id &= ~KVM_REG_SIZE_MASK; in core_reg_fixup()
294 id |= KVM_REG_SIZE_U128; in core_reg_fixup()
295 tmp->reg[tmp->n++] = id; in core_reg_fixup()
299 id &= ~KVM_REG_SIZE_MASK; in core_reg_fixup()
300 id |= KVM_REG_SIZE_U32; in core_reg_fixup()
301 tmp->reg[tmp->n++] = id; in core_reg_fixup()
306 tmp->reg[tmp->n++] = id; in core_reg_fixup()
374 __u64 id = reg_list->reg[i]; in main() local
375 if ((print_list && !filter_reg(id)) || in main()
376 (print_filtered && filter_reg(id))) in main()
377 print_reg(id); in main()
396 .id = reg_list->reg[i], in main()
404 print_reg(reg.id); in main()
410 if (find_reg(rejects_set, rejects_set_n, reg.id)) { in main()
414 print_reg(reg.id); in main()
424 print_reg(reg.id); in main()