1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2
3 /*
4 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
5 * Copyright 2003-2004 Jeff Garzik
6 *
7 * libata documentation is available via 'make {ps|pdf}docs',
8 * as Documentation/driver-api/libata.rst
9 *
10 * Hardware documentation available from http://www.t13.org/
11 */
12
13 #ifndef __LINUX_ATA_H__
14 #define __LINUX_ATA_H__
15
16 #include <linux/kernel.h>
17 #include <linux/string.h>
18 #include <linux/types.h>
19 #include <asm/byteorder.h>
20
21 /* defines only for the constants which don't work well as enums */
22 #define ATA_DMA_BOUNDARY 0xffffUL
23 #define ATA_DMA_MASK 0xffffffffULL
24
25 enum {
26 /* various global constants */
27 ATA_MAX_DEVICES = 2, /* per bus/port */
28 ATA_MAX_PRD = 256, /* we could make these 256/256 */
29 ATA_SECT_SIZE = 512,
30 ATA_MAX_SECTORS_128 = 128,
31 ATA_MAX_SECTORS = 256,
32 ATA_MAX_SECTORS_1024 = 1024,
33 ATA_MAX_SECTORS_LBA48 = 65535,/* avoid count to be 0000h */
34 ATA_MAX_SECTORS_TAPE = 65535,
35 ATA_MAX_TRIM_RNUM = 64, /* 512-byte payload / (6-byte LBA + 2-byte range per entry) */
36
37 ATA_ID_WORDS = 256,
38 ATA_ID_CONFIG = 0,
39 ATA_ID_CYLS = 1,
40 ATA_ID_HEADS = 3,
41 ATA_ID_SECTORS = 6,
42 ATA_ID_SERNO = 10,
43 ATA_ID_BUF_SIZE = 21,
44 ATA_ID_FW_REV = 23,
45 ATA_ID_PROD = 27,
46 ATA_ID_MAX_MULTSECT = 47,
47 ATA_ID_DWORD_IO = 48, /* before ATA-8 */
48 ATA_ID_TRUSTED = 48, /* ATA-8 and later */
49 ATA_ID_CAPABILITY = 49,
50 ATA_ID_OLD_PIO_MODES = 51,
51 ATA_ID_OLD_DMA_MODES = 52,
52 ATA_ID_FIELD_VALID = 53,
53 ATA_ID_CUR_CYLS = 54,
54 ATA_ID_CUR_HEADS = 55,
55 ATA_ID_CUR_SECTORS = 56,
56 ATA_ID_MULTSECT = 59,
57 ATA_ID_LBA_CAPACITY = 60,
58 ATA_ID_SWDMA_MODES = 62,
59 ATA_ID_MWDMA_MODES = 63,
60 ATA_ID_PIO_MODES = 64,
61 ATA_ID_EIDE_DMA_MIN = 65,
62 ATA_ID_EIDE_DMA_TIME = 66,
63 ATA_ID_EIDE_PIO = 67,
64 ATA_ID_EIDE_PIO_IORDY = 68,
65 ATA_ID_ADDITIONAL_SUPP = 69,
66 ATA_ID_QUEUE_DEPTH = 75,
67 ATA_ID_SATA_CAPABILITY = 76,
68 ATA_ID_SATA_CAPABILITY_2 = 77,
69 ATA_ID_FEATURE_SUPP = 78,
70 ATA_ID_MAJOR_VER = 80,
71 ATA_ID_COMMAND_SET_1 = 82,
72 ATA_ID_COMMAND_SET_2 = 83,
73 ATA_ID_CFSSE = 84,
74 ATA_ID_CFS_ENABLE_1 = 85,
75 ATA_ID_CFS_ENABLE_2 = 86,
76 ATA_ID_CSF_DEFAULT = 87,
77 ATA_ID_UDMA_MODES = 88,
78 ATA_ID_HW_CONFIG = 93,
79 ATA_ID_SPG = 98,
80 ATA_ID_LBA_CAPACITY_2 = 100,
81 ATA_ID_SECTOR_SIZE = 106,
82 ATA_ID_WWN = 108,
83 ATA_ID_LOGICAL_SECTOR_SIZE = 117, /* and 118 */
84 ATA_ID_COMMAND_SET_3 = 119,
85 ATA_ID_COMMAND_SET_4 = 120,
86 ATA_ID_LAST_LUN = 126,
87 ATA_ID_DLF = 128,
88 ATA_ID_CSFO = 129,
89 ATA_ID_CFA_POWER = 160,
90 ATA_ID_CFA_KEY_MGMT = 162,
91 ATA_ID_CFA_MODES = 163,
92 ATA_ID_DATA_SET_MGMT = 169,
93 ATA_ID_SCT_CMD_XPORT = 206,
94 ATA_ID_ROT_SPEED = 217,
95 ATA_ID_PIO4 = (1 << 1),
96
97 ATA_ID_SERNO_LEN = 20,
98 ATA_ID_FW_REV_LEN = 8,
99 ATA_ID_PROD_LEN = 40,
100 ATA_ID_WWN_LEN = 8,
101
102 ATA_PCI_CTL_OFS = 2,
103
104 ATA_PIO0 = (1 << 0),
105 ATA_PIO1 = ATA_PIO0 | (1 << 1),
106 ATA_PIO2 = ATA_PIO1 | (1 << 2),
107 ATA_PIO3 = ATA_PIO2 | (1 << 3),
108 ATA_PIO4 = ATA_PIO3 | (1 << 4),
109 ATA_PIO5 = ATA_PIO4 | (1 << 5),
110 ATA_PIO6 = ATA_PIO5 | (1 << 6),
111
112 ATA_PIO4_ONLY = (1 << 4),
113
114 ATA_SWDMA0 = (1 << 0),
115 ATA_SWDMA1 = ATA_SWDMA0 | (1 << 1),
116 ATA_SWDMA2 = ATA_SWDMA1 | (1 << 2),
117
118 ATA_SWDMA2_ONLY = (1 << 2),
119
120 ATA_MWDMA0 = (1 << 0),
121 ATA_MWDMA1 = ATA_MWDMA0 | (1 << 1),
122 ATA_MWDMA2 = ATA_MWDMA1 | (1 << 2),
123 ATA_MWDMA3 = ATA_MWDMA2 | (1 << 3),
124 ATA_MWDMA4 = ATA_MWDMA3 | (1 << 4),
125
126 ATA_MWDMA12_ONLY = (1 << 1) | (1 << 2),
127 ATA_MWDMA2_ONLY = (1 << 2),
128
129 ATA_UDMA0 = (1 << 0),
130 ATA_UDMA1 = ATA_UDMA0 | (1 << 1),
131 ATA_UDMA2 = ATA_UDMA1 | (1 << 2),
132 ATA_UDMA3 = ATA_UDMA2 | (1 << 3),
133 ATA_UDMA4 = ATA_UDMA3 | (1 << 4),
134 ATA_UDMA5 = ATA_UDMA4 | (1 << 5),
135 ATA_UDMA6 = ATA_UDMA5 | (1 << 6),
136 ATA_UDMA7 = ATA_UDMA6 | (1 << 7),
137 /* ATA_UDMA7 is just for completeness... doesn't exist (yet?). */
138
139 ATA_UDMA24_ONLY = (1 << 2) | (1 << 4),
140
141 ATA_UDMA_MASK_40C = ATA_UDMA2, /* udma0-2 */
142
143 /* DMA-related */
144 ATA_PRD_SZ = 8,
145 ATA_PRD_TBL_SZ = (ATA_MAX_PRD * ATA_PRD_SZ),
146 ATA_PRD_EOT = (1 << 31), /* end-of-table flag */
147
148 ATA_DMA_TABLE_OFS = 4,
149 ATA_DMA_STATUS = 2,
150 ATA_DMA_CMD = 0,
151 ATA_DMA_WR = (1 << 3),
152 ATA_DMA_START = (1 << 0),
153 ATA_DMA_INTR = (1 << 2),
154 ATA_DMA_ERR = (1 << 1),
155 ATA_DMA_ACTIVE = (1 << 0),
156
157 /* bits in ATA command block registers */
158 ATA_HOB = (1 << 7), /* LBA48 selector */
159 ATA_NIEN = (1 << 1), /* disable-irq flag */
160 ATA_LBA = (1 << 6), /* LBA28 selector */
161 ATA_DEV1 = (1 << 4), /* Select Device 1 (slave) */
162 ATA_DEVICE_OBS = (1 << 7) | (1 << 5), /* obs bits in dev reg */
163 ATA_DEVCTL_OBS = (1 << 3), /* obsolete bit in devctl reg */
164 ATA_BUSY = (1 << 7), /* BSY status bit */
165 ATA_DRDY = (1 << 6), /* device ready */
166 ATA_DF = (1 << 5), /* device fault */
167 ATA_DSC = (1 << 4), /* drive seek complete */
168 ATA_DRQ = (1 << 3), /* data request i/o */
169 ATA_CORR = (1 << 2), /* corrected data error */
170 ATA_SENSE = (1 << 1), /* sense code available */
171 ATA_ERR = (1 << 0), /* have an error */
172 ATA_SRST = (1 << 2), /* software reset */
173 ATA_ICRC = (1 << 7), /* interface CRC error */
174 ATA_BBK = ATA_ICRC, /* pre-EIDE: block marked bad */
175 ATA_UNC = (1 << 6), /* uncorrectable media error */
176 ATA_MC = (1 << 5), /* media changed */
177 ATA_IDNF = (1 << 4), /* ID not found */
178 ATA_MCR = (1 << 3), /* media change requested */
179 ATA_ABORTED = (1 << 2), /* command aborted */
180 ATA_TRK0NF = (1 << 1), /* track 0 not found */
181 ATA_AMNF = (1 << 0), /* address mark not found */
182 ATAPI_LFS = 0xF0, /* last failed sense */
183 ATAPI_EOM = ATA_TRK0NF, /* end of media */
184 ATAPI_ILI = ATA_AMNF, /* illegal length indication */
185 ATAPI_IO = (1 << 1),
186 ATAPI_COD = (1 << 0),
187
188 /* ATA command block registers */
189 ATA_REG_DATA = 0x00,
190 ATA_REG_ERR = 0x01,
191 ATA_REG_NSECT = 0x02,
192 ATA_REG_LBAL = 0x03,
193 ATA_REG_LBAM = 0x04,
194 ATA_REG_LBAH = 0x05,
195 ATA_REG_DEVICE = 0x06,
196 ATA_REG_STATUS = 0x07,
197
198 ATA_REG_FEATURE = ATA_REG_ERR, /* and their aliases */
199 ATA_REG_CMD = ATA_REG_STATUS,
200 ATA_REG_BYTEL = ATA_REG_LBAM,
201 ATA_REG_BYTEH = ATA_REG_LBAH,
202 ATA_REG_DEVSEL = ATA_REG_DEVICE,
203 ATA_REG_IRQ = ATA_REG_NSECT,
204
205 /* ATA device commands */
206 ATA_CMD_DEV_RESET = 0x08, /* ATAPI device reset */
207 ATA_CMD_CHK_POWER = 0xE5, /* check power mode */
208 ATA_CMD_STANDBY = 0xE2, /* place in standby power mode */
209 ATA_CMD_IDLE = 0xE3, /* place in idle power mode */
210 ATA_CMD_EDD = 0x90, /* execute device diagnostic */
211 ATA_CMD_DOWNLOAD_MICRO = 0x92,
212 ATA_CMD_DOWNLOAD_MICRO_DMA = 0x93,
213 ATA_CMD_NOP = 0x00,
214 ATA_CMD_FLUSH = 0xE7,
215 ATA_CMD_FLUSH_EXT = 0xEA,
216 ATA_CMD_ID_ATA = 0xEC,
217 ATA_CMD_ID_ATAPI = 0xA1,
218 ATA_CMD_SERVICE = 0xA2,
219 ATA_CMD_READ = 0xC8,
220 ATA_CMD_READ_EXT = 0x25,
221 ATA_CMD_READ_QUEUED = 0x26,
222 ATA_CMD_READ_STREAM_EXT = 0x2B,
223 ATA_CMD_READ_STREAM_DMA_EXT = 0x2A,
224 ATA_CMD_WRITE = 0xCA,
225 ATA_CMD_WRITE_EXT = 0x35,
226 ATA_CMD_WRITE_QUEUED = 0x36,
227 ATA_CMD_WRITE_STREAM_EXT = 0x3B,
228 ATA_CMD_WRITE_STREAM_DMA_EXT = 0x3A,
229 ATA_CMD_WRITE_FUA_EXT = 0x3D,
230 ATA_CMD_WRITE_QUEUED_FUA_EXT = 0x3E,
231 ATA_CMD_FPDMA_READ = 0x60,
232 ATA_CMD_FPDMA_WRITE = 0x61,
233 ATA_CMD_NCQ_NON_DATA = 0x63,
234 ATA_CMD_FPDMA_SEND = 0x64,
235 ATA_CMD_FPDMA_RECV = 0x65,
236 ATA_CMD_PIO_READ = 0x20,
237 ATA_CMD_PIO_READ_EXT = 0x24,
238 ATA_CMD_PIO_WRITE = 0x30,
239 ATA_CMD_PIO_WRITE_EXT = 0x34,
240 ATA_CMD_READ_MULTI = 0xC4,
241 ATA_CMD_READ_MULTI_EXT = 0x29,
242 ATA_CMD_WRITE_MULTI = 0xC5,
243 ATA_CMD_WRITE_MULTI_EXT = 0x39,
244 ATA_CMD_WRITE_MULTI_FUA_EXT = 0xCE,
245 ATA_CMD_SET_FEATURES = 0xEF,
246 ATA_CMD_SET_MULTI = 0xC6,
247 ATA_CMD_PACKET = 0xA0,
248 ATA_CMD_VERIFY = 0x40,
249 ATA_CMD_VERIFY_EXT = 0x42,
250 ATA_CMD_WRITE_UNCORR_EXT = 0x45,
251 ATA_CMD_STANDBYNOW1 = 0xE0,
252 ATA_CMD_IDLEIMMEDIATE = 0xE1,
253 ATA_CMD_SLEEP = 0xE6,
254 ATA_CMD_INIT_DEV_PARAMS = 0x91,
255 ATA_CMD_READ_NATIVE_MAX = 0xF8,
256 ATA_CMD_READ_NATIVE_MAX_EXT = 0x27,
257 ATA_CMD_SET_MAX = 0xF9,
258 ATA_CMD_SET_MAX_EXT = 0x37,
259 ATA_CMD_READ_LOG_EXT = 0x2F,
260 ATA_CMD_WRITE_LOG_EXT = 0x3F,
261 ATA_CMD_READ_LOG_DMA_EXT = 0x47,
262 ATA_CMD_WRITE_LOG_DMA_EXT = 0x57,
263 ATA_CMD_TRUSTED_NONDATA = 0x5B,
264 ATA_CMD_TRUSTED_RCV = 0x5C,
265 ATA_CMD_TRUSTED_RCV_DMA = 0x5D,
266 ATA_CMD_TRUSTED_SND = 0x5E,
267 ATA_CMD_TRUSTED_SND_DMA = 0x5F,
268 ATA_CMD_PMP_READ = 0xE4,
269 ATA_CMD_PMP_READ_DMA = 0xE9,
270 ATA_CMD_PMP_WRITE = 0xE8,
271 ATA_CMD_PMP_WRITE_DMA = 0xEB,
272 ATA_CMD_CONF_OVERLAY = 0xB1,
273 ATA_CMD_SEC_SET_PASS = 0xF1,
274 ATA_CMD_SEC_UNLOCK = 0xF2,
275 ATA_CMD_SEC_ERASE_PREP = 0xF3,
276 ATA_CMD_SEC_ERASE_UNIT = 0xF4,
277 ATA_CMD_SEC_FREEZE_LOCK = 0xF5,
278 ATA_CMD_SEC_DISABLE_PASS = 0xF6,
279 ATA_CMD_CONFIG_STREAM = 0x51,
280 ATA_CMD_SMART = 0xB0,
281 ATA_CMD_MEDIA_LOCK = 0xDE,
282 ATA_CMD_MEDIA_UNLOCK = 0xDF,
283 ATA_CMD_DSM = 0x06,
284 ATA_CMD_CHK_MED_CRD_TYP = 0xD1,
285 ATA_CMD_CFA_REQ_EXT_ERR = 0x03,
286 ATA_CMD_CFA_WRITE_NE = 0x38,
287 ATA_CMD_CFA_TRANS_SECT = 0x87,
288 ATA_CMD_CFA_ERASE = 0xC0,
289 ATA_CMD_CFA_WRITE_MULT_NE = 0xCD,
290 ATA_CMD_REQ_SENSE_DATA = 0x0B,
291 ATA_CMD_SANITIZE_DEVICE = 0xB4,
292 ATA_CMD_ZAC_MGMT_IN = 0x4A,
293 ATA_CMD_ZAC_MGMT_OUT = 0x9F,
294
295 /* marked obsolete in the ATA/ATAPI-7 spec */
296 ATA_CMD_RESTORE = 0x10,
297
298 /* Subcmds for ATA_CMD_FPDMA_RECV */
299 ATA_SUBCMD_FPDMA_RECV_RD_LOG_DMA_EXT = 0x01,
300 ATA_SUBCMD_FPDMA_RECV_ZAC_MGMT_IN = 0x02,
301
302 /* Subcmds for ATA_CMD_FPDMA_SEND */
303 ATA_SUBCMD_FPDMA_SEND_DSM = 0x00,
304 ATA_SUBCMD_FPDMA_SEND_WR_LOG_DMA_EXT = 0x02,
305
306 /* Subcmds for ATA_CMD_NCQ_NON_DATA */
307 ATA_SUBCMD_NCQ_NON_DATA_ABORT_QUEUE = 0x00,
308 ATA_SUBCMD_NCQ_NON_DATA_SET_FEATURES = 0x05,
309 ATA_SUBCMD_NCQ_NON_DATA_ZERO_EXT = 0x06,
310 ATA_SUBCMD_NCQ_NON_DATA_ZAC_MGMT_OUT = 0x07,
311
312 /* Subcmds for ATA_CMD_ZAC_MGMT_IN */
313 ATA_SUBCMD_ZAC_MGMT_IN_REPORT_ZONES = 0x00,
314
315 /* Subcmds for ATA_CMD_ZAC_MGMT_OUT */
316 ATA_SUBCMD_ZAC_MGMT_OUT_CLOSE_ZONE = 0x01,
317 ATA_SUBCMD_ZAC_MGMT_OUT_FINISH_ZONE = 0x02,
318 ATA_SUBCMD_ZAC_MGMT_OUT_OPEN_ZONE = 0x03,
319 ATA_SUBCMD_ZAC_MGMT_OUT_RESET_WRITE_POINTER = 0x04,
320
321 /* READ_LOG_EXT pages */
322 ATA_LOG_DIRECTORY = 0x0,
323 ATA_LOG_SATA_NCQ = 0x10,
324 ATA_LOG_NCQ_NON_DATA = 0x12,
325 ATA_LOG_NCQ_SEND_RECV = 0x13,
326 ATA_LOG_IDENTIFY_DEVICE = 0x30,
327
328 /* Identify device log pages: */
329 ATA_LOG_SECURITY = 0x06,
330 ATA_LOG_SATA_SETTINGS = 0x08,
331 ATA_LOG_ZONED_INFORMATION = 0x09,
332
333 /* Identify device SATA settings log:*/
334 ATA_LOG_DEVSLP_OFFSET = 0x30,
335 ATA_LOG_DEVSLP_SIZE = 0x08,
336 ATA_LOG_DEVSLP_MDAT = 0x00,
337 ATA_LOG_DEVSLP_MDAT_MASK = 0x1F,
338 ATA_LOG_DEVSLP_DETO = 0x01,
339 ATA_LOG_DEVSLP_VALID = 0x07,
340 ATA_LOG_DEVSLP_VALID_MASK = 0x80,
341 ATA_LOG_NCQ_PRIO_OFFSET = 0x09,
342
343 /* NCQ send and receive log */
344 ATA_LOG_NCQ_SEND_RECV_SUBCMDS_OFFSET = 0x00,
345 ATA_LOG_NCQ_SEND_RECV_SUBCMDS_DSM = (1 << 0),
346 ATA_LOG_NCQ_SEND_RECV_DSM_OFFSET = 0x04,
347 ATA_LOG_NCQ_SEND_RECV_DSM_TRIM = (1 << 0),
348 ATA_LOG_NCQ_SEND_RECV_RD_LOG_OFFSET = 0x08,
349 ATA_LOG_NCQ_SEND_RECV_RD_LOG_SUPPORTED = (1 << 0),
350 ATA_LOG_NCQ_SEND_RECV_WR_LOG_OFFSET = 0x0C,
351 ATA_LOG_NCQ_SEND_RECV_WR_LOG_SUPPORTED = (1 << 0),
352 ATA_LOG_NCQ_SEND_RECV_ZAC_MGMT_OFFSET = 0x10,
353 ATA_LOG_NCQ_SEND_RECV_ZAC_MGMT_OUT_SUPPORTED = (1 << 0),
354 ATA_LOG_NCQ_SEND_RECV_ZAC_MGMT_IN_SUPPORTED = (1 << 1),
355 ATA_LOG_NCQ_SEND_RECV_SIZE = 0x14,
356
357 /* NCQ Non-Data log */
358 ATA_LOG_NCQ_NON_DATA_SUBCMDS_OFFSET = 0x00,
359 ATA_LOG_NCQ_NON_DATA_ABORT_OFFSET = 0x00,
360 ATA_LOG_NCQ_NON_DATA_ABORT_NCQ = (1 << 0),
361 ATA_LOG_NCQ_NON_DATA_ABORT_ALL = (1 << 1),
362 ATA_LOG_NCQ_NON_DATA_ABORT_STREAMING = (1 << 2),
363 ATA_LOG_NCQ_NON_DATA_ABORT_NON_STREAMING = (1 << 3),
364 ATA_LOG_NCQ_NON_DATA_ABORT_SELECTED = (1 << 4),
365 ATA_LOG_NCQ_NON_DATA_ZAC_MGMT_OFFSET = 0x1C,
366 ATA_LOG_NCQ_NON_DATA_ZAC_MGMT_OUT = (1 << 0),
367 ATA_LOG_NCQ_NON_DATA_SIZE = 0x40,
368
369 /* READ/WRITE LONG (obsolete) */
370 ATA_CMD_READ_LONG = 0x22,
371 ATA_CMD_READ_LONG_ONCE = 0x23,
372 ATA_CMD_WRITE_LONG = 0x32,
373 ATA_CMD_WRITE_LONG_ONCE = 0x33,
374
375 /* SETFEATURES stuff */
376 SETFEATURES_XFER = 0x03,
377 XFER_UDMA_7 = 0x47,
378 XFER_UDMA_6 = 0x46,
379 XFER_UDMA_5 = 0x45,
380 XFER_UDMA_4 = 0x44,
381 XFER_UDMA_3 = 0x43,
382 XFER_UDMA_2 = 0x42,
383 XFER_UDMA_1 = 0x41,
384 XFER_UDMA_0 = 0x40,
385 XFER_MW_DMA_4 = 0x24, /* CFA only */
386 XFER_MW_DMA_3 = 0x23, /* CFA only */
387 XFER_MW_DMA_2 = 0x22,
388 XFER_MW_DMA_1 = 0x21,
389 XFER_MW_DMA_0 = 0x20,
390 XFER_SW_DMA_2 = 0x12,
391 XFER_SW_DMA_1 = 0x11,
392 XFER_SW_DMA_0 = 0x10,
393 XFER_PIO_6 = 0x0E, /* CFA only */
394 XFER_PIO_5 = 0x0D, /* CFA only */
395 XFER_PIO_4 = 0x0C,
396 XFER_PIO_3 = 0x0B,
397 XFER_PIO_2 = 0x0A,
398 XFER_PIO_1 = 0x09,
399 XFER_PIO_0 = 0x08,
400 XFER_PIO_SLOW = 0x00,
401
402 SETFEATURES_WC_ON = 0x02, /* Enable write cache */
403 SETFEATURES_WC_OFF = 0x82, /* Disable write cache */
404
405 SETFEATURES_RA_ON = 0xaa, /* Enable read look-ahead */
406 SETFEATURES_RA_OFF = 0x55, /* Disable read look-ahead */
407
408 /* Enable/Disable Automatic Acoustic Management */
409 SETFEATURES_AAM_ON = 0x42,
410 SETFEATURES_AAM_OFF = 0xC2,
411
412 SETFEATURES_SPINUP = 0x07, /* Spin-up drive */
413 SETFEATURES_SPINUP_TIMEOUT = 30000, /* 30s timeout for drive spin-up from PUIS */
414
415 SETFEATURES_SATA_ENABLE = 0x10, /* Enable use of SATA feature */
416 SETFEATURES_SATA_DISABLE = 0x90, /* Disable use of SATA feature */
417
418 /* SETFEATURE Sector counts for SATA features */
419 SATA_FPDMA_OFFSET = 0x01, /* FPDMA non-zero buffer offsets */
420 SATA_FPDMA_AA = 0x02, /* FPDMA Setup FIS Auto-Activate */
421 SATA_DIPM = 0x03, /* Device Initiated Power Management */
422 SATA_FPDMA_IN_ORDER = 0x04, /* FPDMA in-order data delivery */
423 SATA_AN = 0x05, /* Asynchronous Notification */
424 SATA_SSP = 0x06, /* Software Settings Preservation */
425 SATA_DEVSLP = 0x09, /* Device Sleep */
426
427 SETFEATURE_SENSE_DATA = 0xC3, /* Sense Data Reporting feature */
428
429 /* feature values for SET_MAX */
430 ATA_SET_MAX_ADDR = 0x00,
431 ATA_SET_MAX_PASSWD = 0x01,
432 ATA_SET_MAX_LOCK = 0x02,
433 ATA_SET_MAX_UNLOCK = 0x03,
434 ATA_SET_MAX_FREEZE_LOCK = 0x04,
435 ATA_SET_MAX_PASSWD_DMA = 0x05,
436 ATA_SET_MAX_UNLOCK_DMA = 0x06,
437
438 /* feature values for DEVICE CONFIGURATION OVERLAY */
439 ATA_DCO_RESTORE = 0xC0,
440 ATA_DCO_FREEZE_LOCK = 0xC1,
441 ATA_DCO_IDENTIFY = 0xC2,
442 ATA_DCO_SET = 0xC3,
443
444 /* feature values for SMART */
445 ATA_SMART_ENABLE = 0xD8,
446 ATA_SMART_READ_VALUES = 0xD0,
447 ATA_SMART_READ_THRESHOLDS = 0xD1,
448
449 /* feature values for Data Set Management */
450 ATA_DSM_TRIM = 0x01,
451
452 /* password used in LBA Mid / LBA High for executing SMART commands */
453 ATA_SMART_LBAM_PASS = 0x4F,
454 ATA_SMART_LBAH_PASS = 0xC2,
455
456 /* ATAPI stuff */
457 ATAPI_PKT_DMA = (1 << 0),
458 ATAPI_DMADIR = (1 << 2), /* ATAPI data dir:
459 0=to device, 1=to host */
460 ATAPI_CDB_LEN = 16,
461
462 /* PMP stuff */
463 SATA_PMP_MAX_PORTS = 15,
464 SATA_PMP_CTRL_PORT = 15,
465
466 SATA_PMP_GSCR_DWORDS = 128,
467 SATA_PMP_GSCR_PROD_ID = 0,
468 SATA_PMP_GSCR_REV = 1,
469 SATA_PMP_GSCR_PORT_INFO = 2,
470 SATA_PMP_GSCR_ERROR = 32,
471 SATA_PMP_GSCR_ERROR_EN = 33,
472 SATA_PMP_GSCR_FEAT = 64,
473 SATA_PMP_GSCR_FEAT_EN = 96,
474
475 SATA_PMP_PSCR_STATUS = 0,
476 SATA_PMP_PSCR_ERROR = 1,
477 SATA_PMP_PSCR_CONTROL = 2,
478
479 SATA_PMP_FEAT_BIST = (1 << 0),
480 SATA_PMP_FEAT_PMREQ = (1 << 1),
481 SATA_PMP_FEAT_DYNSSC = (1 << 2),
482 SATA_PMP_FEAT_NOTIFY = (1 << 3),
483
484 /* cable types */
485 ATA_CBL_NONE = 0,
486 ATA_CBL_PATA40 = 1,
487 ATA_CBL_PATA80 = 2,
488 ATA_CBL_PATA40_SHORT = 3, /* 40 wire cable to high UDMA spec */
489 ATA_CBL_PATA_UNK = 4, /* don't know, maybe 80c? */
490 ATA_CBL_PATA_IGN = 5, /* don't know, ignore cable handling */
491 ATA_CBL_SATA = 6,
492
493 /* SATA Status and Control Registers */
494 SCR_STATUS = 0,
495 SCR_ERROR = 1,
496 SCR_CONTROL = 2,
497 SCR_ACTIVE = 3,
498 SCR_NOTIFICATION = 4,
499
500 /* SError bits */
501 SERR_DATA_RECOVERED = (1 << 0), /* recovered data error */
502 SERR_COMM_RECOVERED = (1 << 1), /* recovered comm failure */
503 SERR_DATA = (1 << 8), /* unrecovered data error */
504 SERR_PERSISTENT = (1 << 9), /* persistent data/comm error */
505 SERR_PROTOCOL = (1 << 10), /* protocol violation */
506 SERR_INTERNAL = (1 << 11), /* host internal error */
507 SERR_PHYRDY_CHG = (1 << 16), /* PHY RDY changed */
508 SERR_PHY_INT_ERR = (1 << 17), /* PHY internal error */
509 SERR_COMM_WAKE = (1 << 18), /* Comm wake */
510 SERR_10B_8B_ERR = (1 << 19), /* 10b to 8b decode error */
511 SERR_DISPARITY = (1 << 20), /* Disparity */
512 SERR_CRC = (1 << 21), /* CRC error */
513 SERR_HANDSHAKE = (1 << 22), /* Handshake error */
514 SERR_LINK_SEQ_ERR = (1 << 23), /* Link sequence error */
515 SERR_TRANS_ST_ERROR = (1 << 24), /* Transport state trans. error */
516 SERR_UNRECOG_FIS = (1 << 25), /* Unrecognized FIS */
517 SERR_DEV_XCHG = (1 << 26), /* device exchanged */
518 };
519
520 enum ata_prot_flags {
521 /* protocol flags */
522 ATA_PROT_FLAG_PIO = (1 << 0), /* is PIO */
523 ATA_PROT_FLAG_DMA = (1 << 1), /* is DMA */
524 ATA_PROT_FLAG_NCQ = (1 << 2), /* is NCQ */
525 ATA_PROT_FLAG_ATAPI = (1 << 3), /* is ATAPI */
526
527 /* taskfile protocols */
528 ATA_PROT_UNKNOWN = (u8)-1,
529 ATA_PROT_NODATA = 0,
530 ATA_PROT_PIO = ATA_PROT_FLAG_PIO,
531 ATA_PROT_DMA = ATA_PROT_FLAG_DMA,
532 ATA_PROT_NCQ_NODATA = ATA_PROT_FLAG_NCQ,
533 ATA_PROT_NCQ = ATA_PROT_FLAG_DMA | ATA_PROT_FLAG_NCQ,
534 ATAPI_PROT_NODATA = ATA_PROT_FLAG_ATAPI,
535 ATAPI_PROT_PIO = ATA_PROT_FLAG_ATAPI | ATA_PROT_FLAG_PIO,
536 ATAPI_PROT_DMA = ATA_PROT_FLAG_ATAPI | ATA_PROT_FLAG_DMA,
537 };
538
539 enum ata_ioctls {
540 ATA_IOC_GET_IO32 = 0x309, /* HDIO_GET_32BIT */
541 ATA_IOC_SET_IO32 = 0x324, /* HDIO_SET_32BIT */
542 };
543
544 /* core structures */
545
546 struct ata_bmdma_prd {
547 __le32 addr;
548 __le32 flags_len;
549 };
550
551 /*
552 * id tests
553 */
554 #define ata_id_is_ata(id) (((id)[ATA_ID_CONFIG] & (1 << 15)) == 0)
555 #define ata_id_has_lba(id) ((id)[ATA_ID_CAPABILITY] & (1 << 9))
556 #define ata_id_has_dma(id) ((id)[ATA_ID_CAPABILITY] & (1 << 8))
557 #define ata_id_has_ncq(id) ((id)[ATA_ID_SATA_CAPABILITY] & (1 << 8))
558 #define ata_id_queue_depth(id) (((id)[ATA_ID_QUEUE_DEPTH] & 0x1f) + 1)
559 #define ata_id_removable(id) ((id)[ATA_ID_CONFIG] & (1 << 7))
560 #define ata_id_has_atapi_AN(id) \
561 ((((id)[ATA_ID_SATA_CAPABILITY] != 0x0000) && \
562 ((id)[ATA_ID_SATA_CAPABILITY] != 0xffff)) && \
563 ((id)[ATA_ID_FEATURE_SUPP] & (1 << 5)))
564 #define ata_id_has_fpdma_aa(id) \
565 ((((id)[ATA_ID_SATA_CAPABILITY] != 0x0000) && \
566 ((id)[ATA_ID_SATA_CAPABILITY] != 0xffff)) && \
567 ((id)[ATA_ID_FEATURE_SUPP] & (1 << 2)))
568 #define ata_id_has_devslp(id) \
569 ((((id)[ATA_ID_SATA_CAPABILITY] != 0x0000) && \
570 ((id)[ATA_ID_SATA_CAPABILITY] != 0xffff)) && \
571 ((id)[ATA_ID_FEATURE_SUPP] & (1 << 8)))
572 #define ata_id_has_ncq_autosense(id) \
573 ((((id)[ATA_ID_SATA_CAPABILITY] != 0x0000) && \
574 ((id)[ATA_ID_SATA_CAPABILITY] != 0xffff)) && \
575 ((id)[ATA_ID_FEATURE_SUPP] & (1 << 7)))
576 #define ata_id_has_dipm(id) \
577 ((((id)[ATA_ID_SATA_CAPABILITY] != 0x0000) && \
578 ((id)[ATA_ID_SATA_CAPABILITY] != 0xffff)) && \
579 ((id)[ATA_ID_FEATURE_SUPP] & (1 << 3)))
580 #define ata_id_iordy_disable(id) ((id)[ATA_ID_CAPABILITY] & (1 << 10))
581 #define ata_id_has_iordy(id) ((id)[ATA_ID_CAPABILITY] & (1 << 11))
582 #define ata_id_u32(id,n) \
583 (((u32) (id)[(n) + 1] << 16) | ((u32) (id)[(n)]))
584 #define ata_id_u64(id,n) \
585 ( ((u64) (id)[(n) + 3] << 48) | \
586 ((u64) (id)[(n) + 2] << 32) | \
587 ((u64) (id)[(n) + 1] << 16) | \
588 ((u64) (id)[(n) + 0]) )
589
590 #define ata_id_cdb_intr(id) (((id)[ATA_ID_CONFIG] & 0x60) == 0x20)
591 #define ata_id_has_da(id) ((id)[ATA_ID_SATA_CAPABILITY_2] & (1 << 4))
592
ata_id_has_hipm(const u16 * id)593 static inline bool ata_id_has_hipm(const u16 *id)
594 {
595 u16 val = id[ATA_ID_SATA_CAPABILITY];
596
597 if (val == 0 || val == 0xffff)
598 return false;
599
600 return val & (1 << 9);
601 }
602
ata_id_has_fua(const u16 * id)603 static inline bool ata_id_has_fua(const u16 *id)
604 {
605 if ((id[ATA_ID_CFSSE] & 0xC000) != 0x4000)
606 return false;
607 return id[ATA_ID_CFSSE] & (1 << 6);
608 }
609
ata_id_has_flush(const u16 * id)610 static inline bool ata_id_has_flush(const u16 *id)
611 {
612 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
613 return false;
614 return id[ATA_ID_COMMAND_SET_2] & (1 << 12);
615 }
616
ata_id_flush_enabled(const u16 * id)617 static inline bool ata_id_flush_enabled(const u16 *id)
618 {
619 if (ata_id_has_flush(id) == 0)
620 return false;
621 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
622 return false;
623 return id[ATA_ID_CFS_ENABLE_2] & (1 << 12);
624 }
625
ata_id_has_flush_ext(const u16 * id)626 static inline bool ata_id_has_flush_ext(const u16 *id)
627 {
628 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
629 return false;
630 return id[ATA_ID_COMMAND_SET_2] & (1 << 13);
631 }
632
ata_id_flush_ext_enabled(const u16 * id)633 static inline bool ata_id_flush_ext_enabled(const u16 *id)
634 {
635 if (ata_id_has_flush_ext(id) == 0)
636 return false;
637 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
638 return false;
639 /*
640 * some Maxtor disks have bit 13 defined incorrectly
641 * so check bit 10 too
642 */
643 return (id[ATA_ID_CFS_ENABLE_2] & 0x2400) == 0x2400;
644 }
645
ata_id_logical_sector_size(const u16 * id)646 static inline u32 ata_id_logical_sector_size(const u16 *id)
647 {
648 /* T13/1699-D Revision 6a, Sep 6, 2008. Page 128.
649 * IDENTIFY DEVICE data, word 117-118.
650 * 0xd000 ignores bit 13 (logical:physical > 1)
651 */
652 if ((id[ATA_ID_SECTOR_SIZE] & 0xd000) == 0x5000)
653 return (((id[ATA_ID_LOGICAL_SECTOR_SIZE+1] << 16)
654 + id[ATA_ID_LOGICAL_SECTOR_SIZE]) * sizeof(u16)) ;
655 return ATA_SECT_SIZE;
656 }
657
ata_id_log2_per_physical_sector(const u16 * id)658 static inline u8 ata_id_log2_per_physical_sector(const u16 *id)
659 {
660 /* T13/1699-D Revision 6a, Sep 6, 2008. Page 128.
661 * IDENTIFY DEVICE data, word 106.
662 * 0xe000 ignores bit 12 (logical sector > 512 bytes)
663 */
664 if ((id[ATA_ID_SECTOR_SIZE] & 0xe000) == 0x6000)
665 return (id[ATA_ID_SECTOR_SIZE] & 0xf);
666 return 0;
667 }
668
669 /* Offset of logical sectors relative to physical sectors.
670 *
671 * If device has more than one logical sector per physical sector
672 * (aka 512 byte emulation), vendors might offset the "sector 0" address
673 * so sector 63 is "naturally aligned" - e.g. FAT partition table.
674 * This avoids Read/Mod/Write penalties when using FAT partition table
675 * and updating "well aligned" (FS perspective) physical sectors on every
676 * transaction.
677 */
ata_id_logical_sector_offset(const u16 * id,u8 log2_per_phys)678 static inline u16 ata_id_logical_sector_offset(const u16 *id,
679 u8 log2_per_phys)
680 {
681 u16 word_209 = id[209];
682
683 if ((log2_per_phys > 1) && (word_209 & 0xc000) == 0x4000) {
684 u16 first = word_209 & 0x3fff;
685 if (first > 0)
686 return (1 << log2_per_phys) - first;
687 }
688 return 0;
689 }
690
ata_id_has_lba48(const u16 * id)691 static inline bool ata_id_has_lba48(const u16 *id)
692 {
693 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
694 return false;
695 if (!ata_id_u64(id, ATA_ID_LBA_CAPACITY_2))
696 return false;
697 return id[ATA_ID_COMMAND_SET_2] & (1 << 10);
698 }
699
ata_id_lba48_enabled(const u16 * id)700 static inline bool ata_id_lba48_enabled(const u16 *id)
701 {
702 if (ata_id_has_lba48(id) == 0)
703 return false;
704 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
705 return false;
706 return id[ATA_ID_CFS_ENABLE_2] & (1 << 10);
707 }
708
ata_id_hpa_enabled(const u16 * id)709 static inline bool ata_id_hpa_enabled(const u16 *id)
710 {
711 /* Yes children, word 83 valid bits cover word 82 data */
712 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
713 return false;
714 /* And 87 covers 85-87 */
715 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
716 return false;
717 /* Check command sets enabled as well as supported */
718 if ((id[ATA_ID_CFS_ENABLE_1] & (1 << 10)) == 0)
719 return false;
720 return id[ATA_ID_COMMAND_SET_1] & (1 << 10);
721 }
722
ata_id_has_wcache(const u16 * id)723 static inline bool ata_id_has_wcache(const u16 *id)
724 {
725 /* Yes children, word 83 valid bits cover word 82 data */
726 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
727 return false;
728 return id[ATA_ID_COMMAND_SET_1] & (1 << 5);
729 }
730
ata_id_has_pm(const u16 * id)731 static inline bool ata_id_has_pm(const u16 *id)
732 {
733 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
734 return false;
735 return id[ATA_ID_COMMAND_SET_1] & (1 << 3);
736 }
737
ata_id_rahead_enabled(const u16 * id)738 static inline bool ata_id_rahead_enabled(const u16 *id)
739 {
740 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
741 return false;
742 return id[ATA_ID_CFS_ENABLE_1] & (1 << 6);
743 }
744
ata_id_wcache_enabled(const u16 * id)745 static inline bool ata_id_wcache_enabled(const u16 *id)
746 {
747 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
748 return false;
749 return id[ATA_ID_CFS_ENABLE_1] & (1 << 5);
750 }
751
ata_id_has_read_log_dma_ext(const u16 * id)752 static inline bool ata_id_has_read_log_dma_ext(const u16 *id)
753 {
754 /* Word 86 must have bit 15 set */
755 if (!(id[ATA_ID_CFS_ENABLE_2] & (1 << 15)))
756 return false;
757
758 /* READ LOG DMA EXT support can be signaled either from word 119
759 * or from word 120. The format is the same for both words: Bit
760 * 15 must be cleared, bit 14 set and bit 3 set.
761 */
762 if ((id[ATA_ID_COMMAND_SET_3] & 0xC008) == 0x4008 ||
763 (id[ATA_ID_COMMAND_SET_4] & 0xC008) == 0x4008)
764 return true;
765
766 return false;
767 }
768
ata_id_has_sense_reporting(const u16 * id)769 static inline bool ata_id_has_sense_reporting(const u16 *id)
770 {
771 if (!(id[ATA_ID_CFS_ENABLE_2] & BIT(15)))
772 return false;
773 if ((id[ATA_ID_COMMAND_SET_3] & (BIT(15) | BIT(14))) != BIT(14))
774 return false;
775 return id[ATA_ID_COMMAND_SET_3] & BIT(6);
776 }
777
ata_id_sense_reporting_enabled(const u16 * id)778 static inline bool ata_id_sense_reporting_enabled(const u16 *id)
779 {
780 if (!ata_id_has_sense_reporting(id))
781 return false;
782 /* ata_id_has_sense_reporting() == true, word 86 must have bit 15 set */
783 if ((id[ATA_ID_COMMAND_SET_4] & (BIT(15) | BIT(14))) != BIT(14))
784 return false;
785 return id[ATA_ID_COMMAND_SET_4] & BIT(6);
786 }
787
788 /**
789 *
790 * Word: 206 - SCT Command Transport
791 * 15:12 - Vendor Specific
792 * 11:6 - Reserved
793 * 5 - SCT Command Transport Data Tables supported
794 * 4 - SCT Command Transport Features Control supported
795 * 3 - SCT Command Transport Error Recovery Control supported
796 * 2 - SCT Command Transport Write Same supported
797 * 1 - SCT Command Transport Long Sector Access supported
798 * 0 - SCT Command Transport supported
799 */
ata_id_sct_data_tables(const u16 * id)800 static inline bool ata_id_sct_data_tables(const u16 *id)
801 {
802 return id[ATA_ID_SCT_CMD_XPORT] & (1 << 5) ? true : false;
803 }
804
ata_id_sct_features_ctrl(const u16 * id)805 static inline bool ata_id_sct_features_ctrl(const u16 *id)
806 {
807 return id[ATA_ID_SCT_CMD_XPORT] & (1 << 4) ? true : false;
808 }
809
ata_id_sct_error_recovery_ctrl(const u16 * id)810 static inline bool ata_id_sct_error_recovery_ctrl(const u16 *id)
811 {
812 return id[ATA_ID_SCT_CMD_XPORT] & (1 << 3) ? true : false;
813 }
814
ata_id_sct_long_sector_access(const u16 * id)815 static inline bool ata_id_sct_long_sector_access(const u16 *id)
816 {
817 return id[ATA_ID_SCT_CMD_XPORT] & (1 << 1) ? true : false;
818 }
819
ata_id_sct_supported(const u16 * id)820 static inline bool ata_id_sct_supported(const u16 *id)
821 {
822 return id[ATA_ID_SCT_CMD_XPORT] & (1 << 0) ? true : false;
823 }
824
825 /**
826 * ata_id_major_version - get ATA level of drive
827 * @id: Identify data
828 *
829 * Caveats:
830 * ATA-1 considers identify optional
831 * ATA-2 introduces mandatory identify
832 * ATA-3 introduces word 80 and accurate reporting
833 *
834 * The practical impact of this is that ata_id_major_version cannot
835 * reliably report on drives below ATA3.
836 */
837
ata_id_major_version(const u16 * id)838 static inline unsigned int ata_id_major_version(const u16 *id)
839 {
840 unsigned int mver;
841
842 if (id[ATA_ID_MAJOR_VER] == 0xFFFF)
843 return 0;
844
845 for (mver = 14; mver >= 1; mver--)
846 if (id[ATA_ID_MAJOR_VER] & (1 << mver))
847 break;
848 return mver;
849 }
850
ata_id_is_sata(const u16 * id)851 static inline bool ata_id_is_sata(const u16 *id)
852 {
853 /*
854 * See if word 93 is 0 AND drive is at least ATA-5 compatible
855 * verifying that word 80 by casting it to a signed type --
856 * this trick allows us to filter out the reserved values of
857 * 0x0000 and 0xffff along with the earlier ATA revisions...
858 */
859 if (id[ATA_ID_HW_CONFIG] == 0 && (short)id[ATA_ID_MAJOR_VER] >= 0x0020)
860 return true;
861 return false;
862 }
863
ata_id_has_tpm(const u16 * id)864 static inline bool ata_id_has_tpm(const u16 *id)
865 {
866 /* The TPM bits are only valid on ATA8 */
867 if (ata_id_major_version(id) < 8)
868 return false;
869 if ((id[48] & 0xC000) != 0x4000)
870 return false;
871 return id[48] & (1 << 0);
872 }
873
ata_id_has_dword_io(const u16 * id)874 static inline bool ata_id_has_dword_io(const u16 *id)
875 {
876 /* ATA 8 reuses this flag for "trusted" computing */
877 if (ata_id_major_version(id) > 7)
878 return false;
879 return id[ATA_ID_DWORD_IO] & (1 << 0);
880 }
881
ata_id_has_trusted(const u16 * id)882 static inline bool ata_id_has_trusted(const u16 *id)
883 {
884 if (ata_id_major_version(id) <= 7)
885 return false;
886 return id[ATA_ID_TRUSTED] & (1 << 0);
887 }
888
ata_id_has_unload(const u16 * id)889 static inline bool ata_id_has_unload(const u16 *id)
890 {
891 if (ata_id_major_version(id) >= 7 &&
892 (id[ATA_ID_CFSSE] & 0xC000) == 0x4000 &&
893 id[ATA_ID_CFSSE] & (1 << 13))
894 return true;
895 return false;
896 }
897
ata_id_has_wwn(const u16 * id)898 static inline bool ata_id_has_wwn(const u16 *id)
899 {
900 return (id[ATA_ID_CSF_DEFAULT] & 0xC100) == 0x4100;
901 }
902
ata_id_form_factor(const u16 * id)903 static inline int ata_id_form_factor(const u16 *id)
904 {
905 u16 val = id[168];
906
907 if (ata_id_major_version(id) < 7 || val == 0 || val == 0xffff)
908 return 0;
909
910 val &= 0xf;
911
912 if (val > 5)
913 return 0;
914
915 return val;
916 }
917
ata_id_rotation_rate(const u16 * id)918 static inline int ata_id_rotation_rate(const u16 *id)
919 {
920 u16 val = id[217];
921
922 if (ata_id_major_version(id) < 7 || val == 0 || val == 0xffff)
923 return 0;
924
925 if (val > 1 && val < 0x401)
926 return 0;
927
928 return val;
929 }
930
ata_id_has_ncq_send_and_recv(const u16 * id)931 static inline bool ata_id_has_ncq_send_and_recv(const u16 *id)
932 {
933 return id[ATA_ID_SATA_CAPABILITY_2] & BIT(6);
934 }
935
ata_id_has_ncq_non_data(const u16 * id)936 static inline bool ata_id_has_ncq_non_data(const u16 *id)
937 {
938 return id[ATA_ID_SATA_CAPABILITY_2] & BIT(5);
939 }
940
ata_id_has_ncq_prio(const u16 * id)941 static inline bool ata_id_has_ncq_prio(const u16 *id)
942 {
943 return id[ATA_ID_SATA_CAPABILITY] & BIT(12);
944 }
945
ata_id_has_trim(const u16 * id)946 static inline bool ata_id_has_trim(const u16 *id)
947 {
948 if (ata_id_major_version(id) >= 7 &&
949 (id[ATA_ID_DATA_SET_MGMT] & 1))
950 return true;
951 return false;
952 }
953
ata_id_has_zero_after_trim(const u16 * id)954 static inline bool ata_id_has_zero_after_trim(const u16 *id)
955 {
956 /* DSM supported, deterministic read, and read zero after trim set */
957 if (ata_id_has_trim(id) &&
958 (id[ATA_ID_ADDITIONAL_SUPP] & 0x4020) == 0x4020)
959 return true;
960
961 return false;
962 }
963
ata_id_current_chs_valid(const u16 * id)964 static inline bool ata_id_current_chs_valid(const u16 *id)
965 {
966 /* For ATA-1 devices, if the INITIALIZE DEVICE PARAMETERS command
967 has not been issued to the device then the values of
968 id[ATA_ID_CUR_CYLS] to id[ATA_ID_CUR_SECTORS] are vendor specific. */
969 return (id[ATA_ID_FIELD_VALID] & 1) && /* Current translation valid */
970 id[ATA_ID_CUR_CYLS] && /* cylinders in current translation */
971 id[ATA_ID_CUR_HEADS] && /* heads in current translation */
972 id[ATA_ID_CUR_HEADS] <= 16 &&
973 id[ATA_ID_CUR_SECTORS]; /* sectors in current translation */
974 }
975
ata_id_is_cfa(const u16 * id)976 static inline bool ata_id_is_cfa(const u16 *id)
977 {
978 if ((id[ATA_ID_CONFIG] == 0x848A) || /* Traditional CF */
979 (id[ATA_ID_CONFIG] == 0x844A)) /* Delkin Devices CF */
980 return true;
981 /*
982 * CF specs don't require specific value in the word 0 anymore and yet
983 * they forbid to report the ATA version in the word 80 and require the
984 * CFA feature set support to be indicated in the word 83 in this case.
985 * Unfortunately, some cards only follow either of this requirements,
986 * and while those that don't indicate CFA feature support need some
987 * sort of quirk list, it seems impractical for the ones that do...
988 */
989 return (id[ATA_ID_COMMAND_SET_2] & 0xC004) == 0x4004;
990 }
991
ata_id_is_ssd(const u16 * id)992 static inline bool ata_id_is_ssd(const u16 *id)
993 {
994 return id[ATA_ID_ROT_SPEED] == 0x01;
995 }
996
ata_id_zoned_cap(const u16 * id)997 static inline u8 ata_id_zoned_cap(const u16 *id)
998 {
999 return (id[ATA_ID_ADDITIONAL_SUPP] & 0x3);
1000 }
1001
ata_id_pio_need_iordy(const u16 * id,const u8 pio)1002 static inline bool ata_id_pio_need_iordy(const u16 *id, const u8 pio)
1003 {
1004 /* CF spec. r4.1 Table 22 says no IORDY on PIO5 and PIO6. */
1005 if (pio > 4 && ata_id_is_cfa(id))
1006 return false;
1007 /* For PIO3 and higher it is mandatory. */
1008 if (pio > 2)
1009 return true;
1010 /* Turn it on when possible. */
1011 return ata_id_has_iordy(id);
1012 }
1013
ata_drive_40wire(const u16 * dev_id)1014 static inline bool ata_drive_40wire(const u16 *dev_id)
1015 {
1016 if (ata_id_is_sata(dev_id))
1017 return false; /* SATA */
1018 if ((dev_id[ATA_ID_HW_CONFIG] & 0xE000) == 0x6000)
1019 return false; /* 80 wire */
1020 return true;
1021 }
1022
ata_drive_40wire_relaxed(const u16 * dev_id)1023 static inline bool ata_drive_40wire_relaxed(const u16 *dev_id)
1024 {
1025 if ((dev_id[ATA_ID_HW_CONFIG] & 0x2000) == 0x2000)
1026 return false; /* 80 wire */
1027 return true;
1028 }
1029
atapi_cdb_len(const u16 * dev_id)1030 static inline int atapi_cdb_len(const u16 *dev_id)
1031 {
1032 u16 tmp = dev_id[ATA_ID_CONFIG] & 0x3;
1033 switch (tmp) {
1034 case 0: return 12;
1035 case 1: return 16;
1036 default: return -1;
1037 }
1038 }
1039
atapi_command_packet_set(const u16 * dev_id)1040 static inline int atapi_command_packet_set(const u16 *dev_id)
1041 {
1042 return (dev_id[ATA_ID_CONFIG] >> 8) & 0x1f;
1043 }
1044
atapi_id_dmadir(const u16 * dev_id)1045 static inline bool atapi_id_dmadir(const u16 *dev_id)
1046 {
1047 return ata_id_major_version(dev_id) >= 7 && (dev_id[62] & 0x8000);
1048 }
1049
1050 /*
1051 * ata_id_is_lba_capacity_ok() performs a sanity check on
1052 * the claimed LBA capacity value for the device.
1053 *
1054 * Returns 1 if LBA capacity looks sensible, 0 otherwise.
1055 *
1056 * It is called only once for each device.
1057 */
ata_id_is_lba_capacity_ok(u16 * id)1058 static inline bool ata_id_is_lba_capacity_ok(u16 *id)
1059 {
1060 unsigned long lba_sects, chs_sects, head, tail;
1061
1062 /* No non-LBA info .. so valid! */
1063 if (id[ATA_ID_CYLS] == 0)
1064 return true;
1065
1066 lba_sects = ata_id_u32(id, ATA_ID_LBA_CAPACITY);
1067
1068 /*
1069 * The ATA spec tells large drives to return
1070 * C/H/S = 16383/16/63 independent of their size.
1071 * Some drives can be jumpered to use 15 heads instead of 16.
1072 * Some drives can be jumpered to use 4092 cyls instead of 16383.
1073 */
1074 if ((id[ATA_ID_CYLS] == 16383 ||
1075 (id[ATA_ID_CYLS] == 4092 && id[ATA_ID_CUR_CYLS] == 16383)) &&
1076 id[ATA_ID_SECTORS] == 63 &&
1077 (id[ATA_ID_HEADS] == 15 || id[ATA_ID_HEADS] == 16) &&
1078 (lba_sects >= 16383 * 63 * id[ATA_ID_HEADS]))
1079 return true;
1080
1081 chs_sects = id[ATA_ID_CYLS] * id[ATA_ID_HEADS] * id[ATA_ID_SECTORS];
1082
1083 /* perform a rough sanity check on lba_sects: within 10% is OK */
1084 if (lba_sects - chs_sects < chs_sects/10)
1085 return true;
1086
1087 /* some drives have the word order reversed */
1088 head = (lba_sects >> 16) & 0xffff;
1089 tail = lba_sects & 0xffff;
1090 lba_sects = head | (tail << 16);
1091
1092 if (lba_sects - chs_sects < chs_sects/10) {
1093 *(__le32 *)&id[ATA_ID_LBA_CAPACITY] = __cpu_to_le32(lba_sects);
1094 return true; /* LBA capacity is (now) good */
1095 }
1096
1097 return false; /* LBA capacity value may be bad */
1098 }
1099
ata_id_to_hd_driveid(u16 * id)1100 static inline void ata_id_to_hd_driveid(u16 *id)
1101 {
1102 #ifdef __BIG_ENDIAN
1103 /* accessed in struct hd_driveid as 8-bit values */
1104 id[ATA_ID_MAX_MULTSECT] = __cpu_to_le16(id[ATA_ID_MAX_MULTSECT]);
1105 id[ATA_ID_CAPABILITY] = __cpu_to_le16(id[ATA_ID_CAPABILITY]);
1106 id[ATA_ID_OLD_PIO_MODES] = __cpu_to_le16(id[ATA_ID_OLD_PIO_MODES]);
1107 id[ATA_ID_OLD_DMA_MODES] = __cpu_to_le16(id[ATA_ID_OLD_DMA_MODES]);
1108 id[ATA_ID_MULTSECT] = __cpu_to_le16(id[ATA_ID_MULTSECT]);
1109
1110 /* as 32-bit values */
1111 *(u32 *)&id[ATA_ID_LBA_CAPACITY] = ata_id_u32(id, ATA_ID_LBA_CAPACITY);
1112 *(u32 *)&id[ATA_ID_SPG] = ata_id_u32(id, ATA_ID_SPG);
1113
1114 /* as 64-bit value */
1115 *(u64 *)&id[ATA_ID_LBA_CAPACITY_2] =
1116 ata_id_u64(id, ATA_ID_LBA_CAPACITY_2);
1117 #endif
1118 }
1119
ata_ok(u8 status)1120 static inline bool ata_ok(u8 status)
1121 {
1122 return ((status & (ATA_BUSY | ATA_DRDY | ATA_DF | ATA_DRQ | ATA_ERR))
1123 == ATA_DRDY);
1124 }
1125
lba_28_ok(u64 block,u32 n_block)1126 static inline bool lba_28_ok(u64 block, u32 n_block)
1127 {
1128 /* check the ending block number: must be LESS THAN 0x0fffffff */
1129 return ((block + n_block) < ((1 << 28) - 1)) && (n_block <= ATA_MAX_SECTORS);
1130 }
1131
lba_48_ok(u64 block,u32 n_block)1132 static inline bool lba_48_ok(u64 block, u32 n_block)
1133 {
1134 /* check the ending block number */
1135 return ((block + n_block - 1) < ((u64)1 << 48)) && (n_block <= ATA_MAX_SECTORS_LBA48);
1136 }
1137
1138 #define sata_pmp_gscr_vendor(gscr) ((gscr)[SATA_PMP_GSCR_PROD_ID] & 0xffff)
1139 #define sata_pmp_gscr_devid(gscr) ((gscr)[SATA_PMP_GSCR_PROD_ID] >> 16)
1140 #define sata_pmp_gscr_rev(gscr) (((gscr)[SATA_PMP_GSCR_REV] >> 8) & 0xff)
1141 #define sata_pmp_gscr_ports(gscr) ((gscr)[SATA_PMP_GSCR_PORT_INFO] & 0xf)
1142
1143 #endif /* __LINUX_ATA_H__ */
1144