1 /** 2 * Marvell BT-over-SDIO driver: SDIO interface related definitions 3 * 4 * Copyright (C) 2009, Marvell International Ltd. 5 * 6 * This software file (the "File") is distributed by Marvell International 7 * Ltd. under the terms of the GNU General Public License Version 2, June 1991 8 * (the "License"). You may use, redistribute and/or modify this File in 9 * accordance with the terms and conditions of the License, a copy of which 10 * is available by writing to the Free Software Foundation, Inc., 11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the 12 * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt. 13 * 14 * 15 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE 17 * ARE EXPRESSLY DISCLAIMED. The License provides additional details about 18 * this warranty disclaimer. 19 * 20 **/ 21 22 #define SDIO_HEADER_LEN 4 23 24 /* SD block size can not bigger than 64 due to buf size limit in firmware */ 25 /* define SD block size for data Tx/Rx */ 26 #define SDIO_BLOCK_SIZE 64 27 28 /* Number of blocks for firmware transfer */ 29 #define FIRMWARE_TRANSFER_NBLOCK 2 30 31 /* This is for firmware specific length */ 32 #define FW_EXTRA_LEN 36 33 34 #define MRVDRV_SIZE_OF_CMD_BUFFER (2 * 1024) 35 36 #define MRVDRV_BT_RX_PACKET_BUFFER_SIZE \ 37 (HCI_MAX_FRAME_SIZE + FW_EXTRA_LEN) 38 39 #define ALLOC_BUF_SIZE (((max_t (int, MRVDRV_BT_RX_PACKET_BUFFER_SIZE, \ 40 MRVDRV_SIZE_OF_CMD_BUFFER) + SDIO_HEADER_LEN \ 41 + SDIO_BLOCK_SIZE - 1) / SDIO_BLOCK_SIZE) \ 42 * SDIO_BLOCK_SIZE) 43 44 /* The number of times to try when polling for status */ 45 #define MAX_POLL_TRIES 100 46 47 /* Max retry number of CMD53 write */ 48 #define MAX_WRITE_IOMEM_RETRY 2 49 50 /* register bitmasks */ 51 #define HOST_POWER_UP BIT(1) 52 #define HOST_CMD53_FIN BIT(2) 53 54 #define HIM_DISABLE 0xff 55 #define HIM_ENABLE (BIT(0) | BIT(1)) 56 57 #define UP_LD_HOST_INT_STATUS BIT(0) 58 #define DN_LD_HOST_INT_STATUS BIT(1) 59 60 #define DN_LD_CARD_RDY BIT(0) 61 #define CARD_IO_READY BIT(3) 62 63 #define FIRMWARE_READY 0xfedc 64 65 struct btmrvl_plt_wake_cfg { 66 int irq_bt; 67 bool wake_by_bt; 68 }; 69 70 struct btmrvl_sdio_card_reg { 71 u8 cfg; 72 u8 host_int_mask; 73 u8 host_intstatus; 74 u8 card_status; 75 u8 sq_read_base_addr_a0; 76 u8 sq_read_base_addr_a1; 77 u8 card_revision; 78 u8 card_fw_status0; 79 u8 card_fw_status1; 80 u8 card_rx_len; 81 u8 card_rx_unit; 82 u8 io_port_0; 83 u8 io_port_1; 84 u8 io_port_2; 85 bool int_read_to_clear; 86 u8 host_int_rsr; 87 u8 card_misc_cfg; 88 u8 fw_dump_ctrl; 89 u8 fw_dump_start; 90 u8 fw_dump_end; 91 }; 92 93 struct btmrvl_sdio_card { 94 struct sdio_func *func; 95 u32 ioport; 96 const char *helper; 97 const char *firmware; 98 const struct btmrvl_sdio_card_reg *reg; 99 bool support_pscan_win_report; 100 bool supports_fw_dump; 101 u16 sd_blksz_fw_dl; 102 u8 rx_unit; 103 struct btmrvl_private *priv; 104 struct device_node *plt_of_node; 105 struct btmrvl_plt_wake_cfg *plt_wake_cfg; 106 }; 107 108 struct btmrvl_sdio_device { 109 const char *helper; 110 const char *firmware; 111 const struct btmrvl_sdio_card_reg *reg; 112 const bool support_pscan_win_report; 113 u16 sd_blksz_fw_dl; 114 bool supports_fw_dump; 115 }; 116 117 118 /* Platform specific DMA alignment */ 119 #define BTSDIO_DMA_ALIGN 8 120 121 /* Macros for Data Alignment : size */ 122 #define ALIGN_SZ(p, a) \ 123 (((p) + ((a) - 1)) & ~((a) - 1)) 124 125 /* Macros for Data Alignment : address */ 126 #define ALIGN_ADDR(p, a) \ 127 ((((unsigned long)(p)) + (((unsigned long)(a)) - 1)) & \ 128 ~(((unsigned long)(a)) - 1)) 129