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1 /* SPDX-License-Identifier: GPL-2.0 */
2 /******************************************************************************
3  *
4  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
5  *
6  ******************************************************************************/
7 
8 #ifndef __ODMDIG_H__
9 #define __ODMDIG_H__
10 
11 typedef struct _Dynamic_Initial_Gain_Threshold_ {
12 	bool bStopDIG;
13 	bool bPSDInProgress;
14 
15 	u8 Dig_Enable_Flag;
16 	u8 Dig_Ext_Port_Stage;
17 
18 	int RssiLowThresh;
19 	int RssiHighThresh;
20 
21 	u32 FALowThresh;
22 	u32 FAHighThresh;
23 
24 	u8 CurSTAConnectState;
25 	u8 PreSTAConnectState;
26 	u8 CurMultiSTAConnectState;
27 
28 	u8 PreIGValue;
29 	u8 CurIGValue;
30 	u8 BackupIGValue;		/* MP DIG */
31 	u8 BT30_CurIGI;
32 	u8 IGIBackup;
33 
34 	s8 BackoffVal;
35 	s8 BackoffVal_range_max;
36 	s8 BackoffVal_range_min;
37 	u8 rx_gain_range_max;
38 	u8 rx_gain_range_min;
39 	u8 Rssi_val_min;
40 
41 	u8 PreCCK_CCAThres;
42 	u8 CurCCK_CCAThres;
43 	u8 PreCCKPDState;
44 	u8 CurCCKPDState;
45 	u8 CCKPDBackup;
46 
47 	u8 LargeFAHit;
48 	u8 ForbiddenIGI;
49 	u32 Recover_cnt;
50 
51 	u8 DIG_Dynamic_MIN_0;
52 	u8 DIG_Dynamic_MIN_1;
53 	bool bMediaConnect_0;
54 	bool bMediaConnect_1;
55 
56 	u32 AntDiv_RSSI_max;
57 	u32 RSSI_max;
58 
59 	u8 *pbP2pLinkInProgress;
60 } DIG_T, *pDIG_T;
61 
62 typedef struct false_ALARM_STATISTICS {
63 	u32 Cnt_Parity_Fail;
64 	u32 Cnt_Rate_Illegal;
65 	u32 Cnt_Crc8_fail;
66 	u32 Cnt_Mcs_fail;
67 	u32 Cnt_Ofdm_fail;
68 	u32 Cnt_Ofdm_fail_pre; /* For RTL8881A */
69 	u32 Cnt_Cck_fail;
70 	u32 Cnt_all;
71 	u32 Cnt_Fast_Fsync;
72 	u32 Cnt_SB_Search_fail;
73 	u32 Cnt_OFDM_CCA;
74 	u32 Cnt_CCK_CCA;
75 	u32 Cnt_CCA_all;
76 	u32 Cnt_BW_USC; /* Gary */
77 	u32 Cnt_BW_LSC; /* Gary */
78 } false_ALARM_STATISTICS, *Pfalse_ALARM_STATISTICS;
79 
80 typedef enum tag_Dynamic_Init_Gain_Operation_Type_Definition {
81 	DIG_TYPE_THRESH_HIGH = 0,
82 	DIG_TYPE_THRESH_LOW = 1,
83 	DIG_TYPE_BACKOFF = 2,
84 	DIG_TYPE_RX_GAIN_MIN = 3,
85 	DIG_TYPE_RX_GAIN_MAX = 4,
86 	DIG_TYPE_ENABLE = 5,
87 	DIG_TYPE_DISABLE = 6,
88 	DIG_OP_TYPE_MAX
89 } DM_DIG_OP_E;
90 
91 typedef enum tag_ODM_PauseDIG_Type {
92 	ODM_PAUSE_DIG = BIT0,
93 	ODM_RESUME_DIG = BIT1
94 } ODM_Pause_DIG_TYPE;
95 
96 typedef enum tag_ODM_PauseCCKPD_Type {
97 	ODM_PAUSE_CCKPD = BIT0,
98 	ODM_RESUME_CCKPD = BIT1
99 } ODM_Pause_CCKPD_TYPE;
100 
101 #define		DM_DIG_THRESH_HIGH			40
102 #define		DM_DIG_THRESH_LOW			35
103 
104 #define		DMfalseALARM_THRESH_LOW	400
105 #define		DMfalseALARM_THRESH_HIGH	1000
106 
107 #define		DM_DIG_MAX_NIC				0x3e
108 #define		DM_DIG_MIN_NIC				0x1e /* 0x22//0x1c */
109 #define		DM_DIG_MAX_OF_MIN_NIC		0x3e
110 
111 #define		DM_DIG_MAX_AP					0x3e
112 #define		DM_DIG_MIN_AP					0x1c
113 #define		DM_DIG_MAX_OF_MIN			0x2A	/* 0x32 */
114 #define		DM_DIG_MIN_AP_DFS				0x20
115 
116 #define		DM_DIG_MAX_NIC_HP			0x46
117 #define		DM_DIG_MIN_NIC_HP				0x2e
118 
119 #define		DM_DIG_MAX_AP_HP				0x42
120 #define		DM_DIG_MIN_AP_HP				0x30
121 
122 #define		DM_DIG_FA_TH0				0x200/* 0x20 */
123 
124 #define		DM_DIG_FA_TH1					0x300
125 #define		DM_DIG_FA_TH2					0x400
126 /* this is for 92d */
127 #define		DM_DIG_FA_TH0_92D				0x100
128 #define		DM_DIG_FA_TH1_92D				0x400
129 #define		DM_DIG_FA_TH2_92D				0x600
130 
131 #define		DM_DIG_BACKOFF_MAX			12
132 #define		DM_DIG_BACKOFF_MIN			-4
133 #define		DM_DIG_BACKOFF_DEFAULT		10
134 
135 #define			DM_DIG_FA_TH0_LPS				4 /*  4 in lps */
136 #define			DM_DIG_FA_TH1_LPS				15 /*  15 lps */
137 #define			DM_DIG_FA_TH2_LPS				30 /*  30 lps */
138 #define			RSSI_OFFSET_DIG				0x05
139 
140 void odm_NHMCounterStatisticsInit(void *pDM_VOID);
141 
142 void odm_NHMCounterStatistics(void *pDM_VOID);
143 
144 void odm_NHMBBInit(void *pDM_VOID);
145 
146 void odm_NHMBB(void *pDM_VOID);
147 
148 void odm_NHMCounterStatisticsReset(void *pDM_VOID);
149 
150 void odm_GetNHMCounterStatistics(void *pDM_VOID);
151 
152 void odm_SearchPwdBLowerBound(void *pDM_VOID, u8 IGI_target);
153 
154 void odm_AdaptivityInit(void *pDM_VOID);
155 
156 void odm_Adaptivity(void *pDM_VOID, u8 IGI);
157 
158 void ODM_Write_DIG(void *pDM_VOID, u8 CurrentIGI);
159 
160 void odm_PauseDIG(void *pDM_VOID, ODM_Pause_DIG_TYPE PauseType, u8 IGIValue);
161 
162 void odm_DIGInit(void *pDM_VOID);
163 
164 void odm_DIG(void *pDM_VOID);
165 
166 void odm_DIGbyRSSI_LPS(void *pDM_VOID);
167 
168 void odm_FalseAlarmCounterStatistics(void *pDM_VOID);
169 
170 void odm_FAThresholdCheck(
171 	void *pDM_VOID,
172 	bool bDFSBand,
173 	bool bPerformance,
174 	u32 RxTp,
175 	u32 TxTp,
176 	u32 *dm_FA_thres
177 );
178 
179 u8 odm_ForbiddenIGICheck(void *pDM_VOID, u8 DIG_Dynamic_MIN, u8 CurrentIGI);
180 
181 bool odm_DigAbort(void *pDM_VOID);
182 
183 void odm_CCKPacketDetectionThresh(void *pDM_VOID);
184 
185 void ODM_Write_CCK_CCA_Thres(void *pDM_VOID, u8 CurCCK_CCAThres);
186 
187 #endif
188