1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * ld script for the x86 kernel 4 * 5 * Historic 32-bit version written by Martin Mares <mj@atrey.karlin.mff.cuni.cz> 6 * 7 * Modernisation, unification and other changes and fixes: 8 * Copyright (C) 2007-2009 Sam Ravnborg <sam@ravnborg.org> 9 * 10 * 11 * Don't define absolute symbols until and unless you know that symbol 12 * value is should remain constant even if kernel image is relocated 13 * at run time. Absolute symbols are not relocated. If symbol value should 14 * change if kernel is relocated, make the symbol section relative and 15 * put it inside the section definition. 16 */ 17 18#ifdef CONFIG_X86_32 19#define LOAD_OFFSET __PAGE_OFFSET 20#else 21#define LOAD_OFFSET __START_KERNEL_map 22#endif 23 24#define RUNTIME_DISCARD_EXIT 25#define EMITS_PT_NOTE 26#define RO_EXCEPTION_TABLE_ALIGN 16 27 28#include <asm-generic/vmlinux.lds.h> 29#include <asm/asm-offsets.h> 30#include <asm/thread_info.h> 31#include <asm/page_types.h> 32#include <asm/orc_lookup.h> 33#include <asm/cache.h> 34#include <asm/boot.h> 35 36#undef i386 /* in case the preprocessor is a 32bit one */ 37 38OUTPUT_FORMAT(CONFIG_OUTPUT_FORMAT) 39 40#ifdef CONFIG_X86_32 41OUTPUT_ARCH(i386) 42ENTRY(phys_startup_32) 43#else 44OUTPUT_ARCH(i386:x86-64) 45ENTRY(phys_startup_64) 46#endif 47 48jiffies = jiffies_64; 49 50#if defined(CONFIG_X86_64) 51/* 52 * On 64-bit, align RODATA to 2MB so we retain large page mappings for 53 * boundaries spanning kernel text, rodata and data sections. 54 * 55 * However, kernel identity mappings will have different RWX permissions 56 * to the pages mapping to text and to the pages padding (which are freed) the 57 * text section. Hence kernel identity mappings will be broken to smaller 58 * pages. For 64-bit, kernel text and kernel identity mappings are different, 59 * so we can enable protection checks as well as retain 2MB large page 60 * mappings for kernel text. 61 */ 62#define X86_ALIGN_RODATA_BEGIN . = ALIGN(HPAGE_SIZE); 63 64#define X86_ALIGN_RODATA_END \ 65 . = ALIGN(HPAGE_SIZE); \ 66 __end_rodata_hpage_align = .; \ 67 __end_rodata_aligned = .; 68 69#define ALIGN_ENTRY_TEXT_BEGIN . = ALIGN(PMD_SIZE); 70#define ALIGN_ENTRY_TEXT_END . = ALIGN(PMD_SIZE); 71 72/* 73 * This section contains data which will be mapped as decrypted. Memory 74 * encryption operates on a page basis. Make this section PMD-aligned 75 * to avoid splitting the pages while mapping the section early. 76 * 77 * Note: We use a separate section so that only this section gets 78 * decrypted to avoid exposing more than we wish. 79 */ 80#define BSS_DECRYPTED \ 81 . = ALIGN(PMD_SIZE); \ 82 __start_bss_decrypted = .; \ 83 *(.bss..decrypted); \ 84 . = ALIGN(PAGE_SIZE); \ 85 __start_bss_decrypted_unused = .; \ 86 . = ALIGN(PMD_SIZE); \ 87 __end_bss_decrypted = .; \ 88 89#else 90 91#define X86_ALIGN_RODATA_BEGIN 92#define X86_ALIGN_RODATA_END \ 93 . = ALIGN(PAGE_SIZE); \ 94 __end_rodata_aligned = .; 95 96#define ALIGN_ENTRY_TEXT_BEGIN 97#define ALIGN_ENTRY_TEXT_END 98#define BSS_DECRYPTED 99 100#endif 101 102PHDRS { 103 text PT_LOAD FLAGS(5); /* R_E */ 104 data PT_LOAD FLAGS(6); /* RW_ */ 105#ifdef CONFIG_X86_64 106#ifdef CONFIG_SMP 107 percpu PT_LOAD FLAGS(6); /* RW_ */ 108#endif 109 init PT_LOAD FLAGS(7); /* RWE */ 110#endif 111 note PT_NOTE FLAGS(0); /* ___ */ 112} 113 114SECTIONS 115{ 116#ifdef CONFIG_X86_32 117 . = LOAD_OFFSET + LOAD_PHYSICAL_ADDR; 118 phys_startup_32 = ABSOLUTE(startup_32 - LOAD_OFFSET); 119#else 120 . = __START_KERNEL; 121 phys_startup_64 = ABSOLUTE(startup_64 - LOAD_OFFSET); 122#endif 123 124 /* Text and read-only data */ 125 .text : AT(ADDR(.text) - LOAD_OFFSET) { 126 _text = .; 127 _stext = .; 128 /* bootstrapping code */ 129 HEAD_TEXT 130 TEXT_TEXT 131 SCHED_TEXT 132 CPUIDLE_TEXT 133 LOCK_TEXT 134 KPROBES_TEXT 135 ALIGN_ENTRY_TEXT_BEGIN 136#ifdef CONFIG_CPU_SRSO 137 *(.text..__x86.rethunk_untrain) 138#endif 139 140 ENTRY_TEXT 141 142#ifdef CONFIG_CPU_SRSO 143 /* 144 * See the comment above srso_alias_untrain_ret()'s 145 * definition. 146 */ 147 . = srso_alias_untrain_ret | (1 << 2) | (1 << 8) | (1 << 14) | (1 << 20); 148 *(.text..__x86.rethunk_safe) 149#endif 150 ALIGN_ENTRY_TEXT_END 151 SOFTIRQENTRY_TEXT 152 STATIC_CALL_TEXT 153 *(.fixup) 154 *(.gnu.warning) 155 156#ifdef CONFIG_RETPOLINE 157 __indirect_thunk_start = .; 158 *(.text..__x86.indirect_thunk) 159 *(.text..__x86.return_thunk) 160 __indirect_thunk_end = .; 161#endif 162 } :text =0xcccc 163 164 /* End of text section, which should occupy whole number of pages */ 165 _etext = .; 166 167 . = ALIGN(PAGE_SIZE); 168 169 X86_ALIGN_RODATA_BEGIN 170 RO_DATA(PAGE_SIZE) 171 X86_ALIGN_RODATA_END 172 173 /* Data */ 174 .data : AT(ADDR(.data) - LOAD_OFFSET) { 175 /* Start of data section */ 176 _sdata = .; 177 178 /* init_task */ 179 INIT_TASK_DATA(THREAD_SIZE) 180 181#ifdef CONFIG_X86_32 182 /* 32 bit has nosave before _edata */ 183 NOSAVE_DATA 184#endif 185 186 PAGE_ALIGNED_DATA(PAGE_SIZE) 187 188 CACHELINE_ALIGNED_DATA(L1_CACHE_BYTES) 189 190 DATA_DATA 191 CONSTRUCTORS 192 193 /* rarely changed data like cpu maps */ 194 READ_MOSTLY_DATA(INTERNODE_CACHE_BYTES) 195 196 /* End of data section */ 197 _edata = .; 198 } :data 199 200 BUG_TABLE 201 202 ORC_UNWIND_TABLE 203 204 . = ALIGN(PAGE_SIZE); 205 __vvar_page = .; 206 207 .vvar : AT(ADDR(.vvar) - LOAD_OFFSET) { 208 /* work around gold bug 13023 */ 209 __vvar_beginning_hack = .; 210 211 /* Place all vvars at the offsets in asm/vvar.h. */ 212#define EMIT_VVAR(name, offset) \ 213 . = __vvar_beginning_hack + offset; \ 214 *(.vvar_ ## name) 215#include <asm/vvar.h> 216#undef EMIT_VVAR 217 218 /* 219 * Pad the rest of the page with zeros. Otherwise the loader 220 * can leave garbage here. 221 */ 222 . = __vvar_beginning_hack + PAGE_SIZE; 223 } :data 224 225 . = ALIGN(__vvar_page + PAGE_SIZE, PAGE_SIZE); 226 227 /* Init code and data - will be freed after init */ 228 . = ALIGN(PAGE_SIZE); 229 .init.begin : AT(ADDR(.init.begin) - LOAD_OFFSET) { 230 __init_begin = .; /* paired with __init_end */ 231 } 232 233#if defined(CONFIG_X86_64) && defined(CONFIG_SMP) 234 /* 235 * percpu offsets are zero-based on SMP. PERCPU_VADDR() changes the 236 * output PHDR, so the next output section - .init.text - should 237 * start another segment - init. 238 */ 239 PERCPU_VADDR(INTERNODE_CACHE_BYTES, 0, :percpu) 240 ASSERT(SIZEOF(.data..percpu) < CONFIG_PHYSICAL_START, 241 "per-CPU data too large - increase CONFIG_PHYSICAL_START") 242#endif 243 244 INIT_TEXT_SECTION(PAGE_SIZE) 245#ifdef CONFIG_X86_64 246 :init 247#endif 248 249 /* 250 * Section for code used exclusively before alternatives are run. All 251 * references to such code must be patched out by alternatives, normally 252 * by using X86_FEATURE_ALWAYS CPU feature bit. 253 * 254 * See static_cpu_has() for an example. 255 */ 256 .altinstr_aux : AT(ADDR(.altinstr_aux) - LOAD_OFFSET) { 257 *(.altinstr_aux) 258 } 259 260 INIT_DATA_SECTION(16) 261 262 .x86_cpu_dev.init : AT(ADDR(.x86_cpu_dev.init) - LOAD_OFFSET) { 263 __x86_cpu_dev_start = .; 264 *(.x86_cpu_dev.init) 265 __x86_cpu_dev_end = .; 266 } 267 268#ifdef CONFIG_X86_INTEL_MID 269 .x86_intel_mid_dev.init : AT(ADDR(.x86_intel_mid_dev.init) - \ 270 LOAD_OFFSET) { 271 __x86_intel_mid_dev_start = .; 272 *(.x86_intel_mid_dev.init) 273 __x86_intel_mid_dev_end = .; 274 } 275#endif 276 277 /* 278 * start address and size of operations which during runtime 279 * can be patched with virtualization friendly instructions or 280 * baremetal native ones. Think page table operations. 281 * Details in paravirt_types.h 282 */ 283 . = ALIGN(8); 284 .parainstructions : AT(ADDR(.parainstructions) - LOAD_OFFSET) { 285 __parainstructions = .; 286 *(.parainstructions) 287 __parainstructions_end = .; 288 } 289 290#ifdef CONFIG_RETPOLINE 291 /* 292 * List of instructions that call/jmp/jcc to retpoline thunks 293 * __x86_indirect_thunk_*(). These instructions can be patched along 294 * with alternatives, after which the section can be freed. 295 */ 296 . = ALIGN(8); 297 .retpoline_sites : AT(ADDR(.retpoline_sites) - LOAD_OFFSET) { 298 __retpoline_sites = .; 299 *(.retpoline_sites) 300 __retpoline_sites_end = .; 301 } 302 303 . = ALIGN(8); 304 .return_sites : AT(ADDR(.return_sites) - LOAD_OFFSET) { 305 __return_sites = .; 306 *(.return_sites) 307 __return_sites_end = .; 308 } 309#endif 310 311 /* 312 * struct alt_inst entries. From the header (alternative.h): 313 * "Alternative instructions for different CPU types or capabilities" 314 * Think locking instructions on spinlocks. 315 */ 316 . = ALIGN(8); 317 .altinstructions : AT(ADDR(.altinstructions) - LOAD_OFFSET) { 318 __alt_instructions = .; 319 *(.altinstructions) 320 __alt_instructions_end = .; 321 } 322 323 /* 324 * And here are the replacement instructions. The linker sticks 325 * them as binary blobs. The .altinstructions has enough data to 326 * get the address and the length of them to patch the kernel safely. 327 */ 328 .altinstr_replacement : AT(ADDR(.altinstr_replacement) - LOAD_OFFSET) { 329 *(.altinstr_replacement) 330 } 331 332 /* 333 * struct iommu_table_entry entries are injected in this section. 334 * It is an array of IOMMUs which during run time gets sorted depending 335 * on its dependency order. After rootfs_initcall is complete 336 * this section can be safely removed. 337 */ 338 .iommu_table : AT(ADDR(.iommu_table) - LOAD_OFFSET) { 339 __iommu_table = .; 340 *(.iommu_table) 341 __iommu_table_end = .; 342 } 343 344 . = ALIGN(8); 345 .apicdrivers : AT(ADDR(.apicdrivers) - LOAD_OFFSET) { 346 __apicdrivers = .; 347 *(.apicdrivers); 348 __apicdrivers_end = .; 349 } 350 351 . = ALIGN(8); 352 /* 353 * .exit.text is discarded at runtime, not link time, to deal with 354 * references from .altinstructions 355 */ 356 .exit.text : AT(ADDR(.exit.text) - LOAD_OFFSET) { 357 EXIT_TEXT 358 } 359 360 .exit.data : AT(ADDR(.exit.data) - LOAD_OFFSET) { 361 EXIT_DATA 362 } 363 364#if !defined(CONFIG_X86_64) || !defined(CONFIG_SMP) 365 PERCPU_SECTION(INTERNODE_CACHE_BYTES) 366#endif 367 368 . = ALIGN(PAGE_SIZE); 369 370 /* freed after init ends here */ 371 .init.end : AT(ADDR(.init.end) - LOAD_OFFSET) { 372 __init_end = .; 373 } 374 375 /* 376 * smp_locks might be freed after init 377 * start/end must be page aligned 378 */ 379 . = ALIGN(PAGE_SIZE); 380 .smp_locks : AT(ADDR(.smp_locks) - LOAD_OFFSET) { 381 __smp_locks = .; 382 *(.smp_locks) 383 . = ALIGN(PAGE_SIZE); 384 __smp_locks_end = .; 385 } 386 387#ifdef CONFIG_X86_64 388 .data_nosave : AT(ADDR(.data_nosave) - LOAD_OFFSET) { 389 NOSAVE_DATA 390 } 391#endif 392 393 /* BSS */ 394 . = ALIGN(PAGE_SIZE); 395 .bss : AT(ADDR(.bss) - LOAD_OFFSET) { 396 __bss_start = .; 397 *(.bss..page_aligned) 398 . = ALIGN(PAGE_SIZE); 399 *(BSS_MAIN) 400 BSS_DECRYPTED 401 . = ALIGN(PAGE_SIZE); 402 __bss_stop = .; 403 } 404 405 /* 406 * The memory occupied from _text to here, __end_of_kernel_reserve, is 407 * automatically reserved in setup_arch(). Anything after here must be 408 * explicitly reserved using memblock_reserve() or it will be discarded 409 * and treated as available memory. 410 */ 411 __end_of_kernel_reserve = .; 412 413 . = ALIGN(PAGE_SIZE); 414 .brk : AT(ADDR(.brk) - LOAD_OFFSET) { 415 __brk_base = .; 416 . += 64 * 1024; /* 64k alignment slop space */ 417 *(.bss..brk) /* areas brk users have reserved */ 418 __brk_limit = .; 419 } 420 421 . = ALIGN(PAGE_SIZE); /* keep VO_INIT_SIZE page aligned */ 422 _end = .; 423 424#ifdef CONFIG_AMD_MEM_ENCRYPT 425 /* 426 * Early scratch/workarea section: Lives outside of the kernel proper 427 * (_text - _end). 428 * 429 * Resides after _end because even though the .brk section is after 430 * __end_of_kernel_reserve, the .brk section is later reserved as a 431 * part of the kernel. Since it is located after __end_of_kernel_reserve 432 * it will be discarded and become part of the available memory. As 433 * such, it can only be used by very early boot code and must not be 434 * needed afterwards. 435 * 436 * Currently used by SME for performing in-place encryption of the 437 * kernel during boot. Resides on a 2MB boundary to simplify the 438 * pagetable setup used for SME in-place encryption. 439 */ 440 . = ALIGN(HPAGE_SIZE); 441 .init.scratch : AT(ADDR(.init.scratch) - LOAD_OFFSET) { 442 __init_scratch_begin = .; 443 *(.init.scratch) 444 . = ALIGN(HPAGE_SIZE); 445 __init_scratch_end = .; 446 } 447#endif 448 449 STABS_DEBUG 450 DWARF_DEBUG 451 ELF_DETAILS 452 453 DISCARDS 454 455 /* 456 * Make sure that the .got.plt is either completely empty or it 457 * contains only the lazy dispatch entries. 458 */ 459 .got.plt (INFO) : { *(.got.plt) } 460 ASSERT(SIZEOF(.got.plt) == 0 || 461#ifdef CONFIG_X86_64 462 SIZEOF(.got.plt) == 0x18, 463#else 464 SIZEOF(.got.plt) == 0xc, 465#endif 466 "Unexpected GOT/PLT entries detected!") 467 468 /* 469 * Sections that should stay zero sized, which is safer to 470 * explicitly check instead of blindly discarding. 471 */ 472 .got : { 473 *(.got) *(.igot.*) 474 } 475 ASSERT(SIZEOF(.got) == 0, "Unexpected GOT entries detected!") 476 477 .plt : { 478 *(.plt) *(.plt.*) *(.iplt) 479 } 480 ASSERT(SIZEOF(.plt) == 0, "Unexpected run-time procedure linkages detected!") 481 482 .rel.dyn : { 483 *(.rel.*) *(.rel_*) 484 } 485 ASSERT(SIZEOF(.rel.dyn) == 0, "Unexpected run-time relocations (.rel) detected!") 486 487 .rela.dyn : { 488 *(.rela.*) *(.rela_*) 489 } 490 ASSERT(SIZEOF(.rela.dyn) == 0, "Unexpected run-time relocations (.rela) detected!") 491} 492 493#ifdef CONFIG_X86_32 494/* 495 * The ASSERT() sink to . is intentional, for binutils 2.14 compatibility: 496 */ 497. = ASSERT((_end - LOAD_OFFSET <= KERNEL_IMAGE_SIZE), 498 "kernel image bigger than KERNEL_IMAGE_SIZE"); 499#else 500/* 501 * Per-cpu symbols which need to be offset from __per_cpu_load 502 * for the boot processor. 503 */ 504#define INIT_PER_CPU(x) init_per_cpu__##x = ABSOLUTE(x) + __per_cpu_load 505INIT_PER_CPU(gdt_page); 506INIT_PER_CPU(fixed_percpu_data); 507INIT_PER_CPU(irq_stack_backing_store); 508 509/* 510 * Build-time check on the image size: 511 */ 512. = ASSERT((_end - _text <= KERNEL_IMAGE_SIZE), 513 "kernel image bigger than KERNEL_IMAGE_SIZE"); 514 515#ifdef CONFIG_SMP 516. = ASSERT((fixed_percpu_data == 0), 517 "fixed_percpu_data is not at start of per-cpu area"); 518#endif 519 520#ifdef CONFIG_RETHUNK 521. = ASSERT((retbleed_return_thunk & 0x3f) == 0, "retbleed_return_thunk not cacheline-aligned"); 522. = ASSERT((srso_safe_ret & 0x3f) == 0, "srso_safe_ret not cacheline-aligned"); 523#endif 524 525#ifdef CONFIG_CPU_SRSO 526/* 527 * GNU ld cannot do XOR until 2.41. 528 * https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=f6f78318fca803c4907fb8d7f6ded8295f1947b1 529 * 530 * LLVM lld cannot do XOR until lld-17. 531 * https://github.com/llvm/llvm-project/commit/fae96104d4378166cbe5c875ef8ed808a356f3fb 532 * 533 * Instead do: (A | B) - (A & B) in order to compute the XOR 534 * of the two function addresses: 535 */ 536. = ASSERT(((ABSOLUTE(srso_alias_untrain_ret) | srso_alias_safe_ret) - 537 (ABSOLUTE(srso_alias_untrain_ret) & srso_alias_safe_ret)) == ((1 << 2) | (1 << 8) | (1 << 14) | (1 << 20)), 538 "SRSO function pair won't alias"); 539#endif 540 541#endif /* CONFIG_X86_32 */ 542 543#ifdef CONFIG_KEXEC_CORE 544#include <asm/kexec.h> 545 546. = ASSERT(kexec_control_code_size <= KEXEC_CONTROL_CODE_MAX_SIZE, 547 "kexec control code size is too big"); 548#endif 549 550#ifdef CONFIG_CFI_CLANG 551. = ASSERT((__cfi_jt_end - __cfi_jt_start > 0), 552 "CFI jump table is empty"); 553#endif 554