1 /*
2 * Copyright 2015 Advanced Micro Devices, Inc.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sub license, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
16 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
17 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
18 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
19 * USE OR OTHER DEALINGS IN THE SOFTWARE.
20 *
21 * The above copyright notice and this permission notice (including the
22 * next paragraph) shall be included in all copies or substantial portions
23 * of the Software.
24 *
25 */
26 /*
27 * Authors:
28 * Christian König <deathsimple@vodafone.de>
29 */
30
31 #include <linux/uaccess.h>
32
33 #include "amdgpu.h"
34 #include "amdgpu_trace.h"
35
36 #define AMDGPU_BO_LIST_MAX_PRIORITY 32u
37 #define AMDGPU_BO_LIST_NUM_BUCKETS (AMDGPU_BO_LIST_MAX_PRIORITY + 1)
38
amdgpu_bo_list_free_rcu(struct rcu_head * rcu)39 static void amdgpu_bo_list_free_rcu(struct rcu_head *rcu)
40 {
41 struct amdgpu_bo_list *list = container_of(rcu, struct amdgpu_bo_list,
42 rhead);
43
44 kvfree(list);
45 }
46
amdgpu_bo_list_free(struct kref * ref)47 static void amdgpu_bo_list_free(struct kref *ref)
48 {
49 struct amdgpu_bo_list *list = container_of(ref, struct amdgpu_bo_list,
50 refcount);
51 struct amdgpu_bo_list_entry *e;
52
53 amdgpu_bo_list_for_each_entry(e, list) {
54 struct amdgpu_bo *bo = ttm_to_amdgpu_bo(e->tv.bo);
55
56 amdgpu_bo_unref(&bo);
57 }
58
59 call_rcu(&list->rhead, amdgpu_bo_list_free_rcu);
60 }
61
amdgpu_bo_list_create(struct amdgpu_device * adev,struct drm_file * filp,struct drm_amdgpu_bo_list_entry * info,size_t num_entries,struct amdgpu_bo_list ** result)62 int amdgpu_bo_list_create(struct amdgpu_device *adev, struct drm_file *filp,
63 struct drm_amdgpu_bo_list_entry *info,
64 size_t num_entries, struct amdgpu_bo_list **result)
65 {
66 unsigned last_entry = 0, first_userptr = num_entries;
67 struct amdgpu_bo_list_entry *array;
68 struct amdgpu_bo_list *list;
69 uint64_t total_size = 0;
70 size_t size;
71 unsigned i;
72 int r;
73
74 if (num_entries > (SIZE_MAX - sizeof(struct amdgpu_bo_list))
75 / sizeof(struct amdgpu_bo_list_entry))
76 return -EINVAL;
77
78 size = sizeof(struct amdgpu_bo_list);
79 size += num_entries * sizeof(struct amdgpu_bo_list_entry);
80 list = kvmalloc(size, GFP_KERNEL);
81 if (!list)
82 return -ENOMEM;
83
84 kref_init(&list->refcount);
85 list->gds_obj = NULL;
86 list->gws_obj = NULL;
87 list->oa_obj = NULL;
88
89 array = amdgpu_bo_list_array_entry(list, 0);
90 memset(array, 0, num_entries * sizeof(struct amdgpu_bo_list_entry));
91
92 for (i = 0; i < num_entries; ++i) {
93 struct amdgpu_bo_list_entry *entry;
94 struct drm_gem_object *gobj;
95 struct amdgpu_bo *bo;
96 struct mm_struct *usermm;
97
98 gobj = drm_gem_object_lookup(filp, info[i].bo_handle);
99 if (!gobj) {
100 r = -ENOENT;
101 goto error_free;
102 }
103
104 bo = amdgpu_bo_ref(gem_to_amdgpu_bo(gobj));
105 drm_gem_object_put(gobj);
106
107 usermm = amdgpu_ttm_tt_get_usermm(bo->tbo.ttm);
108 if (usermm) {
109 if (usermm != current->mm) {
110 amdgpu_bo_unref(&bo);
111 r = -EPERM;
112 goto error_free;
113 }
114 entry = &array[--first_userptr];
115 } else {
116 entry = &array[last_entry++];
117 }
118
119 entry->priority = min(info[i].bo_priority,
120 AMDGPU_BO_LIST_MAX_PRIORITY);
121 entry->tv.bo = &bo->tbo;
122
123 if (bo->preferred_domains == AMDGPU_GEM_DOMAIN_GDS)
124 list->gds_obj = bo;
125 if (bo->preferred_domains == AMDGPU_GEM_DOMAIN_GWS)
126 list->gws_obj = bo;
127 if (bo->preferred_domains == AMDGPU_GEM_DOMAIN_OA)
128 list->oa_obj = bo;
129
130 total_size += amdgpu_bo_size(bo);
131 trace_amdgpu_bo_list_set(list, bo);
132 }
133
134 list->first_userptr = first_userptr;
135 list->num_entries = num_entries;
136
137 trace_amdgpu_cs_bo_status(list->num_entries, total_size);
138
139 *result = list;
140 return 0;
141
142 error_free:
143 for (i = 0; i < last_entry; ++i) {
144 struct amdgpu_bo *bo = ttm_to_amdgpu_bo(array[i].tv.bo);
145
146 amdgpu_bo_unref(&bo);
147 }
148 for (i = first_userptr; i < num_entries; ++i) {
149 struct amdgpu_bo *bo = ttm_to_amdgpu_bo(array[i].tv.bo);
150
151 amdgpu_bo_unref(&bo);
152 }
153 kvfree(list);
154 return r;
155
156 }
157
amdgpu_bo_list_destroy(struct amdgpu_fpriv * fpriv,int id)158 static void amdgpu_bo_list_destroy(struct amdgpu_fpriv *fpriv, int id)
159 {
160 struct amdgpu_bo_list *list;
161
162 mutex_lock(&fpriv->bo_list_lock);
163 list = idr_remove(&fpriv->bo_list_handles, id);
164 mutex_unlock(&fpriv->bo_list_lock);
165 if (list)
166 kref_put(&list->refcount, amdgpu_bo_list_free);
167 }
168
amdgpu_bo_list_get(struct amdgpu_fpriv * fpriv,int id,struct amdgpu_bo_list ** result)169 int amdgpu_bo_list_get(struct amdgpu_fpriv *fpriv, int id,
170 struct amdgpu_bo_list **result)
171 {
172 rcu_read_lock();
173 *result = idr_find(&fpriv->bo_list_handles, id);
174
175 if (*result && kref_get_unless_zero(&(*result)->refcount)) {
176 rcu_read_unlock();
177 return 0;
178 }
179
180 rcu_read_unlock();
181 *result = NULL;
182 return -ENOENT;
183 }
184
amdgpu_bo_list_get_list(struct amdgpu_bo_list * list,struct list_head * validated)185 void amdgpu_bo_list_get_list(struct amdgpu_bo_list *list,
186 struct list_head *validated)
187 {
188 /* This is based on the bucket sort with O(n) time complexity.
189 * An item with priority "i" is added to bucket[i]. The lists are then
190 * concatenated in descending order.
191 */
192 struct list_head bucket[AMDGPU_BO_LIST_NUM_BUCKETS];
193 struct amdgpu_bo_list_entry *e;
194 unsigned i;
195
196 for (i = 0; i < AMDGPU_BO_LIST_NUM_BUCKETS; i++)
197 INIT_LIST_HEAD(&bucket[i]);
198
199 /* Since buffers which appear sooner in the relocation list are
200 * likely to be used more often than buffers which appear later
201 * in the list, the sort mustn't change the ordering of buffers
202 * with the same priority, i.e. it must be stable.
203 */
204 amdgpu_bo_list_for_each_entry(e, list) {
205 struct amdgpu_bo *bo = ttm_to_amdgpu_bo(e->tv.bo);
206 unsigned priority = e->priority;
207
208 if (!bo->parent)
209 list_add_tail(&e->tv.head, &bucket[priority]);
210
211 e->user_pages = NULL;
212 }
213
214 /* Connect the sorted buckets in the output list. */
215 for (i = 0; i < AMDGPU_BO_LIST_NUM_BUCKETS; i++)
216 list_splice(&bucket[i], validated);
217 }
218
amdgpu_bo_list_put(struct amdgpu_bo_list * list)219 void amdgpu_bo_list_put(struct amdgpu_bo_list *list)
220 {
221 kref_put(&list->refcount, amdgpu_bo_list_free);
222 }
223
amdgpu_bo_create_list_entry_array(struct drm_amdgpu_bo_list_in * in,struct drm_amdgpu_bo_list_entry ** info_param)224 int amdgpu_bo_create_list_entry_array(struct drm_amdgpu_bo_list_in *in,
225 struct drm_amdgpu_bo_list_entry **info_param)
226 {
227 const void __user *uptr = u64_to_user_ptr(in->bo_info_ptr);
228 const uint32_t info_size = sizeof(struct drm_amdgpu_bo_list_entry);
229 struct drm_amdgpu_bo_list_entry *info;
230 int r;
231
232 info = kvmalloc_array(in->bo_number, info_size, GFP_KERNEL);
233 if (!info)
234 return -ENOMEM;
235
236 /* copy the handle array from userspace to a kernel buffer */
237 r = -EFAULT;
238 if (likely(info_size == in->bo_info_size)) {
239 unsigned long bytes = in->bo_number *
240 in->bo_info_size;
241
242 if (copy_from_user(info, uptr, bytes))
243 goto error_free;
244
245 } else {
246 unsigned long bytes = min(in->bo_info_size, info_size);
247 unsigned i;
248
249 memset(info, 0, in->bo_number * info_size);
250 for (i = 0; i < in->bo_number; ++i) {
251 if (copy_from_user(&info[i], uptr, bytes))
252 goto error_free;
253
254 uptr += in->bo_info_size;
255 }
256 }
257
258 *info_param = info;
259 return 0;
260
261 error_free:
262 kvfree(info);
263 return r;
264 }
265
amdgpu_bo_list_ioctl(struct drm_device * dev,void * data,struct drm_file * filp)266 int amdgpu_bo_list_ioctl(struct drm_device *dev, void *data,
267 struct drm_file *filp)
268 {
269 struct amdgpu_device *adev = drm_to_adev(dev);
270 struct amdgpu_fpriv *fpriv = filp->driver_priv;
271 union drm_amdgpu_bo_list *args = data;
272 uint32_t handle = args->in.list_handle;
273 struct drm_amdgpu_bo_list_entry *info = NULL;
274 struct amdgpu_bo_list *list, *old;
275 int r;
276
277 r = amdgpu_bo_create_list_entry_array(&args->in, &info);
278 if (r)
279 return r;
280
281 switch (args->in.operation) {
282 case AMDGPU_BO_LIST_OP_CREATE:
283 r = amdgpu_bo_list_create(adev, filp, info, args->in.bo_number,
284 &list);
285 if (r)
286 goto error_free;
287
288 mutex_lock(&fpriv->bo_list_lock);
289 r = idr_alloc(&fpriv->bo_list_handles, list, 1, 0, GFP_KERNEL);
290 mutex_unlock(&fpriv->bo_list_lock);
291 if (r < 0) {
292 goto error_put_list;
293 }
294
295 handle = r;
296 break;
297
298 case AMDGPU_BO_LIST_OP_DESTROY:
299 amdgpu_bo_list_destroy(fpriv, handle);
300 handle = 0;
301 break;
302
303 case AMDGPU_BO_LIST_OP_UPDATE:
304 r = amdgpu_bo_list_create(adev, filp, info, args->in.bo_number,
305 &list);
306 if (r)
307 goto error_free;
308
309 mutex_lock(&fpriv->bo_list_lock);
310 old = idr_replace(&fpriv->bo_list_handles, list, handle);
311 mutex_unlock(&fpriv->bo_list_lock);
312
313 if (IS_ERR(old)) {
314 r = PTR_ERR(old);
315 goto error_put_list;
316 }
317
318 amdgpu_bo_list_put(old);
319 break;
320
321 default:
322 r = -EINVAL;
323 goto error_free;
324 }
325
326 memset(args, 0, sizeof(*args));
327 args->out.list_handle = handle;
328 kvfree(info);
329
330 return 0;
331
332 error_put_list:
333 amdgpu_bo_list_put(list);
334
335 error_free:
336 kvfree(info);
337 return r;
338 }
339