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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright (C) 2005 - 2016 Broadcom
4  * All rights reserved.
5  *
6  * Contact Information:
7  * linux-drivers@emulex.com
8  *
9  * Emulex
10  * 3333 Susan Street
11  * Costa Mesa, CA 92626
12  */
13 
14 #ifndef BE_H
15 #define BE_H
16 
17 #include <linux/pci.h>
18 #include <linux/etherdevice.h>
19 #include <linux/delay.h>
20 #include <net/tcp.h>
21 #include <net/ip.h>
22 #include <net/ipv6.h>
23 #include <linux/if_vlan.h>
24 #include <linux/workqueue.h>
25 #include <linux/interrupt.h>
26 #include <linux/firmware.h>
27 #include <linux/slab.h>
28 #include <linux/u64_stats_sync.h>
29 #include <linux/cpumask.h>
30 #include <linux/hwmon.h>
31 #include <linux/hwmon-sysfs.h>
32 
33 #include "be_hw.h"
34 #include "be_roce.h"
35 
36 #define DRV_NAME		"be2net"
37 #define BE_NAME			"Emulex BladeEngine2"
38 #define BE3_NAME		"Emulex BladeEngine3"
39 #define OC_NAME			"Emulex OneConnect"
40 #define OC_NAME_BE		OC_NAME	"(be3)"
41 #define OC_NAME_LANCER		OC_NAME "(Lancer)"
42 #define OC_NAME_SH		OC_NAME "(Skyhawk)"
43 #define DRV_DESC		"Emulex OneConnect NIC Driver"
44 
45 #define BE_VENDOR_ID 		0x19a2
46 #define EMULEX_VENDOR_ID	0x10df
47 #define BE_DEVICE_ID1		0x211
48 #define BE_DEVICE_ID2		0x221
49 #define OC_DEVICE_ID1		0x700	/* Device Id for BE2 cards */
50 #define OC_DEVICE_ID2		0x710	/* Device Id for BE3 cards */
51 #define OC_DEVICE_ID3		0xe220	/* Device id for Lancer cards */
52 #define OC_DEVICE_ID4           0xe228   /* Device id for VF in Lancer */
53 #define OC_DEVICE_ID5		0x720	/* Device Id for Skyhawk cards */
54 #define OC_DEVICE_ID6		0x728   /* Device id for VF in SkyHawk */
55 #define OC_SUBSYS_DEVICE_ID1	0xE602
56 #define OC_SUBSYS_DEVICE_ID2	0xE642
57 #define OC_SUBSYS_DEVICE_ID3	0xE612
58 #define OC_SUBSYS_DEVICE_ID4	0xE652
59 
60 /* Number of bytes of an RX frame that are copied to skb->data */
61 #define BE_HDR_LEN		((u16) 64)
62 /* allocate extra space to allow tunneling decapsulation without head reallocation */
63 #define BE_RX_SKB_ALLOC_SIZE	256
64 
65 #define BE_MAX_JUMBO_FRAME_SIZE	9018
66 #define BE_MIN_MTU		256
67 #define BE_MAX_MTU              (BE_MAX_JUMBO_FRAME_SIZE -	\
68 				 (ETH_HLEN + ETH_FCS_LEN))
69 
70 /* Accommodate for QnQ configurations where VLAN insertion is enabled in HW */
71 #define BE_MAX_GSO_SIZE		(65535 - 2 * VLAN_HLEN)
72 
73 #define BE_NUM_VLANS_SUPPORTED	64
74 #define BE_MAX_EQD		128u
75 #define	BE_MAX_TX_FRAG_COUNT	30
76 
77 #define EVNT_Q_LEN		1024
78 #define TX_Q_LEN		2048
79 #define TX_CQ_LEN		1024
80 #define RX_Q_LEN		1024	/* Does not support any other value */
81 #define RX_CQ_LEN		1024
82 #define MCC_Q_LEN		128	/* total size not to exceed 8 pages */
83 #define MCC_CQ_LEN		256
84 
85 #define BE2_MAX_RSS_QS		4
86 #define BE3_MAX_RSS_QS		16
87 #define BE3_MAX_TX_QS		16
88 #define BE3_MAX_EVT_QS		16
89 #define BE3_SRIOV_MAX_EVT_QS	8
90 #define SH_VF_MAX_NIC_EQS	3	/* Skyhawk VFs can have a max of 4 EQs
91 					 * and at least 1 is granted to either
92 					 * SURF/DPDK
93 					 */
94 
95 #define MAX_PORT_RSS_TABLES	15
96 #define MAX_NIC_FUNCS		16
97 #define MAX_RX_QS		32
98 #define MAX_EVT_QS		32
99 #define MAX_TX_QS		32
100 
101 #define MAX_ROCE_EQS		5
102 #define MAX_MSIX_VECTORS	32
103 #define MIN_MSIX_VECTORS	1
104 #define BE_NAPI_WEIGHT		64
105 #define MAX_RX_POST		BE_NAPI_WEIGHT /* Frags posted at a time */
106 #define RX_FRAGS_REFILL_WM	(RX_Q_LEN - MAX_RX_POST)
107 #define MAX_NUM_POST_ERX_DB	255u
108 
109 #define MAX_VFS			30 /* Max VFs supported by BE3 FW */
110 #define FW_VER_LEN		32
111 #define	CNTL_SERIAL_NUM_WORDS	8  /* Controller serial number words */
112 #define	CNTL_SERIAL_NUM_WORD_SZ	(sizeof(u16)) /* Byte-sz of serial num word */
113 
114 #define	RSS_INDIR_TABLE_LEN	128
115 #define RSS_HASH_KEY_LEN	40
116 
117 #define BE_UNKNOWN_PHY_STATE	0xFF
118 
119 struct be_dma_mem {
120 	void *va;
121 	dma_addr_t dma;
122 	u32 size;
123 };
124 
125 struct be_queue_info {
126 	u32 len;
127 	u32 entry_size;	/* Size of an element in the queue */
128 	u32 tail, head;
129 	atomic_t used;	/* Number of valid elements in the queue */
130 	u32 id;
131 	struct be_dma_mem dma_mem;
132 	bool created;
133 };
134 
MODULO(u32 val,u32 limit)135 static inline u32 MODULO(u32 val, u32 limit)
136 {
137 	BUG_ON(limit & (limit - 1));
138 	return val & (limit - 1);
139 }
140 
index_adv(u32 * index,u32 val,u32 limit)141 static inline void index_adv(u32 *index, u32 val, u32 limit)
142 {
143 	*index = MODULO((*index + val), limit);
144 }
145 
index_inc(u32 * index,u32 limit)146 static inline void index_inc(u32 *index, u32 limit)
147 {
148 	*index = MODULO((*index + 1), limit);
149 }
150 
queue_head_node(struct be_queue_info * q)151 static inline void *queue_head_node(struct be_queue_info *q)
152 {
153 	return q->dma_mem.va + q->head * q->entry_size;
154 }
155 
queue_tail_node(struct be_queue_info * q)156 static inline void *queue_tail_node(struct be_queue_info *q)
157 {
158 	return q->dma_mem.va + q->tail * q->entry_size;
159 }
160 
queue_index_node(struct be_queue_info * q,u16 index)161 static inline void *queue_index_node(struct be_queue_info *q, u16 index)
162 {
163 	return q->dma_mem.va + index * q->entry_size;
164 }
165 
queue_head_inc(struct be_queue_info * q)166 static inline void queue_head_inc(struct be_queue_info *q)
167 {
168 	index_inc(&q->head, q->len);
169 }
170 
index_dec(u32 * index,u32 limit)171 static inline void index_dec(u32 *index, u32 limit)
172 {
173 	*index = MODULO((*index - 1), limit);
174 }
175 
queue_tail_inc(struct be_queue_info * q)176 static inline void queue_tail_inc(struct be_queue_info *q)
177 {
178 	index_inc(&q->tail, q->len);
179 }
180 
181 struct be_eq_obj {
182 	struct be_queue_info q;
183 	char desc[32];
184 
185 	struct be_adapter *adapter;
186 	struct napi_struct napi;
187 	u8 idx;			/* array index */
188 	u8 msix_idx;
189 	u16 spurious_intr;
190 	cpumask_var_t  affinity_mask;
191 } ____cacheline_aligned_in_smp;
192 
193 struct be_aic_obj {		/* Adaptive interrupt coalescing (AIC) info */
194 	u32 min_eqd;		/* in usecs */
195 	u32 max_eqd;		/* in usecs */
196 	u32 prev_eqd;		/* in usecs */
197 	u32 et_eqd;		/* configured val when aic is off */
198 	ulong jiffies;
199 	u64 rx_pkts_prev;	/* Used to calculate RX pps */
200 	u64 tx_reqs_prev;	/* Used to calculate TX pps */
201 };
202 
203 struct be_mcc_obj {
204 	struct be_queue_info q;
205 	struct be_queue_info cq;
206 	bool rearm_cq;
207 };
208 
209 struct be_tx_stats {
210 	u64 tx_bytes;
211 	u64 tx_pkts;
212 	u64 tx_vxlan_offload_pkts;
213 	u64 tx_reqs;
214 	u64 tx_compl;
215 	u32 tx_stops;
216 	u32 tx_drv_drops;	/* pkts dropped by driver */
217 	/* the error counters are described in be_ethtool.c */
218 	u32 tx_hdr_parse_err;
219 	u32 tx_dma_err;
220 	u32 tx_tso_err;
221 	u32 tx_spoof_check_err;
222 	u32 tx_qinq_err;
223 	u32 tx_internal_parity_err;
224 	u32 tx_sge_err;
225 	struct u64_stats_sync sync;
226 	struct u64_stats_sync sync_compl;
227 };
228 
229 /* Structure to hold some data of interest obtained from a TX CQE */
230 struct be_tx_compl_info {
231 	u8 status;		/* Completion status */
232 	u16 end_index;		/* Completed TXQ Index */
233 };
234 
235 struct be_tx_obj {
236 	u32 db_offset;
237 	struct be_tx_compl_info txcp;
238 	struct be_queue_info q;
239 	struct be_queue_info cq;
240 	/* Remember the skbs that were transmitted */
241 	struct sk_buff *sent_skb_list[TX_Q_LEN];
242 	struct be_tx_stats stats;
243 	u16 pend_wrb_cnt;	/* Number of WRBs yet to be given to HW */
244 	u16 last_req_wrb_cnt;	/* wrb cnt of the last req in the Q */
245 	u16 last_req_hdr;	/* index of the last req's hdr-wrb */
246 } ____cacheline_aligned_in_smp;
247 
248 /* Struct to remember the pages posted for rx frags */
249 struct be_rx_page_info {
250 	struct page *page;
251 	/* set to page-addr for last frag of the page & frag-addr otherwise */
252 	DEFINE_DMA_UNMAP_ADDR(bus);
253 	u16 page_offset;
254 	bool last_frag;		/* last frag of the page */
255 };
256 
257 struct be_rx_stats {
258 	u64 rx_bytes;
259 	u64 rx_pkts;
260 	u64 rx_vxlan_offload_pkts;
261 	u32 rx_drops_no_skbs;	/* skb allocation errors */
262 	u32 rx_drops_no_frags;	/* HW has no fetched frags */
263 	u32 rx_post_fail;	/* page post alloc failures */
264 	u32 rx_compl;
265 	u32 rx_mcast_pkts;
266 	u32 rx_compl_err;	/* completions with err set */
267 	struct u64_stats_sync sync;
268 };
269 
270 struct be_rx_compl_info {
271 	u32 rss_hash;
272 	u16 vlan_tag;
273 	u16 pkt_size;
274 	u16 port;
275 	u8 vlanf;
276 	u8 num_rcvd;
277 	u8 err;
278 	u8 ipf;
279 	u8 tcpf;
280 	u8 udpf;
281 	u8 ip_csum;
282 	u8 l4_csum;
283 	u8 ipv6;
284 	u8 qnq;
285 	u8 pkt_type;
286 	u8 ip_frag;
287 	u8 tunneled;
288 };
289 
290 struct be_rx_obj {
291 	struct be_adapter *adapter;
292 	struct be_queue_info q;
293 	struct be_queue_info cq;
294 	struct be_rx_compl_info rxcp;
295 	struct be_rx_page_info page_info_tbl[RX_Q_LEN];
296 	struct be_rx_stats stats;
297 	u8 rss_id;
298 	bool rx_post_starved;	/* Zero rx frags have been posted to BE */
299 } ____cacheline_aligned_in_smp;
300 
301 struct be_drv_stats {
302 	u32 eth_red_drops;
303 	u32 dma_map_errors;
304 	u32 rx_drops_no_pbuf;
305 	u32 rx_drops_no_txpb;
306 	u32 rx_drops_no_erx_descr;
307 	u32 rx_drops_no_tpre_descr;
308 	u32 rx_drops_too_many_frags;
309 	u32 forwarded_packets;
310 	u32 rx_drops_mtu;
311 	u32 rx_crc_errors;
312 	u32 rx_alignment_symbol_errors;
313 	u32 rx_pause_frames;
314 	u32 rx_priority_pause_frames;
315 	u32 rx_control_frames;
316 	u32 rx_in_range_errors;
317 	u32 rx_out_range_errors;
318 	u32 rx_frame_too_long;
319 	u32 rx_address_filtered;
320 	u32 rx_dropped_too_small;
321 	u32 rx_dropped_too_short;
322 	u32 rx_dropped_header_too_small;
323 	u32 rx_dropped_tcp_length;
324 	u32 rx_dropped_runt;
325 	u32 rx_ip_checksum_errs;
326 	u32 rx_tcp_checksum_errs;
327 	u32 rx_udp_checksum_errs;
328 	u32 tx_pauseframes;
329 	u32 tx_priority_pauseframes;
330 	u32 tx_controlframes;
331 	u32 rxpp_fifo_overflow_drop;
332 	u32 rx_input_fifo_overflow_drop;
333 	u32 pmem_fifo_overflow_drop;
334 	u32 jabber_events;
335 	u32 rx_roce_bytes_lsd;
336 	u32 rx_roce_bytes_msd;
337 	u32 rx_roce_frames;
338 	u32 roce_drops_payload_len;
339 	u32 roce_drops_crc;
340 };
341 
342 /* A vlan-id of 0xFFFF must be used to clear transparent vlan-tagging */
343 #define BE_RESET_VLAN_TAG_ID	0xFFFF
344 
345 struct be_vf_cfg {
346 	unsigned char mac_addr[ETH_ALEN];
347 	int if_handle;
348 	int pmac_id;
349 	u16 vlan_tag;
350 	u32 tx_rate;
351 	u32 plink_tracking;
352 	u32 privileges;
353 	bool spoofchk;
354 };
355 
356 enum vf_state {
357 	ENABLED = 0,
358 	ASSIGNED = 1
359 };
360 
361 #define BE_FLAGS_LINK_STATUS_INIT		BIT(1)
362 #define BE_FLAGS_SRIOV_ENABLED			BIT(2)
363 #define BE_FLAGS_WORKER_SCHEDULED		BIT(3)
364 #define BE_FLAGS_NAPI_ENABLED			BIT(6)
365 #define BE_FLAGS_QNQ_ASYNC_EVT_RCVD		BIT(7)
366 #define BE_FLAGS_VXLAN_OFFLOADS			BIT(8)
367 #define BE_FLAGS_SETUP_DONE			BIT(9)
368 #define BE_FLAGS_PHY_MISCONFIGURED		BIT(10)
369 #define BE_FLAGS_ERR_DETECTION_SCHEDULED	BIT(11)
370 #define BE_FLAGS_OS2BMC				BIT(12)
371 #define BE_FLAGS_TRY_RECOVERY			BIT(13)
372 
373 #define BE_UC_PMAC_COUNT			30
374 #define BE_VF_UC_PMAC_COUNT			2
375 
376 #define MAX_ERR_RECOVERY_RETRY_COUNT		3
377 #define ERR_DETECTION_DELAY			1000
378 
379 /* Ethtool set_dump flags */
380 #define LANCER_INITIATE_FW_DUMP			0x1
381 #define LANCER_DELETE_FW_DUMP			0x2
382 
383 struct phy_info {
384 /* From SFF-8472 spec */
385 #define SFP_VENDOR_NAME_LEN			17
386 	u8 transceiver;
387 	u8 autoneg;
388 	u8 fc_autoneg;
389 	u8 port_type;
390 	u16 phy_type;
391 	u16 interface_type;
392 	u32 misc_params;
393 	u16 auto_speeds_supported;
394 	u16 fixed_speeds_supported;
395 	int link_speed;
396 	u32 advertising;
397 	u32 supported;
398 	u8 cable_type;
399 	u8 vendor_name[SFP_VENDOR_NAME_LEN];
400 	u8 vendor_pn[SFP_VENDOR_NAME_LEN];
401 };
402 
403 struct be_resources {
404 	u16 max_vfs;		/* Total VFs "really" supported by FW/HW */
405 	u16 max_mcast_mac;
406 	u16 max_tx_qs;
407 	u16 max_rss_qs;
408 	u16 max_rx_qs;
409 	u16 max_cq_count;
410 	u16 max_uc_mac;		/* Max UC MACs programmable */
411 	u16 max_vlans;		/* Number of vlans supported */
412 	u16 max_iface_count;
413 	u16 max_mcc_count;
414 	u16 max_evt_qs;
415 	u16 max_nic_evt_qs;	/* NIC's share of evt qs */
416 	u32 if_cap_flags;
417 	u32 vf_if_cap_flags;	/* VF if capability flags */
418 	u32 flags;
419 	/* Calculated PF Pool's share of RSS Tables. This is not enforced by
420 	 * the FW, but is a self-imposed driver limitation.
421 	 */
422 	u16 max_rss_tables;
423 };
424 
425 /* These are port-wide values */
426 struct be_port_resources {
427 	u16 max_vfs;
428 	u16 nic_pfs;
429 };
430 
431 #define be_is_os2bmc_enabled(adapter) (adapter->flags & BE_FLAGS_OS2BMC)
432 
433 struct rss_info {
434 	u8 rsstable[RSS_INDIR_TABLE_LEN];
435 	u8 rss_queue[RSS_INDIR_TABLE_LEN];
436 	u8 rss_hkey[RSS_HASH_KEY_LEN];
437 	u64 rss_flags;
438 };
439 
440 #define BE_INVALID_DIE_TEMP	0xFF
441 struct be_hwmon {
442 	struct device *hwmon_dev;
443 	u8 be_on_die_temp;  /* Unit: millidegree Celsius */
444 };
445 
446 /* Macros to read/write the 'features' word of be_wrb_params structure.
447  */
448 #define	BE_WRB_F_BIT(name)			BE_WRB_F_##name##_BIT
449 #define	BE_WRB_F_MASK(name)			BIT_MASK(BE_WRB_F_##name##_BIT)
450 
451 #define	BE_WRB_F_GET(word, name)	\
452 	(((word) & (BE_WRB_F_MASK(name))) >> BE_WRB_F_BIT(name))
453 
454 #define	BE_WRB_F_SET(word, name, val)	\
455 	((word) |= (((val) << BE_WRB_F_BIT(name)) & BE_WRB_F_MASK(name)))
456 
457 /* Feature/offload bits */
458 enum {
459 	BE_WRB_F_CRC_BIT,		/* Ethernet CRC */
460 	BE_WRB_F_IPCS_BIT,		/* IP csum */
461 	BE_WRB_F_TCPCS_BIT,		/* TCP csum */
462 	BE_WRB_F_UDPCS_BIT,		/* UDP csum */
463 	BE_WRB_F_LSO_BIT,		/* LSO */
464 	BE_WRB_F_LSO6_BIT,		/* LSO6 */
465 	BE_WRB_F_VLAN_BIT,		/* VLAN */
466 	BE_WRB_F_VLAN_SKIP_HW_BIT,	/* Skip VLAN tag (workaround) */
467 	BE_WRB_F_OS2BMC_BIT		/* Send packet to the management ring */
468 };
469 
470 /* The structure below provides a HW-agnostic abstraction of WRB params
471  * retrieved from a TX skb. This is in turn passed to chip specific routines
472  * during transmit, to set the corresponding params in the WRB.
473  */
474 struct be_wrb_params {
475 	u32 features;	/* Feature bits */
476 	u16 vlan_tag;	/* VLAN tag */
477 	u16 lso_mss;	/* MSS for LSO */
478 };
479 
480 struct be_eth_addr {
481 	unsigned char mac[ETH_ALEN];
482 };
483 
484 #define BE_SEC	1000			/* in msec */
485 #define BE_MIN	(60 * BE_SEC)		/* in msec */
486 #define BE_HOUR	(60 * BE_MIN)		/* in msec */
487 
488 #define ERR_RECOVERY_MAX_RETRY_COUNT		3
489 #define ERR_RECOVERY_DETECTION_DELAY		BE_SEC
490 #define ERR_RECOVERY_RETRY_DELAY		(30 * BE_SEC)
491 
492 /* UE-detection-duration in BEx/Skyhawk:
493  * All PFs must wait for this duration after they detect UE before reading
494  * SLIPORT_SEMAPHORE register. At the end of this duration, the Firmware
495  * guarantees that the SLIPORT_SEMAPHORE register is updated to indicate
496  * if the UE is recoverable.
497  */
498 #define ERR_RECOVERY_UE_DETECT_DURATION			BE_SEC
499 
500 /* Initial idle time (in msec) to elapse after driver load,
501  * before UE recovery is allowed.
502  */
503 #define ERR_IDLE_HR			24
504 #define ERR_RECOVERY_IDLE_TIME		(ERR_IDLE_HR * BE_HOUR)
505 
506 /* Time interval (in msec) after which UE recovery can be repeated */
507 #define ERR_INTERVAL_HR			72
508 #define ERR_RECOVERY_INTERVAL		(ERR_INTERVAL_HR * BE_HOUR)
509 
510 /* BEx/SH UE recovery state machine */
511 enum {
512 	ERR_RECOVERY_ST_NONE = 0,		/* No Recovery */
513 	ERR_RECOVERY_ST_DETECT = 1,		/* UE detection duration */
514 	ERR_RECOVERY_ST_RESET = 2,		/* Reset Phase (PF0 only) */
515 	ERR_RECOVERY_ST_PRE_POLL = 3,		/* Pre-Poll Phase (all PFs) */
516 	ERR_RECOVERY_ST_REINIT = 4		/* Re-initialize Phase */
517 };
518 
519 struct be_error_recovery {
520 	union {
521 		u8 recovery_retries;	/* used for Lancer		*/
522 		u8 recovery_state;	/* used for BEx and Skyhawk	*/
523 	};
524 
525 	/* BEx/Skyhawk error recovery variables */
526 	bool recovery_supported;
527 	u16 ue_to_reset_time;		/* Time after UE, to soft reset
528 					 * the chip - PF0 only
529 					 */
530 	u16 ue_to_poll_time;		/* Time after UE, to Restart Polling
531 					 * of SLIPORT_SEMAPHORE reg
532 					 */
533 	u16 last_err_code;
534 	unsigned long probe_time;
535 	unsigned long last_recovery_time;
536 
537 	/* Common to both Lancer & BEx/SH error recovery */
538 	u32 resched_delay;
539 	struct delayed_work err_detection_work;
540 };
541 
542 /* Ethtool priv_flags */
543 #define	BE_DISABLE_TPE_RECOVERY	0x1
544 
545 struct be_vxlan_port {
546 	struct list_head list;
547 	__be16 port;		/* VxLAN UDP dst port */
548 	int port_aliases;	/* alias count */
549 };
550 
551 struct be_adapter {
552 	struct pci_dev *pdev;
553 	struct net_device *netdev;
554 
555 	u8 __iomem *csr;	/* CSR BAR used only for BE2/3 */
556 	u8 __iomem *db;		/* Door Bell */
557 	u8 __iomem *pcicfg;	/* On SH,BEx only. Shadow of PCI config space */
558 
559 	struct mutex mbox_lock; /* For serializing mbox cmds to BE card */
560 	struct be_dma_mem mbox_mem;
561 	/* Mbox mem is adjusted to align to 16 bytes. The allocated addr
562 	 * is stored for freeing purpose */
563 	struct be_dma_mem mbox_mem_alloced;
564 
565 	struct be_mcc_obj mcc_obj;
566 	struct mutex mcc_lock;	/* For serializing mcc cmds to BE card */
567 	spinlock_t mcc_cq_lock;
568 
569 	u16 cfg_num_rx_irqs;		/* configured via set-channels */
570 	u16 cfg_num_tx_irqs;		/* configured via set-channels */
571 	u16 num_evt_qs;
572 	u16 num_msix_vec;
573 	struct be_eq_obj eq_obj[MAX_EVT_QS];
574 	struct msix_entry msix_entries[MAX_MSIX_VECTORS];
575 	bool isr_registered;
576 
577 	/* TX Rings */
578 	u16 num_tx_qs;
579 	struct be_tx_obj tx_obj[MAX_TX_QS];
580 
581 	/* Rx rings */
582 	u16 num_rx_qs;
583 	u16 num_rss_qs;
584 	u16 need_def_rxq;
585 	struct be_rx_obj rx_obj[MAX_RX_QS];
586 	u32 big_page_size;	/* Compounded page size shared by rx wrbs */
587 
588 	struct be_drv_stats drv_stats;
589 	struct be_aic_obj aic_obj[MAX_EVT_QS];
590 	bool aic_enabled;
591 	u8 vlan_prio_bmap;	/* Available Priority BitMap */
592 	u16 recommended_prio_bits;/* Recommended Priority bits in vlan tag */
593 	struct be_dma_mem rx_filter; /* Cmd DMA mem for rx-filter */
594 
595 	struct be_dma_mem stats_cmd;
596 	/* Work queue used to perform periodic tasks like getting statistics */
597 	struct delayed_work work;
598 	u16 work_counter;
599 
600 	u8 recovery_retries;
601 	u8 err_flags;
602 	bool pcicfg_mapped;	/* pcicfg obtained via pci_iomap() */
603 	u32 flags;
604 	u32 cmd_privileges;
605 	/* Ethtool knobs and info */
606 	char fw_ver[FW_VER_LEN];
607 	char fw_on_flash[FW_VER_LEN];
608 
609 	/* IFACE filtering fields */
610 	int if_handle;		/* Used to configure filtering */
611 	u32 if_flags;		/* Interface filtering flags */
612 	u32 *pmac_id;		/* MAC addr handle used by BE card */
613 	struct be_eth_addr *uc_list;/* list of uc-addrs programmed (not perm) */
614 	u32 uc_macs;		/* Count of secondary UC MAC programmed */
615 	struct be_eth_addr *mc_list;/* list of mcast addrs programmed */
616 	u32 mc_count;
617 	unsigned long vids[BITS_TO_LONGS(VLAN_N_VID)];
618 	u16 vlans_added;
619 	bool update_uc_list;
620 	bool update_mc_list;
621 	struct mutex rx_filter_lock;/* For protecting vids[] & mc/uc_list[] */
622 
623 	u32 beacon_state;	/* for set_phys_id */
624 
625 	u32 port_num;
626 	char port_name;
627 	u8 mc_type;
628 	u32 function_mode;
629 	u32 function_caps;
630 	u32 rx_fc;		/* Rx flow control */
631 	u32 tx_fc;		/* Tx flow control */
632 	bool stats_cmd_sent;
633 	struct {
634 		u32 size;
635 		u32 total_size;
636 		u64 io_addr;
637 	} roce_db;
638 	u32 num_msix_roce_vec;
639 	struct ocrdma_dev *ocrdma_dev;
640 	struct list_head entry;
641 
642 	u32 flash_status;
643 	struct completion et_cmd_compl;
644 
645 	struct be_resources pool_res;	/* resources available for the port */
646 	struct be_resources res;	/* resources available for the func */
647 	u16 num_vfs;			/* Number of VFs provisioned by PF */
648 	u8 pf_num;			/* Numbering used by FW, starts at 0 */
649 	u8 vf_num;			/* Numbering used by FW, starts at 1 */
650 	u8 virtfn;
651 	struct be_vf_cfg *vf_cfg;
652 	bool be3_native;
653 	u32 sli_family;
654 	u8 hba_port_num;
655 	u16 pvid;
656 	__be16 vxlan_port;		/* offloaded vxlan port num */
657 	struct phy_info phy;
658 	u8 wol_cap;
659 	bool wol_en;
660 	u16 asic_rev;
661 	u16 qnq_vid;
662 	u32 msg_enable;
663 	int be_get_temp_freq;
664 	struct be_hwmon hwmon_info;
665 	struct rss_info rss_info;
666 	/* Filters for packets that need to be sent to BMC */
667 	u32 bmc_filt_mask;
668 	u32 fat_dump_len;
669 	u16 serial_num[CNTL_SERIAL_NUM_WORDS];
670 	u8 phy_state; /* state of sfp optics (functional, faulted, etc.,) */
671 	u8 dev_mac[ETH_ALEN];
672 	u32 priv_flags; /* ethtool get/set_priv_flags() */
673 	struct be_error_recovery error_recovery;
674 };
675 
676 /* Used for defered FW config cmds. Add fields to this struct as reqd */
677 struct be_cmd_work {
678 	struct work_struct work;
679 	struct be_adapter *adapter;
680 };
681 
682 #define be_physfn(adapter)		(!adapter->virtfn)
683 #define be_virtfn(adapter)		(adapter->virtfn)
684 #define sriov_enabled(adapter)		(adapter->flags &	\
685 					 BE_FLAGS_SRIOV_ENABLED)
686 
687 #define for_all_vfs(adapter, vf_cfg, i)					\
688 	for (i = 0, vf_cfg = &adapter->vf_cfg[i]; i < adapter->num_vfs;	\
689 		i++, vf_cfg++)
690 
691 #define ON				1
692 #define OFF				0
693 
694 #define be_max_vlans(adapter)		(adapter->res.max_vlans)
695 #define be_max_uc(adapter)		(adapter->res.max_uc_mac)
696 #define be_max_mc(adapter)		(adapter->res.max_mcast_mac)
697 #define be_max_vfs(adapter)		(adapter->pool_res.max_vfs)
698 #define be_max_rss(adapter)		(adapter->res.max_rss_qs)
699 #define be_max_txqs(adapter)		(adapter->res.max_tx_qs)
700 #define be_max_prio_txqs(adapter)	(adapter->res.max_prio_tx_qs)
701 #define be_max_rxqs(adapter)		(adapter->res.max_rx_qs)
702 /* Max number of EQs available for the function (NIC + RoCE (if enabled)) */
703 #define be_max_func_eqs(adapter)	(adapter->res.max_evt_qs)
704 /* Max number of EQs available avaialble only for NIC */
705 #define be_max_nic_eqs(adapter)		(adapter->res.max_nic_evt_qs)
706 #define be_if_cap_flags(adapter)	(adapter->res.if_cap_flags)
707 #define be_max_pf_pool_rss_tables(adapter)	\
708 				(adapter->pool_res.max_rss_tables)
709 /* Max irqs avaialble for NIC */
710 #define be_max_irqs(adapter)		\
711 			(min_t(u16, be_max_nic_eqs(adapter), num_online_cpus()))
712 
713 /* Max irqs *needed* for RX queues */
be_max_rx_irqs(struct be_adapter * adapter)714 static inline u16 be_max_rx_irqs(struct be_adapter *adapter)
715 {
716 	/* If no RSS, need atleast one irq for def-RXQ */
717 	u16 num = max_t(u16, be_max_rss(adapter), 1);
718 
719 	return min_t(u16, num, be_max_irqs(adapter));
720 }
721 
722 /* Max irqs *needed* for TX queues */
be_max_tx_irqs(struct be_adapter * adapter)723 static inline u16 be_max_tx_irqs(struct be_adapter *adapter)
724 {
725 	return min_t(u16, be_max_txqs(adapter), be_max_irqs(adapter));
726 }
727 
728 /* Max irqs *needed* for combined queues */
be_max_qp_irqs(struct be_adapter * adapter)729 static inline u16 be_max_qp_irqs(struct be_adapter *adapter)
730 {
731 	return min(be_max_tx_irqs(adapter), be_max_rx_irqs(adapter));
732 }
733 
734 /* Max irqs *needed* for RX and TX queues together */
be_max_any_irqs(struct be_adapter * adapter)735 static inline u16 be_max_any_irqs(struct be_adapter *adapter)
736 {
737 	return max(be_max_tx_irqs(adapter), be_max_rx_irqs(adapter));
738 }
739 
740 /* Is BE in pvid_tagging mode */
741 #define be_pvid_tagging_enabled(adapter)	(adapter->pvid)
742 
743 /* Is BE in QNQ multi-channel mode */
744 #define be_is_qnq_mode(adapter)		(adapter->function_mode & QNQ_MODE)
745 
746 #ifdef CONFIG_BE2NET_LANCER
747 #define lancer_chip(adapter)	(adapter->pdev->device == OC_DEVICE_ID3 || \
748 				 adapter->pdev->device == OC_DEVICE_ID4)
749 #else
750 #define lancer_chip(adapter)	(0)
751 #endif /* CONFIG_BE2NET_LANCER */
752 
753 #ifdef CONFIG_BE2NET_SKYHAWK
754 #define skyhawk_chip(adapter)	(adapter->pdev->device == OC_DEVICE_ID5 || \
755 				 adapter->pdev->device == OC_DEVICE_ID6)
756 #else
757 #define skyhawk_chip(adapter)	(0)
758 #endif /* CONFIG_BE2NET_SKYHAWK */
759 
760 #ifdef CONFIG_BE2NET_BE3
761 #define BE3_chip(adapter)	(adapter->pdev->device == BE_DEVICE_ID2 || \
762 				 adapter->pdev->device == OC_DEVICE_ID2)
763 #else
764 #define BE3_chip(adapter)	(0)
765 #endif /* CONFIG_BE2NET_BE3 */
766 
767 #ifdef CONFIG_BE2NET_BE2
768 #define BE2_chip(adapter)	(adapter->pdev->device == BE_DEVICE_ID1 || \
769 				 adapter->pdev->device == OC_DEVICE_ID1)
770 #else
771 #define BE2_chip(adapter)	(0)
772 #endif /* CONFIG_BE2NET_BE2 */
773 
774 #define BEx_chip(adapter)	(BE3_chip(adapter) || BE2_chip(adapter))
775 
776 #define be_roce_supported(adapter)	(skyhawk_chip(adapter) && \
777 					(adapter->function_mode & RDMA_ENABLED))
778 
779 extern const struct ethtool_ops be_ethtool_ops;
780 
781 #define msix_enabled(adapter)		(adapter->num_msix_vec > 0)
782 #define num_irqs(adapter)		(msix_enabled(adapter) ?	\
783 						adapter->num_msix_vec : 1)
784 #define tx_stats(txo)			(&(txo)->stats)
785 #define rx_stats(rxo)			(&(rxo)->stats)
786 
787 /* The default RXQ is the last RXQ */
788 #define default_rxo(adpt)		(&adpt->rx_obj[adpt->num_rx_qs - 1])
789 
790 #define for_all_rx_queues(adapter, rxo, i)				\
791 	for (i = 0, rxo = &adapter->rx_obj[i]; i < adapter->num_rx_qs;	\
792 		i++, rxo++)
793 
794 #define for_all_rss_queues(adapter, rxo, i)				\
795 	for (i = 0, rxo = &adapter->rx_obj[i]; i < adapter->num_rss_qs;	\
796 		i++, rxo++)
797 
798 #define for_all_tx_queues(adapter, txo, i)				\
799 	for (i = 0, txo = &adapter->tx_obj[i]; i < adapter->num_tx_qs;	\
800 		i++, txo++)
801 
802 #define for_all_evt_queues(adapter, eqo, i)				\
803 	for (i = 0, eqo = &adapter->eq_obj[i]; i < adapter->num_evt_qs; \
804 		i++, eqo++)
805 
806 #define for_all_rx_queues_on_eq(adapter, eqo, rxo, i)			\
807 	for (i = eqo->idx, rxo = &adapter->rx_obj[i]; i < adapter->num_rx_qs;\
808 		 i += adapter->num_evt_qs, rxo += adapter->num_evt_qs)
809 
810 #define for_all_tx_queues_on_eq(adapter, eqo, txo, i)			\
811 	for (i = eqo->idx, txo = &adapter->tx_obj[i]; i < adapter->num_tx_qs;\
812 		i += adapter->num_evt_qs, txo += adapter->num_evt_qs)
813 
814 #define is_mcc_eqo(eqo)			(eqo->idx == 0)
815 #define mcc_eqo(adapter)		(&adapter->eq_obj[0])
816 
817 #define PAGE_SHIFT_4K		12
818 #define PAGE_SIZE_4K		(1 << PAGE_SHIFT_4K)
819 
820 /* Returns number of pages spanned by the data starting at the given addr */
821 #define PAGES_4K_SPANNED(_address, size) 				\
822 		((u32)((((size_t)(_address) & (PAGE_SIZE_4K - 1)) + 	\
823 			(size) + (PAGE_SIZE_4K - 1)) >> PAGE_SHIFT_4K))
824 
825 /* Returns bit offset within a DWORD of a bitfield */
826 #define AMAP_BIT_OFFSET(_struct, field)  				\
827 		(((size_t)&(((_struct *)0)->field))%32)
828 
829 /* Returns the bit mask of the field that is NOT shifted into location. */
amap_mask(u32 bitsize)830 static inline u32 amap_mask(u32 bitsize)
831 {
832 	return (bitsize == 32 ? 0xFFFFFFFF : (1 << bitsize) - 1);
833 }
834 
835 static inline void
amap_set(void * ptr,u32 dw_offset,u32 mask,u32 offset,u32 value)836 amap_set(void *ptr, u32 dw_offset, u32 mask, u32 offset, u32 value)
837 {
838 	u32 *dw = (u32 *) ptr + dw_offset;
839 	*dw &= ~(mask << offset);
840 	*dw |= (mask & value) << offset;
841 }
842 
843 #define AMAP_SET_BITS(_struct, field, ptr, val)				\
844 		amap_set(ptr,						\
845 			offsetof(_struct, field)/32,			\
846 			amap_mask(sizeof(((_struct *)0)->field)),	\
847 			AMAP_BIT_OFFSET(_struct, field),		\
848 			val)
849 
amap_get(void * ptr,u32 dw_offset,u32 mask,u32 offset)850 static inline u32 amap_get(void *ptr, u32 dw_offset, u32 mask, u32 offset)
851 {
852 	u32 *dw = (u32 *) ptr;
853 	return mask & (*(dw + dw_offset) >> offset);
854 }
855 
856 #define AMAP_GET_BITS(_struct, field, ptr)				\
857 		amap_get(ptr,						\
858 			offsetof(_struct, field)/32,			\
859 			amap_mask(sizeof(((_struct *)0)->field)),	\
860 			AMAP_BIT_OFFSET(_struct, field))
861 
862 #define GET_RX_COMPL_V0_BITS(field, ptr)				\
863 		AMAP_GET_BITS(struct amap_eth_rx_compl_v0, field, ptr)
864 
865 #define GET_RX_COMPL_V1_BITS(field, ptr)				\
866 		AMAP_GET_BITS(struct amap_eth_rx_compl_v1, field, ptr)
867 
868 #define GET_TX_COMPL_BITS(field, ptr)					\
869 		AMAP_GET_BITS(struct amap_eth_tx_compl, field, ptr)
870 
871 #define SET_TX_WRB_HDR_BITS(field, ptr, val)				\
872 		AMAP_SET_BITS(struct amap_eth_hdr_wrb, field, ptr, val)
873 
874 #define be_dws_cpu_to_le(wrb, len)	swap_dws(wrb, len)
875 #define be_dws_le_to_cpu(wrb, len)	swap_dws(wrb, len)
swap_dws(void * wrb,int len)876 static inline void swap_dws(void *wrb, int len)
877 {
878 #ifdef __BIG_ENDIAN
879 	u32 *dw = wrb;
880 	BUG_ON(len % 4);
881 	do {
882 		*dw = cpu_to_le32(*dw);
883 		dw++;
884 		len -= 4;
885 	} while (len);
886 #endif				/* __BIG_ENDIAN */
887 }
888 
889 #define be_cmd_status(status)		(status > 0 ? -EIO : status)
890 
is_tcp_pkt(struct sk_buff * skb)891 static inline u8 is_tcp_pkt(struct sk_buff *skb)
892 {
893 	u8 val = 0;
894 
895 	if (ip_hdr(skb)->version == 4)
896 		val = (ip_hdr(skb)->protocol == IPPROTO_TCP);
897 	else if (ip_hdr(skb)->version == 6)
898 		val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_TCP);
899 
900 	return val;
901 }
902 
is_udp_pkt(struct sk_buff * skb)903 static inline u8 is_udp_pkt(struct sk_buff *skb)
904 {
905 	u8 val = 0;
906 
907 	if (ip_hdr(skb)->version == 4)
908 		val = (ip_hdr(skb)->protocol == IPPROTO_UDP);
909 	else if (ip_hdr(skb)->version == 6)
910 		val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_UDP);
911 
912 	return val;
913 }
914 
is_ipv4_pkt(struct sk_buff * skb)915 static inline bool is_ipv4_pkt(struct sk_buff *skb)
916 {
917 	return skb->protocol == htons(ETH_P_IP) && ip_hdr(skb)->version == 4;
918 }
919 
is_ipv6_ext_hdr(struct sk_buff * skb)920 static inline bool is_ipv6_ext_hdr(struct sk_buff *skb)
921 {
922 	if (ip_hdr(skb)->version == 6)
923 		return ipv6_ext_hdr(ipv6_hdr(skb)->nexthdr);
924 	else
925 		return false;
926 }
927 
928 #define be_error_recovering(adapter)	\
929 		(adapter->flags & BE_FLAGS_TRY_RECOVERY)
930 
931 #define BE_ERROR_EEH		1
932 #define BE_ERROR_UE		BIT(1)
933 #define BE_ERROR_FW		BIT(2)
934 #define BE_ERROR_TX		BIT(3)
935 #define BE_ERROR_HW		(BE_ERROR_EEH | BE_ERROR_UE | BE_ERROR_TX)
936 #define BE_ERROR_ANY		(BE_ERROR_EEH | BE_ERROR_UE | BE_ERROR_FW | \
937 				 BE_ERROR_TX)
938 #define BE_CLEAR_ALL		0xFF
939 
be_check_error(struct be_adapter * adapter,u32 err_type)940 static inline u8 be_check_error(struct be_adapter *adapter, u32 err_type)
941 {
942 	return (adapter->err_flags & err_type);
943 }
944 
be_set_error(struct be_adapter * adapter,int err_type)945 static inline void be_set_error(struct be_adapter *adapter, int err_type)
946 {
947 	struct net_device *netdev = adapter->netdev;
948 
949 	adapter->err_flags |= err_type;
950 	netif_carrier_off(netdev);
951 
952 	dev_info(&adapter->pdev->dev, "%s: Link down\n", netdev->name);
953 }
954 
be_clear_error(struct be_adapter * adapter,int err_type)955 static inline void  be_clear_error(struct be_adapter *adapter, int err_type)
956 {
957 	adapter->err_flags &= ~err_type;
958 }
959 
be_multi_rxq(const struct be_adapter * adapter)960 static inline bool be_multi_rxq(const struct be_adapter *adapter)
961 {
962 	return adapter->num_rx_qs > 1;
963 }
964 
965 void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm,
966 		  u16 num_popped);
967 void be_link_status_update(struct be_adapter *adapter, u8 link_status);
968 void be_parse_stats(struct be_adapter *adapter);
969 int be_load_fw(struct be_adapter *adapter, u8 *func);
970 bool be_is_wol_supported(struct be_adapter *adapter);
971 bool be_pause_supported(struct be_adapter *adapter);
972 u32 be_get_fw_log_level(struct be_adapter *adapter);
973 int be_update_queues(struct be_adapter *adapter);
974 int be_poll(struct napi_struct *napi, int budget);
975 void be_eqd_update(struct be_adapter *adapter, bool force_update);
976 
977 /*
978  * internal function to initialize-cleanup roce device.
979  */
980 void be_roce_dev_add(struct be_adapter *);
981 void be_roce_dev_remove(struct be_adapter *);
982 
983 /*
984  * internal function to open-close roce device during ifup-ifdown.
985  */
986 void be_roce_dev_shutdown(struct be_adapter *);
987 
988 #endif				/* BE_H */
989