1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Resource Director Technology(RDT)
4 * - Monitoring code
5 *
6 * Copyright (C) 2017 Intel Corporation
7 *
8 * Author:
9 * Vikas Shivappa <vikas.shivappa@intel.com>
10 *
11 * This replaces the cqm.c based on perf but we reuse a lot of
12 * code and datastructures originally from Peter Zijlstra and Matt Fleming.
13 *
14 * More information about RDT be found in the Intel (R) x86 Architecture
15 * Software Developer Manual June 2016, volume 3, section 17.17.
16 */
17
18 #include <linux/module.h>
19 #include <linux/slab.h>
20 #include <asm/cpu_device_id.h>
21 #include "internal.h"
22
23 struct rmid_entry {
24 u32 rmid;
25 int busy;
26 struct list_head list;
27 };
28
29 /**
30 * @rmid_free_lru A least recently used list of free RMIDs
31 * These RMIDs are guaranteed to have an occupancy less than the
32 * threshold occupancy
33 */
34 static LIST_HEAD(rmid_free_lru);
35
36 /**
37 * @rmid_limbo_count count of currently unused but (potentially)
38 * dirty RMIDs.
39 * This counts RMIDs that no one is currently using but that
40 * may have a occupancy value > intel_cqm_threshold. User can change
41 * the threshold occupancy value.
42 */
43 static unsigned int rmid_limbo_count;
44
45 /**
46 * @rmid_entry - The entry in the limbo and free lists.
47 */
48 static struct rmid_entry *rmid_ptrs;
49
50 /*
51 * Global boolean for rdt_monitor which is true if any
52 * resource monitoring is enabled.
53 */
54 bool rdt_mon_capable;
55
56 /*
57 * Global to indicate which monitoring events are enabled.
58 */
59 unsigned int rdt_mon_features;
60
61 /*
62 * This is the threshold cache occupancy at which we will consider an
63 * RMID available for re-allocation.
64 */
65 unsigned int resctrl_cqm_threshold;
66
__rmid_entry(u32 rmid)67 static inline struct rmid_entry *__rmid_entry(u32 rmid)
68 {
69 struct rmid_entry *entry;
70
71 entry = &rmid_ptrs[rmid];
72 WARN_ON(entry->rmid != rmid);
73
74 return entry;
75 }
76
__rmid_read(u32 rmid,u32 eventid)77 static u64 __rmid_read(u32 rmid, u32 eventid)
78 {
79 u64 val;
80
81 /*
82 * As per the SDM, when IA32_QM_EVTSEL.EvtID (bits 7:0) is configured
83 * with a valid event code for supported resource type and the bits
84 * IA32_QM_EVTSEL.RMID (bits 41:32) are configured with valid RMID,
85 * IA32_QM_CTR.data (bits 61:0) reports the monitored data.
86 * IA32_QM_CTR.Error (bit 63) and IA32_QM_CTR.Unavailable (bit 62)
87 * are error bits.
88 */
89 wrmsr(MSR_IA32_QM_EVTSEL, eventid, rmid);
90 rdmsrl(MSR_IA32_QM_CTR, val);
91
92 return val;
93 }
94
rmid_dirty(struct rmid_entry * entry)95 static bool rmid_dirty(struct rmid_entry *entry)
96 {
97 u64 val = __rmid_read(entry->rmid, QOS_L3_OCCUP_EVENT_ID);
98
99 return val >= resctrl_cqm_threshold;
100 }
101
102 /*
103 * Check the RMIDs that are marked as busy for this domain. If the
104 * reported LLC occupancy is below the threshold clear the busy bit and
105 * decrement the count. If the busy count gets to zero on an RMID, we
106 * free the RMID
107 */
__check_limbo(struct rdt_domain * d,bool force_free)108 void __check_limbo(struct rdt_domain *d, bool force_free)
109 {
110 struct rmid_entry *entry;
111 struct rdt_resource *r;
112 u32 crmid = 1, nrmid;
113
114 r = &rdt_resources_all[RDT_RESOURCE_L3];
115
116 /*
117 * Skip RMID 0 and start from RMID 1 and check all the RMIDs that
118 * are marked as busy for occupancy < threshold. If the occupancy
119 * is less than the threshold decrement the busy counter of the
120 * RMID and move it to the free list when the counter reaches 0.
121 */
122 for (;;) {
123 nrmid = find_next_bit(d->rmid_busy_llc, r->num_rmid, crmid);
124 if (nrmid >= r->num_rmid)
125 break;
126
127 entry = __rmid_entry(nrmid);
128 if (force_free || !rmid_dirty(entry)) {
129 clear_bit(entry->rmid, d->rmid_busy_llc);
130 if (!--entry->busy) {
131 rmid_limbo_count--;
132 list_add_tail(&entry->list, &rmid_free_lru);
133 }
134 }
135 crmid = nrmid + 1;
136 }
137 }
138
has_busy_rmid(struct rdt_resource * r,struct rdt_domain * d)139 bool has_busy_rmid(struct rdt_resource *r, struct rdt_domain *d)
140 {
141 return find_first_bit(d->rmid_busy_llc, r->num_rmid) != r->num_rmid;
142 }
143
144 /*
145 * As of now the RMIDs allocation is global.
146 * However we keep track of which packages the RMIDs
147 * are used to optimize the limbo list management.
148 */
alloc_rmid(void)149 int alloc_rmid(void)
150 {
151 struct rmid_entry *entry;
152
153 lockdep_assert_held(&rdtgroup_mutex);
154
155 if (list_empty(&rmid_free_lru))
156 return rmid_limbo_count ? -EBUSY : -ENOSPC;
157
158 entry = list_first_entry(&rmid_free_lru,
159 struct rmid_entry, list);
160 list_del(&entry->list);
161
162 return entry->rmid;
163 }
164
add_rmid_to_limbo(struct rmid_entry * entry)165 static void add_rmid_to_limbo(struct rmid_entry *entry)
166 {
167 struct rdt_resource *r;
168 struct rdt_domain *d;
169 int cpu;
170 u64 val;
171
172 r = &rdt_resources_all[RDT_RESOURCE_L3];
173
174 entry->busy = 0;
175 cpu = get_cpu();
176 list_for_each_entry(d, &r->domains, list) {
177 if (cpumask_test_cpu(cpu, &d->cpu_mask)) {
178 val = __rmid_read(entry->rmid, QOS_L3_OCCUP_EVENT_ID);
179 if (val <= resctrl_cqm_threshold)
180 continue;
181 }
182
183 /*
184 * For the first limbo RMID in the domain,
185 * setup up the limbo worker.
186 */
187 if (!has_busy_rmid(r, d))
188 cqm_setup_limbo_handler(d, CQM_LIMBOCHECK_INTERVAL);
189 set_bit(entry->rmid, d->rmid_busy_llc);
190 entry->busy++;
191 }
192 put_cpu();
193
194 if (entry->busy)
195 rmid_limbo_count++;
196 else
197 list_add_tail(&entry->list, &rmid_free_lru);
198 }
199
free_rmid(u32 rmid)200 void free_rmid(u32 rmid)
201 {
202 struct rmid_entry *entry;
203
204 if (!rmid)
205 return;
206
207 lockdep_assert_held(&rdtgroup_mutex);
208
209 entry = __rmid_entry(rmid);
210
211 if (is_llc_occupancy_enabled())
212 add_rmid_to_limbo(entry);
213 else
214 list_add_tail(&entry->list, &rmid_free_lru);
215 }
216
mbm_overflow_count(u64 prev_msr,u64 cur_msr,unsigned int width)217 static u64 mbm_overflow_count(u64 prev_msr, u64 cur_msr, unsigned int width)
218 {
219 u64 shift = 64 - width, chunks;
220
221 chunks = (cur_msr << shift) - (prev_msr << shift);
222 return chunks >>= shift;
223 }
224
__mon_event_count(u32 rmid,struct rmid_read * rr)225 static u64 __mon_event_count(u32 rmid, struct rmid_read *rr)
226 {
227 struct mbm_state *m;
228 u64 chunks, tval;
229
230 tval = __rmid_read(rmid, rr->evtid);
231 if (tval & (RMID_VAL_ERROR | RMID_VAL_UNAVAIL)) {
232 return tval;
233 }
234 switch (rr->evtid) {
235 case QOS_L3_OCCUP_EVENT_ID:
236 rr->val += tval;
237 return 0;
238 case QOS_L3_MBM_TOTAL_EVENT_ID:
239 m = &rr->d->mbm_total[rmid];
240 break;
241 case QOS_L3_MBM_LOCAL_EVENT_ID:
242 m = &rr->d->mbm_local[rmid];
243 break;
244 default:
245 /*
246 * Code would never reach here because an invalid
247 * event id would fail the __rmid_read.
248 */
249 return RMID_VAL_ERROR;
250 }
251
252 if (rr->first) {
253 memset(m, 0, sizeof(struct mbm_state));
254 m->prev_bw_msr = m->prev_msr = tval;
255 return 0;
256 }
257
258 chunks = mbm_overflow_count(m->prev_msr, tval, rr->r->mbm_width);
259 m->chunks += chunks;
260 m->prev_msr = tval;
261
262 rr->val += m->chunks;
263 return 0;
264 }
265
266 /*
267 * Supporting function to calculate the memory bandwidth
268 * and delta bandwidth in MBps.
269 */
mbm_bw_count(u32 rmid,struct rmid_read * rr)270 static void mbm_bw_count(u32 rmid, struct rmid_read *rr)
271 {
272 struct rdt_resource *r = &rdt_resources_all[RDT_RESOURCE_L3];
273 struct mbm_state *m = &rr->d->mbm_local[rmid];
274 u64 tval, cur_bw, chunks;
275
276 tval = __rmid_read(rmid, rr->evtid);
277 if (tval & (RMID_VAL_ERROR | RMID_VAL_UNAVAIL))
278 return;
279
280 chunks = mbm_overflow_count(m->prev_bw_msr, tval, rr->r->mbm_width);
281 cur_bw = (chunks * r->mon_scale) >> 20;
282
283 if (m->delta_comp)
284 m->delta_bw = abs(cur_bw - m->prev_bw);
285 m->delta_comp = false;
286 m->prev_bw = cur_bw;
287 m->prev_bw_msr = tval;
288 }
289
290 /*
291 * This is called via IPI to read the CQM/MBM counters
292 * on a domain.
293 */
mon_event_count(void * info)294 void mon_event_count(void *info)
295 {
296 struct rdtgroup *rdtgrp, *entry;
297 struct rmid_read *rr = info;
298 struct list_head *head;
299 u64 ret_val;
300
301 rdtgrp = rr->rgrp;
302
303 ret_val = __mon_event_count(rdtgrp->mon.rmid, rr);
304
305 /*
306 * For Ctrl groups read data from child monitor groups and
307 * add them together. Count events which are read successfully.
308 * Discard the rmid_read's reporting errors.
309 */
310 head = &rdtgrp->mon.crdtgrp_list;
311
312 if (rdtgrp->type == RDTCTRL_GROUP) {
313 list_for_each_entry(entry, head, mon.crdtgrp_list) {
314 if (__mon_event_count(entry->mon.rmid, rr) == 0)
315 ret_val = 0;
316 }
317 }
318
319 /* Report error if none of rmid_reads are successful */
320 if (ret_val)
321 rr->val = ret_val;
322 }
323
324 /*
325 * Feedback loop for MBA software controller (mba_sc)
326 *
327 * mba_sc is a feedback loop where we periodically read MBM counters and
328 * adjust the bandwidth percentage values via the IA32_MBA_THRTL_MSRs so
329 * that:
330 *
331 * current bandwdith(cur_bw) < user specified bandwidth(user_bw)
332 *
333 * This uses the MBM counters to measure the bandwidth and MBA throttle
334 * MSRs to control the bandwidth for a particular rdtgrp. It builds on the
335 * fact that resctrl rdtgroups have both monitoring and control.
336 *
337 * The frequency of the checks is 1s and we just tag along the MBM overflow
338 * timer. Having 1s interval makes the calculation of bandwidth simpler.
339 *
340 * Although MBA's goal is to restrict the bandwidth to a maximum, there may
341 * be a need to increase the bandwidth to avoid uncecessarily restricting
342 * the L2 <-> L3 traffic.
343 *
344 * Since MBA controls the L2 external bandwidth where as MBM measures the
345 * L3 external bandwidth the following sequence could lead to such a
346 * situation.
347 *
348 * Consider an rdtgroup which had high L3 <-> memory traffic in initial
349 * phases -> mba_sc kicks in and reduced bandwidth percentage values -> but
350 * after some time rdtgroup has mostly L2 <-> L3 traffic.
351 *
352 * In this case we may restrict the rdtgroup's L2 <-> L3 traffic as its
353 * throttle MSRs already have low percentage values. To avoid
354 * unnecessarily restricting such rdtgroups, we also increase the bandwidth.
355 */
update_mba_bw(struct rdtgroup * rgrp,struct rdt_domain * dom_mbm)356 static void update_mba_bw(struct rdtgroup *rgrp, struct rdt_domain *dom_mbm)
357 {
358 u32 closid, rmid, cur_msr, cur_msr_val, new_msr_val;
359 struct mbm_state *pmbm_data, *cmbm_data;
360 u32 cur_bw, delta_bw, user_bw;
361 struct rdt_resource *r_mba;
362 struct rdt_domain *dom_mba;
363 struct list_head *head;
364 struct rdtgroup *entry;
365
366 if (!is_mbm_local_enabled())
367 return;
368
369 r_mba = &rdt_resources_all[RDT_RESOURCE_MBA];
370 closid = rgrp->closid;
371 rmid = rgrp->mon.rmid;
372 pmbm_data = &dom_mbm->mbm_local[rmid];
373
374 dom_mba = get_domain_from_cpu(smp_processor_id(), r_mba);
375 if (!dom_mba) {
376 pr_warn_once("Failure to get domain for MBA update\n");
377 return;
378 }
379
380 cur_bw = pmbm_data->prev_bw;
381 user_bw = dom_mba->mbps_val[closid];
382 delta_bw = pmbm_data->delta_bw;
383 cur_msr_val = dom_mba->ctrl_val[closid];
384
385 /*
386 * For Ctrl groups read data from child monitor groups.
387 */
388 head = &rgrp->mon.crdtgrp_list;
389 list_for_each_entry(entry, head, mon.crdtgrp_list) {
390 cmbm_data = &dom_mbm->mbm_local[entry->mon.rmid];
391 cur_bw += cmbm_data->prev_bw;
392 delta_bw += cmbm_data->delta_bw;
393 }
394
395 /*
396 * Scale up/down the bandwidth linearly for the ctrl group. The
397 * bandwidth step is the bandwidth granularity specified by the
398 * hardware.
399 *
400 * The delta_bw is used when increasing the bandwidth so that we
401 * dont alternately increase and decrease the control values
402 * continuously.
403 *
404 * For ex: consider cur_bw = 90MBps, user_bw = 100MBps and if
405 * bandwidth step is 20MBps(> user_bw - cur_bw), we would keep
406 * switching between 90 and 110 continuously if we only check
407 * cur_bw < user_bw.
408 */
409 if (cur_msr_val > r_mba->membw.min_bw && user_bw < cur_bw) {
410 new_msr_val = cur_msr_val - r_mba->membw.bw_gran;
411 } else if (cur_msr_val < MAX_MBA_BW &&
412 (user_bw > (cur_bw + delta_bw))) {
413 new_msr_val = cur_msr_val + r_mba->membw.bw_gran;
414 } else {
415 return;
416 }
417
418 cur_msr = r_mba->msr_base + closid;
419 wrmsrl(cur_msr, delay_bw_map(new_msr_val, r_mba));
420 dom_mba->ctrl_val[closid] = new_msr_val;
421
422 /*
423 * Delta values are updated dynamically package wise for each
424 * rdtgrp everytime the throttle MSR changes value.
425 *
426 * This is because (1)the increase in bandwidth is not perfectly
427 * linear and only "approximately" linear even when the hardware
428 * says it is linear.(2)Also since MBA is a core specific
429 * mechanism, the delta values vary based on number of cores used
430 * by the rdtgrp.
431 */
432 pmbm_data->delta_comp = true;
433 list_for_each_entry(entry, head, mon.crdtgrp_list) {
434 cmbm_data = &dom_mbm->mbm_local[entry->mon.rmid];
435 cmbm_data->delta_comp = true;
436 }
437 }
438
mbm_update(struct rdt_resource * r,struct rdt_domain * d,int rmid)439 static void mbm_update(struct rdt_resource *r, struct rdt_domain *d, int rmid)
440 {
441 struct rmid_read rr;
442
443 rr.first = false;
444 rr.r = r;
445 rr.d = d;
446
447 /*
448 * This is protected from concurrent reads from user
449 * as both the user and we hold the global mutex.
450 */
451 if (is_mbm_total_enabled()) {
452 rr.evtid = QOS_L3_MBM_TOTAL_EVENT_ID;
453 __mon_event_count(rmid, &rr);
454 }
455 if (is_mbm_local_enabled()) {
456 rr.evtid = QOS_L3_MBM_LOCAL_EVENT_ID;
457 __mon_event_count(rmid, &rr);
458
459 /*
460 * Call the MBA software controller only for the
461 * control groups and when user has enabled
462 * the software controller explicitly.
463 */
464 if (is_mba_sc(NULL))
465 mbm_bw_count(rmid, &rr);
466 }
467 }
468
469 /*
470 * Handler to scan the limbo list and move the RMIDs
471 * to free list whose occupancy < threshold_occupancy.
472 */
cqm_handle_limbo(struct work_struct * work)473 void cqm_handle_limbo(struct work_struct *work)
474 {
475 unsigned long delay = msecs_to_jiffies(CQM_LIMBOCHECK_INTERVAL);
476 int cpu = smp_processor_id();
477 struct rdt_resource *r;
478 struct rdt_domain *d;
479
480 mutex_lock(&rdtgroup_mutex);
481
482 r = &rdt_resources_all[RDT_RESOURCE_L3];
483 d = container_of(work, struct rdt_domain, cqm_limbo.work);
484
485 __check_limbo(d, false);
486
487 if (has_busy_rmid(r, d))
488 schedule_delayed_work_on(cpu, &d->cqm_limbo, delay);
489
490 mutex_unlock(&rdtgroup_mutex);
491 }
492
cqm_setup_limbo_handler(struct rdt_domain * dom,unsigned long delay_ms)493 void cqm_setup_limbo_handler(struct rdt_domain *dom, unsigned long delay_ms)
494 {
495 unsigned long delay = msecs_to_jiffies(delay_ms);
496 int cpu;
497
498 cpu = cpumask_any(&dom->cpu_mask);
499 dom->cqm_work_cpu = cpu;
500
501 schedule_delayed_work_on(cpu, &dom->cqm_limbo, delay);
502 }
503
mbm_handle_overflow(struct work_struct * work)504 void mbm_handle_overflow(struct work_struct *work)
505 {
506 unsigned long delay = msecs_to_jiffies(MBM_OVERFLOW_INTERVAL);
507 struct rdtgroup *prgrp, *crgrp;
508 int cpu = smp_processor_id();
509 struct list_head *head;
510 struct rdt_resource *r;
511 struct rdt_domain *d;
512
513 mutex_lock(&rdtgroup_mutex);
514
515 if (!static_branch_likely(&rdt_mon_enable_key))
516 goto out_unlock;
517
518 r = &rdt_resources_all[RDT_RESOURCE_L3];
519 d = container_of(work, struct rdt_domain, mbm_over.work);
520
521 list_for_each_entry(prgrp, &rdt_all_groups, rdtgroup_list) {
522 mbm_update(r, d, prgrp->mon.rmid);
523
524 head = &prgrp->mon.crdtgrp_list;
525 list_for_each_entry(crgrp, head, mon.crdtgrp_list)
526 mbm_update(r, d, crgrp->mon.rmid);
527
528 if (is_mba_sc(NULL))
529 update_mba_bw(prgrp, d);
530 }
531
532 schedule_delayed_work_on(cpu, &d->mbm_over, delay);
533
534 out_unlock:
535 mutex_unlock(&rdtgroup_mutex);
536 }
537
mbm_setup_overflow_handler(struct rdt_domain * dom,unsigned long delay_ms)538 void mbm_setup_overflow_handler(struct rdt_domain *dom, unsigned long delay_ms)
539 {
540 unsigned long delay = msecs_to_jiffies(delay_ms);
541 int cpu;
542
543 if (!static_branch_likely(&rdt_mon_enable_key))
544 return;
545 cpu = cpumask_any(&dom->cpu_mask);
546 dom->mbm_work_cpu = cpu;
547 schedule_delayed_work_on(cpu, &dom->mbm_over, delay);
548 }
549
dom_data_init(struct rdt_resource * r)550 static int dom_data_init(struct rdt_resource *r)
551 {
552 struct rmid_entry *entry = NULL;
553 int i, nr_rmids;
554
555 nr_rmids = r->num_rmid;
556 rmid_ptrs = kcalloc(nr_rmids, sizeof(struct rmid_entry), GFP_KERNEL);
557 if (!rmid_ptrs)
558 return -ENOMEM;
559
560 for (i = 0; i < nr_rmids; i++) {
561 entry = &rmid_ptrs[i];
562 INIT_LIST_HEAD(&entry->list);
563
564 entry->rmid = i;
565 list_add_tail(&entry->list, &rmid_free_lru);
566 }
567
568 /*
569 * RMID 0 is special and is always allocated. It's used for all
570 * tasks that are not monitored.
571 */
572 entry = __rmid_entry(0);
573 list_del(&entry->list);
574
575 return 0;
576 }
577
578 static struct mon_evt llc_occupancy_event = {
579 .name = "llc_occupancy",
580 .evtid = QOS_L3_OCCUP_EVENT_ID,
581 };
582
583 static struct mon_evt mbm_total_event = {
584 .name = "mbm_total_bytes",
585 .evtid = QOS_L3_MBM_TOTAL_EVENT_ID,
586 };
587
588 static struct mon_evt mbm_local_event = {
589 .name = "mbm_local_bytes",
590 .evtid = QOS_L3_MBM_LOCAL_EVENT_ID,
591 };
592
593 /*
594 * Initialize the event list for the resource.
595 *
596 * Note that MBM events are also part of RDT_RESOURCE_L3 resource
597 * because as per the SDM the total and local memory bandwidth
598 * are enumerated as part of L3 monitoring.
599 */
l3_mon_evt_init(struct rdt_resource * r)600 static void l3_mon_evt_init(struct rdt_resource *r)
601 {
602 INIT_LIST_HEAD(&r->evt_list);
603
604 if (is_llc_occupancy_enabled())
605 list_add_tail(&llc_occupancy_event.list, &r->evt_list);
606 if (is_mbm_total_enabled())
607 list_add_tail(&mbm_total_event.list, &r->evt_list);
608 if (is_mbm_local_enabled())
609 list_add_tail(&mbm_local_event.list, &r->evt_list);
610 }
611
rdt_get_mon_l3_config(struct rdt_resource * r)612 int rdt_get_mon_l3_config(struct rdt_resource *r)
613 {
614 unsigned int mbm_offset = boot_cpu_data.x86_cache_mbm_width_offset;
615 unsigned int cl_size = boot_cpu_data.x86_cache_size;
616 int ret;
617
618 r->mon_scale = boot_cpu_data.x86_cache_occ_scale;
619 r->num_rmid = boot_cpu_data.x86_cache_max_rmid + 1;
620 r->mbm_width = MBM_CNTR_WIDTH_BASE;
621
622 if (mbm_offset > 0 && mbm_offset <= MBM_CNTR_WIDTH_OFFSET_MAX)
623 r->mbm_width += mbm_offset;
624 else if (mbm_offset > MBM_CNTR_WIDTH_OFFSET_MAX)
625 pr_warn("Ignoring impossible MBM counter offset\n");
626
627 /*
628 * A reasonable upper limit on the max threshold is the number
629 * of lines tagged per RMID if all RMIDs have the same number of
630 * lines tagged in the LLC.
631 *
632 * For a 35MB LLC and 56 RMIDs, this is ~1.8% of the LLC.
633 */
634 resctrl_cqm_threshold = cl_size * 1024 / r->num_rmid;
635
636 /* h/w works in units of "boot_cpu_data.x86_cache_occ_scale" */
637 resctrl_cqm_threshold /= r->mon_scale;
638
639 ret = dom_data_init(r);
640 if (ret)
641 return ret;
642
643 l3_mon_evt_init(r);
644
645 r->mon_capable = true;
646 r->mon_enabled = true;
647
648 return 0;
649 }
650