1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3 * Universal Flash Storage Host controller driver
4 * Copyright (C) 2011-2013 Samsung India Software Operations
5 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
6 *
7 * Authors:
8 * Santosh Yaraganavi <santosh.sy@samsung.com>
9 * Vinayak Holikatti <h.vinayak@samsung.com>
10 */
11
12 #ifndef _UFSHCD_H
13 #define _UFSHCD_H
14
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18 #include <linux/interrupt.h>
19 #include <linux/io.h>
20 #include <linux/delay.h>
21 #include <linux/slab.h>
22 #include <linux/spinlock.h>
23 #include <linux/rwsem.h>
24 #include <linux/workqueue.h>
25 #include <linux/errno.h>
26 #include <linux/types.h>
27 #include <linux/wait.h>
28 #include <linux/bitops.h>
29 #include <linux/pm_runtime.h>
30 #include <linux/clk.h>
31 #include <linux/completion.h>
32 #include <linux/regulator/consumer.h>
33 #include <linux/bitfield.h>
34 #include <linux/devfreq.h>
35 #include <linux/keyslot-manager.h>
36 #include "unipro.h"
37
38 #include <asm/irq.h>
39 #include <asm/byteorder.h>
40 #include <scsi/scsi.h>
41 #include <scsi/scsi_cmnd.h>
42 #include <scsi/scsi_host.h>
43 #include <scsi/scsi_tcq.h>
44 #include <scsi/scsi_dbg.h>
45 #include <scsi/scsi_eh.h>
46 #include <linux/android_kabi.h>
47
48 #include "ufs.h"
49 #include "ufs_quirks.h"
50 #include "ufshci.h"
51
52 #define UFSHCD "ufshcd"
53 #define UFSHCD_DRIVER_VERSION "0.2"
54
55 struct ufs_hba;
56
57 enum dev_cmd_type {
58 DEV_CMD_TYPE_NOP = 0x0,
59 DEV_CMD_TYPE_QUERY = 0x1,
60 };
61
62 enum ufs_event_type {
63 /* uic specific errors */
64 UFS_EVT_PA_ERR = 0,
65 UFS_EVT_DL_ERR,
66 UFS_EVT_NL_ERR,
67 UFS_EVT_TL_ERR,
68 UFS_EVT_DME_ERR,
69
70 /* fatal errors */
71 UFS_EVT_AUTO_HIBERN8_ERR,
72 UFS_EVT_FATAL_ERR,
73 UFS_EVT_LINK_STARTUP_FAIL,
74 UFS_EVT_RESUME_ERR,
75 UFS_EVT_SUSPEND_ERR,
76
77 /* abnormal events */
78 UFS_EVT_DEV_RESET,
79 UFS_EVT_HOST_RESET,
80 UFS_EVT_ABORT,
81
82 UFS_EVT_CNT,
83 };
84
85 /* UFSHCD error handling flags */
86 enum {
87 UFSHCD_EH_IN_PROGRESS = (1 << 0),
88 };
89
90 #define ufshcd_set_eh_in_progress(h) \
91 ((h)->eh_flags |= UFSHCD_EH_IN_PROGRESS)
92 #define ufshcd_eh_in_progress(h) \
93 ((h)->eh_flags & UFSHCD_EH_IN_PROGRESS)
94 #define ufshcd_clear_eh_in_progress(h) \
95 ((h)->eh_flags &= ~UFSHCD_EH_IN_PROGRESS)
96
97
98 /**
99 * struct uic_command - UIC command structure
100 * @command: UIC command
101 * @argument1: UIC command argument 1
102 * @argument2: UIC command argument 2
103 * @argument3: UIC command argument 3
104 * @cmd_active: Indicate if UIC command is outstanding
105 * @done: UIC command completion
106 */
107 struct uic_command {
108 u32 command;
109 u32 argument1;
110 u32 argument2;
111 u32 argument3;
112 int cmd_active;
113 struct completion done;
114 };
115
116 /* Used to differentiate the power management options */
117 enum ufs_pm_op {
118 UFS_RUNTIME_PM,
119 UFS_SYSTEM_PM,
120 UFS_SHUTDOWN_PM,
121 };
122
123 #define ufshcd_is_runtime_pm(op) ((op) == UFS_RUNTIME_PM)
124 #define ufshcd_is_system_pm(op) ((op) == UFS_SYSTEM_PM)
125 #define ufshcd_is_shutdown_pm(op) ((op) == UFS_SHUTDOWN_PM)
126
127 /* Host <-> Device UniPro Link state */
128 enum uic_link_state {
129 UIC_LINK_OFF_STATE = 0, /* Link powered down or disabled */
130 UIC_LINK_ACTIVE_STATE = 1, /* Link is in Fast/Slow/Sleep state */
131 UIC_LINK_HIBERN8_STATE = 2, /* Link is in Hibernate state */
132 UIC_LINK_BROKEN_STATE = 3, /* Link is in broken state */
133 };
134
135 #define ufshcd_is_link_off(hba) ((hba)->uic_link_state == UIC_LINK_OFF_STATE)
136 #define ufshcd_is_link_active(hba) ((hba)->uic_link_state == \
137 UIC_LINK_ACTIVE_STATE)
138 #define ufshcd_is_link_hibern8(hba) ((hba)->uic_link_state == \
139 UIC_LINK_HIBERN8_STATE)
140 #define ufshcd_is_link_broken(hba) ((hba)->uic_link_state == \
141 UIC_LINK_BROKEN_STATE)
142 #define ufshcd_set_link_off(hba) ((hba)->uic_link_state = UIC_LINK_OFF_STATE)
143 #define ufshcd_set_link_active(hba) ((hba)->uic_link_state = \
144 UIC_LINK_ACTIVE_STATE)
145 #define ufshcd_set_link_hibern8(hba) ((hba)->uic_link_state = \
146 UIC_LINK_HIBERN8_STATE)
147 #define ufshcd_set_link_broken(hba) ((hba)->uic_link_state = \
148 UIC_LINK_BROKEN_STATE)
149
150 #define ufshcd_set_ufs_dev_active(h) \
151 ((h)->curr_dev_pwr_mode = UFS_ACTIVE_PWR_MODE)
152 #define ufshcd_set_ufs_dev_sleep(h) \
153 ((h)->curr_dev_pwr_mode = UFS_SLEEP_PWR_MODE)
154 #define ufshcd_set_ufs_dev_poweroff(h) \
155 ((h)->curr_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE)
156 #define ufshcd_is_ufs_dev_active(h) \
157 ((h)->curr_dev_pwr_mode == UFS_ACTIVE_PWR_MODE)
158 #define ufshcd_is_ufs_dev_sleep(h) \
159 ((h)->curr_dev_pwr_mode == UFS_SLEEP_PWR_MODE)
160 #define ufshcd_is_ufs_dev_poweroff(h) \
161 ((h)->curr_dev_pwr_mode == UFS_POWERDOWN_PWR_MODE)
162
163 /*
164 * UFS Power management levels.
165 * Each level is in increasing order of power savings.
166 */
167 enum ufs_pm_level {
168 UFS_PM_LVL_0, /* UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE */
169 UFS_PM_LVL_1, /* UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE */
170 UFS_PM_LVL_2, /* UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE */
171 UFS_PM_LVL_3, /* UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE */
172 UFS_PM_LVL_4, /* UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE */
173 UFS_PM_LVL_5, /* UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE */
174 UFS_PM_LVL_MAX
175 };
176
177 struct ufs_pm_lvl_states {
178 enum ufs_dev_pwr_mode dev_state;
179 enum uic_link_state link_state;
180 };
181
182 /**
183 * struct ufshcd_lrb - local reference block
184 * @utr_descriptor_ptr: UTRD address of the command
185 * @ucd_req_ptr: UCD address of the command
186 * @ucd_rsp_ptr: Response UPIU address for this command
187 * @ucd_prdt_ptr: PRDT address of the command
188 * @utrd_dma_addr: UTRD dma address for debug
189 * @ucd_prdt_dma_addr: PRDT dma address for debug
190 * @ucd_rsp_dma_addr: UPIU response dma address for debug
191 * @ucd_req_dma_addr: UPIU request dma address for debug
192 * @cmd: pointer to SCSI command
193 * @sense_buffer: pointer to sense buffer address of the SCSI command
194 * @sense_bufflen: Length of the sense buffer
195 * @scsi_status: SCSI status of the command
196 * @command_type: SCSI, UFS, Query.
197 * @task_tag: Task tag of the command
198 * @lun: LUN of the command
199 * @intr_cmd: Interrupt command (doesn't participate in interrupt aggregation)
200 * @issue_time_stamp: time stamp for debug purposes
201 * @compl_time_stamp: time stamp for statistics
202 * @crypto_key_slot: the key slot to use for inline crypto (-1 if none)
203 * @data_unit_num: the data unit number for the first block for inline crypto
204 * @req_abort_skip: skip request abort task flag
205 */
206 struct ufshcd_lrb {
207 struct utp_transfer_req_desc *utr_descriptor_ptr;
208 struct utp_upiu_req *ucd_req_ptr;
209 struct utp_upiu_rsp *ucd_rsp_ptr;
210 struct ufshcd_sg_entry *ucd_prdt_ptr;
211
212 dma_addr_t utrd_dma_addr;
213 dma_addr_t ucd_req_dma_addr;
214 dma_addr_t ucd_rsp_dma_addr;
215 dma_addr_t ucd_prdt_dma_addr;
216
217 struct scsi_cmnd *cmd;
218 u8 *sense_buffer;
219 unsigned int sense_bufflen;
220 int scsi_status;
221
222 int command_type;
223 int task_tag;
224 u8 lun; /* UPIU LUN id field is only 8-bit wide */
225 bool intr_cmd;
226 ktime_t issue_time_stamp;
227 ktime_t compl_time_stamp;
228 #ifdef CONFIG_SCSI_UFS_CRYPTO
229 int crypto_key_slot;
230 u64 data_unit_num;
231 #endif
232
233 bool req_abort_skip;
234
235 ANDROID_KABI_RESERVE(1);
236 };
237
238 /**
239 * struct ufs_query - holds relevant data structures for query request
240 * @request: request upiu and function
241 * @descriptor: buffer for sending/receiving descriptor
242 * @response: response upiu and response
243 */
244 struct ufs_query {
245 struct ufs_query_req request;
246 u8 *descriptor;
247 struct ufs_query_res response;
248 };
249
250 /**
251 * struct ufs_dev_cmd - all assosiated fields with device management commands
252 * @type: device management command type - Query, NOP OUT
253 * @lock: lock to allow one command at a time
254 * @complete: internal commands completion
255 */
256 struct ufs_dev_cmd {
257 enum dev_cmd_type type;
258 struct mutex lock;
259 struct completion *complete;
260 struct ufs_query query;
261 };
262
263 /**
264 * struct ufs_clk_info - UFS clock related info
265 * @list: list headed by hba->clk_list_head
266 * @clk: clock node
267 * @name: clock name
268 * @max_freq: maximum frequency supported by the clock
269 * @min_freq: min frequency that can be used for clock scaling
270 * @curr_freq: indicates the current frequency that it is set to
271 * @keep_link_active: indicates that the clk should not be disabled if
272 link is active
273 * @enabled: variable to check against multiple enable/disable
274 */
275 struct ufs_clk_info {
276 struct list_head list;
277 struct clk *clk;
278 const char *name;
279 u32 max_freq;
280 u32 min_freq;
281 u32 curr_freq;
282 bool keep_link_active;
283 bool enabled;
284 };
285
286 enum ufs_notify_change_status {
287 PRE_CHANGE,
288 POST_CHANGE,
289 };
290
291 struct ufs_pa_layer_attr {
292 u32 gear_rx;
293 u32 gear_tx;
294 u32 lane_rx;
295 u32 lane_tx;
296 u32 pwr_rx;
297 u32 pwr_tx;
298 u32 hs_rate;
299 };
300
301 struct ufs_pwr_mode_info {
302 bool is_valid;
303 struct ufs_pa_layer_attr info;
304 };
305
306 /**
307 * struct ufs_hba_variant_ops - variant specific callbacks
308 * @name: variant name
309 * @init: called when the driver is initialized
310 * @exit: called to cleanup everything done in init
311 * @get_ufs_hci_version: called to get UFS HCI version
312 * @clk_scale_notify: notifies that clks are scaled up/down
313 * @setup_clocks: called before touching any of the controller registers
314 * @setup_regulators: called before accessing the host controller
315 * @hce_enable_notify: called before and after HCE enable bit is set to allow
316 * variant specific Uni-Pro initialization.
317 * @link_startup_notify: called before and after Link startup is carried out
318 * to allow variant specific Uni-Pro initialization.
319 * @pwr_change_notify: called before and after a power mode change
320 * is carried out to allow vendor spesific capabilities
321 * to be set.
322 * @setup_xfer_req: called before any transfer request is issued
323 * to set some things
324 * @setup_task_mgmt: called before any task management request is issued
325 * to set some things
326 * @hibern8_notify: called around hibern8 enter/exit
327 * @apply_dev_quirks: called to apply device specific quirks
328 * @suspend: called during host controller PM callback
329 * @resume: called during host controller PM callback
330 * @dbg_register_dump: used to dump controller debug information
331 * @phy_initialization: used to initialize phys
332 * @device_reset: called to issue a reset pulse on the UFS device
333 * @program_key: program or evict an inline encryption key
334 * @event_notify: called to notify important events
335 */
336 struct ufs_hba_variant_ops {
337 const char *name;
338 int (*init)(struct ufs_hba *);
339 void (*exit)(struct ufs_hba *);
340 u32 (*get_ufs_hci_version)(struct ufs_hba *);
341 int (*clk_scale_notify)(struct ufs_hba *, bool,
342 enum ufs_notify_change_status);
343 int (*setup_clocks)(struct ufs_hba *, bool,
344 enum ufs_notify_change_status);
345 int (*setup_regulators)(struct ufs_hba *, bool);
346 int (*hce_enable_notify)(struct ufs_hba *,
347 enum ufs_notify_change_status);
348 int (*link_startup_notify)(struct ufs_hba *,
349 enum ufs_notify_change_status);
350 int (*pwr_change_notify)(struct ufs_hba *,
351 enum ufs_notify_change_status status,
352 struct ufs_pa_layer_attr *,
353 struct ufs_pa_layer_attr *);
354 void (*setup_xfer_req)(struct ufs_hba *, int, bool);
355 void (*setup_task_mgmt)(struct ufs_hba *, int, u8);
356 void (*hibern8_notify)(struct ufs_hba *, enum uic_cmd_dme,
357 enum ufs_notify_change_status);
358 int (*apply_dev_quirks)(struct ufs_hba *hba);
359 void (*fixup_dev_quirks)(struct ufs_hba *hba);
360 int (*suspend)(struct ufs_hba *, enum ufs_pm_op);
361 int (*resume)(struct ufs_hba *, enum ufs_pm_op);
362 void (*dbg_register_dump)(struct ufs_hba *hba);
363 int (*phy_initialization)(struct ufs_hba *);
364 int (*device_reset)(struct ufs_hba *hba);
365 void (*config_scaling_param)(struct ufs_hba *hba,
366 struct devfreq_dev_profile *profile,
367 void *data);
368 int (*program_key)(struct ufs_hba *hba,
369 const union ufs_crypto_cfg_entry *cfg, int slot);
370 void (*event_notify)(struct ufs_hba *hba,
371 enum ufs_event_type evt, void *data);
372
373 ANDROID_KABI_RESERVE(1);
374 ANDROID_KABI_RESERVE(2);
375 ANDROID_KABI_RESERVE(3);
376 ANDROID_KABI_RESERVE(4);
377 };
378
379 /* clock gating state */
380 enum clk_gating_state {
381 CLKS_OFF,
382 CLKS_ON,
383 REQ_CLKS_OFF,
384 REQ_CLKS_ON,
385 };
386
387 /**
388 * struct ufs_clk_gating - UFS clock gating related info
389 * @gate_work: worker to turn off clocks after some delay as specified in
390 * delay_ms
391 * @ungate_work: worker to turn on clocks that will be used in case of
392 * interrupt context
393 * @state: the current clocks state
394 * @delay_ms: gating delay in ms
395 * @is_suspended: clk gating is suspended when set to 1 which can be used
396 * during suspend/resume
397 * @delay_attr: sysfs attribute to control delay_attr
398 * @enable_attr: sysfs attribute to enable/disable clock gating
399 * @is_enabled: Indicates the current status of clock gating
400 * @is_initialized: Indicates whether clock gating is initialized or not
401 * @active_reqs: number of requests that are pending and should be waited for
402 * completion before gating clocks.
403 */
404 struct ufs_clk_gating {
405 struct delayed_work gate_work;
406 struct work_struct ungate_work;
407 enum clk_gating_state state;
408 unsigned long delay_ms;
409 bool is_suspended;
410 struct device_attribute delay_attr;
411 struct device_attribute enable_attr;
412 bool is_enabled;
413 bool is_initialized;
414 int active_reqs;
415 struct workqueue_struct *clk_gating_workq;
416
417 ANDROID_KABI_RESERVE(1);
418 };
419
420 struct ufs_saved_pwr_info {
421 struct ufs_pa_layer_attr info;
422 bool is_valid;
423 };
424
425 /**
426 * struct ufs_clk_scaling - UFS clock scaling related data
427 * @active_reqs: number of requests that are pending. If this is zero when
428 * devfreq ->target() function is called then schedule "suspend_work" to
429 * suspend devfreq.
430 * @tot_busy_t: Total busy time in current polling window
431 * @window_start_t: Start time (in jiffies) of the current polling window
432 * @busy_start_t: Start time of current busy period
433 * @enable_attr: sysfs attribute to enable/disable clock scaling
434 * @saved_pwr_info: UFS power mode may also be changed during scaling and this
435 * one keeps track of previous power mode.
436 * @workq: workqueue to schedule devfreq suspend/resume work
437 * @suspend_work: worker to suspend devfreq
438 * @resume_work: worker to resume devfreq
439 * @min_gear: lowest HS gear to scale down to
440 * @is_enabled: tracks if scaling is currently enabled or not, controlled by
441 clkscale_enable sysfs node
442 * @is_allowed: tracks if scaling is currently allowed or not, used to block
443 clock scaling which is not invoked from devfreq governor
444 * @is_initialized: Indicates whether clock scaling is initialized or not
445 * @is_busy_started: tracks if busy period has started or not
446 * @is_suspended: tracks if devfreq is suspended or not
447 */
448 struct ufs_clk_scaling {
449 int active_reqs;
450 unsigned long tot_busy_t;
451 ktime_t window_start_t;
452 ktime_t busy_start_t;
453 struct device_attribute enable_attr;
454 struct ufs_saved_pwr_info saved_pwr_info;
455 struct workqueue_struct *workq;
456 struct work_struct suspend_work;
457 struct work_struct resume_work;
458 u32 min_gear;
459 bool is_enabled;
460 bool is_allowed;
461 bool is_initialized;
462 bool is_busy_started;
463 bool is_suspended;
464
465 ANDROID_KABI_RESERVE(1);
466 };
467
468 #define UFS_EVENT_HIST_LENGTH 8
469 /**
470 * struct ufs_event_hist - keeps history of errors
471 * @pos: index to indicate cyclic buffer position
472 * @reg: cyclic buffer for registers value
473 * @tstamp: cyclic buffer for time stamp
474 * @cnt: error counter
475 */
476 struct ufs_event_hist {
477 int pos;
478 u32 val[UFS_EVENT_HIST_LENGTH];
479 ktime_t tstamp[UFS_EVENT_HIST_LENGTH];
480 unsigned long long cnt;
481 };
482
483 /**
484 * struct ufs_stats - keeps usage/err statistics
485 * @last_intr_status: record the last interrupt status.
486 * @last_intr_ts: record the last interrupt timestamp.
487 * @hibern8_exit_cnt: Counter to keep track of number of exits,
488 * reset this after link-startup.
489 * @last_hibern8_exit_tstamp: Set time after the hibern8 exit.
490 * Clear after the first successful command completion.
491 */
492 struct ufs_stats {
493 u32 last_intr_status;
494 ktime_t last_intr_ts;
495
496 u32 hibern8_exit_cnt;
497 ktime_t last_hibern8_exit_tstamp;
498 struct ufs_event_hist event[UFS_EVT_CNT];
499 };
500
501 enum ufshcd_quirks {
502 /* Interrupt aggregation support is broken */
503 UFSHCD_QUIRK_BROKEN_INTR_AGGR = 1 << 0,
504
505 /*
506 * delay before each dme command is required as the unipro
507 * layer has shown instabilities
508 */
509 UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS = 1 << 1,
510
511 /*
512 * If UFS host controller is having issue in processing LCC (Line
513 * Control Command) coming from device then enable this quirk.
514 * When this quirk is enabled, host controller driver should disable
515 * the LCC transmission on UFS device (by clearing TX_LCC_ENABLE
516 * attribute of device to 0).
517 */
518 UFSHCD_QUIRK_BROKEN_LCC = 1 << 2,
519
520 /*
521 * The attribute PA_RXHSUNTERMCAP specifies whether or not the
522 * inbound Link supports unterminated line in HS mode. Setting this
523 * attribute to 1 fixes moving to HS gear.
524 */
525 UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP = 1 << 3,
526
527 /*
528 * This quirk needs to be enabled if the host controller only allows
529 * accessing the peer dme attributes in AUTO mode (FAST AUTO or
530 * SLOW AUTO).
531 */
532 UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE = 1 << 4,
533
534 /*
535 * This quirk needs to be enabled if the host controller doesn't
536 * advertise the correct version in UFS_VER register. If this quirk
537 * is enabled, standard UFS host driver will call the vendor specific
538 * ops (get_ufs_hci_version) to get the correct version.
539 */
540 UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION = 1 << 5,
541
542 /*
543 * Clear handling for transfer/task request list is just opposite.
544 */
545 UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR = 1 << 6,
546
547 /*
548 * This quirk needs to be enabled if host controller doesn't allow
549 * that the interrupt aggregation timer and counter are reset by s/w.
550 */
551 UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR = 1 << 7,
552
553 /*
554 * This quirks needs to be enabled if host controller cannot be
555 * enabled via HCE register.
556 */
557 UFSHCI_QUIRK_BROKEN_HCE = 1 << 8,
558
559 /*
560 * This quirk needs to be enabled if the host controller regards
561 * resolution of the values of PRDTO and PRDTL in UTRD as byte.
562 */
563 UFSHCD_QUIRK_PRDT_BYTE_GRAN = 1 << 9,
564
565 /*
566 * This quirk needs to be enabled if the host controller reports
567 * OCS FATAL ERROR with device error through sense data
568 */
569 UFSHCD_QUIRK_BROKEN_OCS_FATAL_ERROR = 1 << 10,
570
571 /*
572 * This quirk needs to be enabled if the host controller has
573 * auto-hibernate capability but it doesn't work.
574 */
575 UFSHCD_QUIRK_BROKEN_AUTO_HIBERN8 = 1 << 11,
576
577 /*
578 * This quirk needs to disable manual flush for write booster
579 */
580 UFSHCI_QUIRK_SKIP_MANUAL_WB_FLUSH_CTRL = 1 << 12,
581
582 /*
583 * This quirk needs to disable unipro timeout values
584 * before power mode change
585 */
586 UFSHCD_QUIRK_SKIP_DEF_UNIPRO_TIMEOUT_SETTING = 1 << 13,
587
588 /*
589 * This quirk allows only sg entries aligned with page size.
590 */
591 UFSHCD_QUIRK_ALIGN_SG_WITH_PAGE_SIZE = 1 << 14,
592
593 /*
594 * This quirk needs to be enabled if the host controller does not
595 * support UIC command
596 */
597 UFSHCD_QUIRK_BROKEN_UIC_CMD = 1 << 15,
598
599 /*
600 * This quirk needs to be enabled if the host controller cannot
601 * support interface configuration.
602 */
603 UFSHCD_QUIRK_SKIP_INTERFACE_CONFIGURATION = 1 << 16,
604
605 /*
606 * This quirk needs to be enabled if the host controller supports inline
607 * encryption, but it needs to initialize the crypto capabilities in a
608 * nonstandard way and/or it needs to override blk_ksm_ll_ops. If
609 * enabled, the standard code won't initialize the blk_keyslot_manager;
610 * ufs_hba_variant_ops::init() must do it instead.
611 */
612 UFSHCD_QUIRK_CUSTOM_KEYSLOT_MANAGER = 1 << 20,
613
614 /*
615 * This quirk needs to be enabled if the host controller supports inline
616 * encryption, but the CRYPTO_GENERAL_ENABLE bit is not implemented and
617 * breaks the HCE sequence if used.
618 */
619 UFSHCD_QUIRK_BROKEN_CRYPTO_ENABLE = 1 << 21,
620
621 /*
622 * This quirk needs to be enabled if the host controller requires that
623 * the PRDT be cleared after each encrypted request because encryption
624 * keys were stored in it.
625 */
626 UFSHCD_QUIRK_KEYS_IN_PRDT = 1 << 22,
627 };
628
629 enum ufshcd_caps {
630 /* Allow dynamic clk gating */
631 UFSHCD_CAP_CLK_GATING = 1 << 0,
632
633 /* Allow hiberb8 with clk gating */
634 UFSHCD_CAP_HIBERN8_WITH_CLK_GATING = 1 << 1,
635
636 /* Allow dynamic clk scaling */
637 UFSHCD_CAP_CLK_SCALING = 1 << 2,
638
639 /* Allow auto bkops to enabled during runtime suspend */
640 UFSHCD_CAP_AUTO_BKOPS_SUSPEND = 1 << 3,
641
642 /*
643 * This capability allows host controller driver to use the UFS HCI's
644 * interrupt aggregation capability.
645 * CAUTION: Enabling this might reduce overall UFS throughput.
646 */
647 UFSHCD_CAP_INTR_AGGR = 1 << 4,
648
649 /*
650 * This capability allows the device auto-bkops to be always enabled
651 * except during suspend (both runtime and suspend).
652 * Enabling this capability means that device will always be allowed
653 * to do background operation when it's active but it might degrade
654 * the performance of ongoing read/write operations.
655 */
656 UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND = 1 << 5,
657
658 /*
659 * This capability allows host controller driver to automatically
660 * enable runtime power management by itself instead of waiting
661 * for userspace to control the power management.
662 */
663 UFSHCD_CAP_RPM_AUTOSUSPEND = 1 << 6,
664
665 /*
666 * This capability allows the host controller driver to turn-on
667 * WriteBooster, if the underlying device supports it and is
668 * provisioned to be used. This would increase the write performance.
669 */
670 UFSHCD_CAP_WB_EN = 1 << 7,
671
672 /*
673 * This capability allows the host controller driver to use the
674 * inline crypto engine, if it is present
675 */
676 UFSHCD_CAP_CRYPTO = 1 << 8,
677
678 /*
679 * This capability allows the controller regulators to be put into
680 * lpm mode aggressively during clock gating.
681 * This would increase power savings.
682 */
683 UFSHCD_CAP_AGGR_POWER_COLLAPSE = 1 << 9,
684 };
685
686 struct ufs_hba_variant_params {
687 struct devfreq_dev_profile devfreq_profile;
688 struct devfreq_simple_ondemand_data ondemand_data;
689 u16 hba_enable_delay_us;
690 u32 wb_flush_threshold;
691 };
692
693 #ifdef CONFIG_SCSI_UFS_HPB
694 /**
695 * struct ufshpb_dev_info - UFSHPB device related info
696 * @num_lu: the number of user logical unit to check whether all lu finished
697 * initialization
698 * @rgn_size: device reported HPB region size
699 * @srgn_size: device reported HPB sub-region size
700 * @slave_conf_cnt: counter to check all lu finished initialization
701 * @hpb_disabled: flag to check if HPB is disabled
702 * @max_hpb_single_cmd: device reported bMAX_DATA_SIZE_FOR_SINGLE_CMD value
703 * @is_legacy: flag to check HPB 1.0
704 * @control_mode: either host or device
705 */
706 struct ufshpb_dev_info {
707 int num_lu;
708 int rgn_size;
709 int srgn_size;
710 atomic_t slave_conf_cnt;
711 bool hpb_disabled;
712 u8 max_hpb_single_cmd;
713 bool is_legacy;
714 u8 control_mode;
715 };
716 #endif
717
718 struct ufs_hba_monitor {
719 unsigned long chunk_size;
720
721 unsigned long nr_sec_rw[2];
722 ktime_t total_busy[2];
723
724 unsigned long nr_req[2];
725 /* latencies*/
726 ktime_t lat_sum[2];
727 ktime_t lat_max[2];
728 ktime_t lat_min[2];
729
730 u32 nr_queued[2];
731 ktime_t busy_start_ts[2];
732
733 ktime_t enabled_ts;
734 bool enabled;
735 };
736
737 /**
738 * struct ufs_hba - per adapter private structure
739 * @mmio_base: UFSHCI base register address
740 * @ucdl_base_addr: UFS Command Descriptor base address
741 * @utrdl_base_addr: UTP Transfer Request Descriptor base address
742 * @utmrdl_base_addr: UTP Task Management Descriptor base address
743 * @ucdl_dma_addr: UFS Command Descriptor DMA address
744 * @utrdl_dma_addr: UTRDL DMA address
745 * @utmrdl_dma_addr: UTMRDL DMA address
746 * @host: Scsi_Host instance of the driver
747 * @dev: device handle
748 * @lrb: local reference block
749 * @cmd_queue: Used to allocate command tags from hba->host->tag_set.
750 * @outstanding_tasks: Bits representing outstanding task requests
751 * @outstanding_reqs: Bits representing outstanding transfer requests
752 * @capabilities: UFS Controller Capabilities
753 * @nutrs: Transfer Request Queue depth supported by controller
754 * @nutmrs: Task Management Queue depth supported by controller
755 * @reserved_slot: Used to submit device commands. Protected by @dev_cmd.lock.
756 * @ufs_version: UFS Version to which controller complies
757 * @vops: pointer to variant specific operations
758 * @priv: pointer to variant specific private data
759 * @sg_entry_size: size of struct ufshcd_sg_entry (may include variant fields)
760 * @irq: Irq number of the controller
761 * @active_uic_cmd: handle of active UIC command
762 * @uic_cmd_mutex: mutex for uic command
763 * @tmf_tag_set: TMF tag set.
764 * @tmf_queue: Used to allocate TMF tags.
765 * @pwr_done: completion for power mode change
766 * @ufshcd_state: UFSHCD states
767 * @eh_flags: Error handling flags
768 * @intr_mask: Interrupt Mask Bits
769 * @ee_ctrl_mask: Exception event control mask
770 * @is_powered: flag to check if HBA is powered
771 * @shutting_down: flag to check if shutdown has been invoked
772 * @host_sem: semaphore used to serialize concurrent contexts
773 * @eh_wq: Workqueue that eh_work works on
774 * @eh_work: Worker to handle UFS errors that require s/w attention
775 * @eeh_work: Worker to handle exception events
776 * @errors: HBA errors
777 * @uic_error: UFS interconnect layer error status
778 * @saved_err: sticky error mask
779 * @saved_uic_err: sticky UIC error mask
780 * @force_reset: flag to force eh_work perform a full reset
781 * @force_pmc: flag to force a power mode change
782 * @silence_err_logs: flag to silence error logs
783 * @dev_cmd: ufs device management command information
784 * @last_dme_cmd_tstamp: time stamp of the last completed DME command
785 * @auto_bkops_enabled: to track whether bkops is enabled in device
786 * @vreg_info: UFS device voltage regulator information
787 * @clk_list_head: UFS host controller clocks list node head
788 * @pwr_info: holds current power mode
789 * @max_pwr_info: keeps the device max valid pwm
790 * @desc_size: descriptor sizes reported by device
791 * @urgent_bkops_lvl: keeps track of urgent bkops level for device
792 * @is_urgent_bkops_lvl_checked: keeps track if the urgent bkops level for
793 * device is known or not.
794 * @scsi_block_reqs_cnt: reference counting for scsi block requests
795 * @crypto_capabilities: Content of crypto capabilities register (0x100)
796 * @crypto_cap_array: Array of crypto capabilities
797 * @crypto_cfg_register: Start of the crypto cfg array
798 * @ksm: the keyslot manager tied to this hba
799 */
800 struct ufs_hba {
801 void __iomem *mmio_base;
802
803 /* Virtual memory reference */
804 struct utp_transfer_cmd_desc *ucdl_base_addr;
805 struct utp_transfer_req_desc *utrdl_base_addr;
806 struct utp_task_req_desc *utmrdl_base_addr;
807
808 /* DMA memory reference */
809 dma_addr_t ucdl_dma_addr;
810 dma_addr_t utrdl_dma_addr;
811 dma_addr_t utmrdl_dma_addr;
812
813 struct Scsi_Host *host;
814 struct device *dev;
815 struct request_queue *cmd_queue;
816 /*
817 * This field is to keep a reference to "scsi_device" corresponding to
818 * "UFS device" W-LU.
819 */
820 struct scsi_device *sdev_ufs_device;
821 struct scsi_device *sdev_rpmb;
822
823 enum ufs_dev_pwr_mode curr_dev_pwr_mode;
824 enum uic_link_state uic_link_state;
825 /* Desired UFS power management level during runtime PM */
826 enum ufs_pm_level rpm_lvl;
827 /* Desired UFS power management level during system PM */
828 enum ufs_pm_level spm_lvl;
829 struct device_attribute rpm_lvl_attr;
830 struct device_attribute spm_lvl_attr;
831 int pm_op_in_progress;
832
833 /* Auto-Hibernate Idle Timer register value */
834 u32 ahit;
835
836 struct ufshcd_lrb *lrb;
837
838 unsigned long outstanding_tasks;
839 unsigned long outstanding_reqs;
840
841 u32 capabilities;
842 int nutrs;
843 int nutmrs;
844 #if 0
845 /*
846 * This has been moved into struct ufs_hba_add_info because of the GKI.
847 */
848 u32 reserved_slot;
849 #endif
850 u32 ufs_version;
851 const struct ufs_hba_variant_ops *vops;
852 struct ufs_hba_variant_params *vps;
853 void *priv;
854 size_t sg_entry_size;
855 unsigned int irq;
856 bool is_irq_enabled;
857 enum ufs_ref_clk_freq dev_ref_clk_freq;
858
859 unsigned int quirks; /* Deviations from standard UFSHCI spec. */
860
861 /* Device deviations from standard UFS device spec. */
862 unsigned int dev_quirks;
863
864 struct blk_mq_tag_set tmf_tag_set;
865 struct request_queue *tmf_queue;
866 #if 0
867 /*
868 * This has been moved into struct ufs_hba_add_info because of the GKI.
869 */
870 struct request **tmf_rqs;
871 #endif
872
873 struct uic_command *active_uic_cmd;
874 struct mutex uic_cmd_mutex;
875 struct completion *uic_async_done;
876
877 u32 ufshcd_state;
878 u32 eh_flags;
879 u32 intr_mask;
880 u16 ee_ctrl_mask;
881 bool is_powered;
882 bool shutting_down;
883 struct semaphore host_sem;
884
885 /* Work Queues */
886 struct workqueue_struct *eh_wq;
887 struct work_struct eh_work;
888 struct work_struct eeh_work;
889
890 /* HBA Errors */
891 u32 errors;
892 u32 uic_error;
893 u32 saved_err;
894 u32 saved_uic_err;
895 struct ufs_stats ufs_stats;
896 bool force_reset;
897 bool force_pmc;
898 bool silence_err_logs;
899
900 /* Device management request data */
901 struct ufs_dev_cmd dev_cmd;
902 ktime_t last_dme_cmd_tstamp;
903
904 /* Keeps information of the UFS device connected to this host */
905 struct ufs_dev_info dev_info;
906 bool auto_bkops_enabled;
907 struct ufs_vreg_info vreg_info;
908 struct list_head clk_list_head;
909
910 bool wlun_dev_clr_ua;
911
912 /* Number of requests aborts */
913 int req_abort_count;
914
915 /* Number of lanes available (1 or 2) for Rx/Tx */
916 u32 lanes_per_direction;
917 struct ufs_pa_layer_attr pwr_info;
918 struct ufs_pwr_mode_info max_pwr_info;
919
920 struct ufs_clk_gating clk_gating;
921 /* Control to enable/disable host capabilities */
922 u32 caps;
923
924 struct devfreq *devfreq;
925 struct ufs_clk_scaling clk_scaling;
926 bool is_sys_suspended;
927
928 enum bkops_status urgent_bkops_lvl;
929 bool is_urgent_bkops_lvl_checked;
930
931 struct rw_semaphore clk_scaling_lock;
932 unsigned char desc_size[QUERY_DESC_IDN_MAX];
933 atomic_t scsi_block_reqs_cnt;
934
935 struct device bsg_dev;
936 struct request_queue *bsg_queue;
937 bool wb_buf_flush_enabled;
938 bool wb_enabled;
939 struct delayed_work rpm_dev_flush_recheck_work;
940
941 #if 0
942 /* This has been moved into struct ufs_hba_add_info. */
943 struct ufshpb_dev_info ufshpb_dev;
944 #endif
945
946 struct ufs_hba_monitor monitor;
947
948 #ifdef CONFIG_SCSI_UFS_CRYPTO
949 union ufs_crypto_capabilities crypto_capabilities;
950 union ufs_crypto_cap_entry *crypto_cap_array;
951 u32 crypto_cfg_register;
952 struct blk_keyslot_manager ksm;
953 #endif
954 #ifdef CONFIG_DEBUG_FS
955 struct dentry *debugfs_root;
956 #endif
957
958 ANDROID_KABI_RESERVE(1);
959 ANDROID_KABI_RESERVE(2);
960 ANDROID_KABI_RESERVE(3);
961 ANDROID_KABI_RESERVE(4);
962 };
963
964 /* Returns true if clocks can be gated. Otherwise false */
ufshcd_is_clkgating_allowed(struct ufs_hba * hba)965 static inline bool ufshcd_is_clkgating_allowed(struct ufs_hba *hba)
966 {
967 return hba->caps & UFSHCD_CAP_CLK_GATING;
968 }
ufshcd_can_hibern8_during_gating(struct ufs_hba * hba)969 static inline bool ufshcd_can_hibern8_during_gating(struct ufs_hba *hba)
970 {
971 return hba->caps & UFSHCD_CAP_HIBERN8_WITH_CLK_GATING;
972 }
ufshcd_is_clkscaling_supported(struct ufs_hba * hba)973 static inline int ufshcd_is_clkscaling_supported(struct ufs_hba *hba)
974 {
975 return hba->caps & UFSHCD_CAP_CLK_SCALING;
976 }
ufshcd_can_autobkops_during_suspend(struct ufs_hba * hba)977 static inline bool ufshcd_can_autobkops_during_suspend(struct ufs_hba *hba)
978 {
979 return hba->caps & UFSHCD_CAP_AUTO_BKOPS_SUSPEND;
980 }
ufshcd_is_rpm_autosuspend_allowed(struct ufs_hba * hba)981 static inline bool ufshcd_is_rpm_autosuspend_allowed(struct ufs_hba *hba)
982 {
983 return hba->caps & UFSHCD_CAP_RPM_AUTOSUSPEND;
984 }
985
ufshcd_is_intr_aggr_allowed(struct ufs_hba * hba)986 static inline bool ufshcd_is_intr_aggr_allowed(struct ufs_hba *hba)
987 {
988 /* DWC UFS Core has the Interrupt aggregation feature but is not detectable*/
989 #ifndef CONFIG_SCSI_UFS_DWC
990 if ((hba->caps & UFSHCD_CAP_INTR_AGGR) &&
991 !(hba->quirks & UFSHCD_QUIRK_BROKEN_INTR_AGGR))
992 return true;
993 else
994 return false;
995 #else
996 return true;
997 #endif
998 }
999
ufshcd_can_aggressive_pc(struct ufs_hba * hba)1000 static inline bool ufshcd_can_aggressive_pc(struct ufs_hba *hba)
1001 {
1002 return !!(ufshcd_is_link_hibern8(hba) &&
1003 (hba->caps & UFSHCD_CAP_AGGR_POWER_COLLAPSE));
1004 }
1005
ufshcd_is_auto_hibern8_supported(struct ufs_hba * hba)1006 static inline bool ufshcd_is_auto_hibern8_supported(struct ufs_hba *hba)
1007 {
1008 return (hba->capabilities & MASK_AUTO_HIBERN8_SUPPORT) &&
1009 !(hba->quirks & UFSHCD_QUIRK_BROKEN_AUTO_HIBERN8);
1010 }
1011
ufshcd_is_auto_hibern8_enabled(struct ufs_hba * hba)1012 static inline bool ufshcd_is_auto_hibern8_enabled(struct ufs_hba *hba)
1013 {
1014 return FIELD_GET(UFSHCI_AHIBERN8_TIMER_MASK, hba->ahit) ? true : false;
1015 }
1016
ufshcd_is_wb_allowed(struct ufs_hba * hba)1017 static inline bool ufshcd_is_wb_allowed(struct ufs_hba *hba)
1018 {
1019 return hba->caps & UFSHCD_CAP_WB_EN;
1020 }
1021
ufshcd_is_user_access_allowed(struct ufs_hba * hba)1022 static inline bool ufshcd_is_user_access_allowed(struct ufs_hba *hba)
1023 {
1024 return !hba->shutting_down;
1025 }
1026
1027 #define ufshcd_writel(hba, val, reg) \
1028 writel((val), (hba)->mmio_base + (reg))
1029 #define ufshcd_readl(hba, reg) \
1030 readl((hba)->mmio_base + (reg))
1031
1032 /**
1033 * ufshcd_rmwl - read modify write into a register
1034 * @hba - per adapter instance
1035 * @mask - mask to apply on read value
1036 * @val - actual value to write
1037 * @reg - register address
1038 */
ufshcd_rmwl(struct ufs_hba * hba,u32 mask,u32 val,u32 reg)1039 static inline void ufshcd_rmwl(struct ufs_hba *hba, u32 mask, u32 val, u32 reg)
1040 {
1041 u32 tmp;
1042
1043 tmp = ufshcd_readl(hba, reg);
1044 tmp &= ~mask;
1045 tmp |= (val & mask);
1046 ufshcd_writel(hba, tmp, reg);
1047 }
1048
1049 int ufshcd_alloc_host(struct device *, struct ufs_hba **);
1050 void ufshcd_dealloc_host(struct ufs_hba *);
1051 int ufshcd_hba_enable(struct ufs_hba *hba);
1052 int ufshcd_init(struct ufs_hba * , void __iomem * , unsigned int);
1053 int ufshcd_link_recovery(struct ufs_hba *hba);
1054 int ufshcd_make_hba_operational(struct ufs_hba *hba);
1055 void ufshcd_remove(struct ufs_hba *);
1056 int ufshcd_uic_hibern8_exit(struct ufs_hba *hba);
1057 void ufshcd_delay_us(unsigned long us, unsigned long tolerance);
1058 int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
1059 u32 val, unsigned long interval_us,
1060 unsigned long timeout_ms);
1061 void ufshcd_parse_dev_ref_clk_freq(struct ufs_hba *hba, struct clk *refclk);
1062 void ufshcd_update_evt_hist(struct ufs_hba *hba, u32 id, u32 val);
1063 void ufshcd_hba_stop(struct ufs_hba *hba);
1064 void ufshcd_complete_requests(struct ufs_hba *hba);
1065 void ufshcd_release_scsi_cmd(struct ufs_hba *hba,
1066 struct ufshcd_lrb *lrbp);
1067 void ufshcd_err_handling_prepare(struct ufs_hba *hba);
1068 void ufshcd_err_handling_unprepare(struct ufs_hba *hba);
1069
1070
check_upiu_size(void)1071 static inline void check_upiu_size(void)
1072 {
1073 BUILD_BUG_ON(ALIGNED_UPIU_SIZE <
1074 GENERAL_UPIU_REQUEST_SIZE + QUERY_DESC_MAX_SIZE);
1075 }
1076
1077 /**
1078 * ufshcd_set_variant - set variant specific data to the hba
1079 * @hba - per adapter instance
1080 * @variant - pointer to variant specific data
1081 */
ufshcd_set_variant(struct ufs_hba * hba,void * variant)1082 static inline void ufshcd_set_variant(struct ufs_hba *hba, void *variant)
1083 {
1084 BUG_ON(!hba);
1085 hba->priv = variant;
1086 }
1087
1088 /**
1089 * ufshcd_get_variant - get variant specific data from the hba
1090 * @hba - per adapter instance
1091 */
ufshcd_get_variant(struct ufs_hba * hba)1092 static inline void *ufshcd_get_variant(struct ufs_hba *hba)
1093 {
1094 BUG_ON(!hba);
1095 return hba->priv;
1096 }
ufshcd_keep_autobkops_enabled_except_suspend(struct ufs_hba * hba)1097 static inline bool ufshcd_keep_autobkops_enabled_except_suspend(
1098 struct ufs_hba *hba)
1099 {
1100 return hba->caps & UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND;
1101 }
1102
ufshcd_wb_get_query_index(struct ufs_hba * hba)1103 static inline u8 ufshcd_wb_get_query_index(struct ufs_hba *hba)
1104 {
1105 if (hba->dev_info.b_wb_buffer_type == WB_BUF_MODE_LU_DEDICATED)
1106 return hba->dev_info.wb_dedicated_lu;
1107 return 0;
1108 }
1109
1110 extern int ufshcd_runtime_suspend(struct ufs_hba *hba);
1111 extern int ufshcd_runtime_resume(struct ufs_hba *hba);
1112 extern int ufshcd_runtime_idle(struct ufs_hba *hba);
1113 extern int ufshcd_system_suspend(struct ufs_hba *hba);
1114 extern int ufshcd_system_resume(struct ufs_hba *hba);
1115 extern int ufshcd_shutdown(struct ufs_hba *hba);
1116 extern int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
1117 u8 attr_set, u32 mib_val, u8 peer);
1118 extern int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
1119 u32 *mib_val, u8 peer);
1120 extern int ufshcd_config_pwr_mode(struct ufs_hba *hba,
1121 struct ufs_pa_layer_attr *desired_pwr_mode);
1122
1123 /* UIC command interfaces for DME primitives */
1124 #define DME_LOCAL 0
1125 #define DME_PEER 1
1126 #define ATTR_SET_NOR 0 /* NORMAL */
1127 #define ATTR_SET_ST 1 /* STATIC */
1128
ufshcd_dme_set(struct ufs_hba * hba,u32 attr_sel,u32 mib_val)1129 static inline int ufshcd_dme_set(struct ufs_hba *hba, u32 attr_sel,
1130 u32 mib_val)
1131 {
1132 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
1133 mib_val, DME_LOCAL);
1134 }
1135
ufshcd_dme_st_set(struct ufs_hba * hba,u32 attr_sel,u32 mib_val)1136 static inline int ufshcd_dme_st_set(struct ufs_hba *hba, u32 attr_sel,
1137 u32 mib_val)
1138 {
1139 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
1140 mib_val, DME_LOCAL);
1141 }
1142
ufshcd_dme_peer_set(struct ufs_hba * hba,u32 attr_sel,u32 mib_val)1143 static inline int ufshcd_dme_peer_set(struct ufs_hba *hba, u32 attr_sel,
1144 u32 mib_val)
1145 {
1146 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
1147 mib_val, DME_PEER);
1148 }
1149
ufshcd_dme_peer_st_set(struct ufs_hba * hba,u32 attr_sel,u32 mib_val)1150 static inline int ufshcd_dme_peer_st_set(struct ufs_hba *hba, u32 attr_sel,
1151 u32 mib_val)
1152 {
1153 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
1154 mib_val, DME_PEER);
1155 }
1156
ufshcd_dme_get(struct ufs_hba * hba,u32 attr_sel,u32 * mib_val)1157 static inline int ufshcd_dme_get(struct ufs_hba *hba,
1158 u32 attr_sel, u32 *mib_val)
1159 {
1160 return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_LOCAL);
1161 }
1162
ufshcd_dme_peer_get(struct ufs_hba * hba,u32 attr_sel,u32 * mib_val)1163 static inline int ufshcd_dme_peer_get(struct ufs_hba *hba,
1164 u32 attr_sel, u32 *mib_val)
1165 {
1166 return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_PEER);
1167 }
1168
ufshcd_is_hs_mode(struct ufs_pa_layer_attr * pwr_info)1169 static inline bool ufshcd_is_hs_mode(struct ufs_pa_layer_attr *pwr_info)
1170 {
1171 return (pwr_info->pwr_rx == FAST_MODE ||
1172 pwr_info->pwr_rx == FASTAUTO_MODE) &&
1173 (pwr_info->pwr_tx == FAST_MODE ||
1174 pwr_info->pwr_tx == FASTAUTO_MODE);
1175 }
1176
ufshcd_disable_host_tx_lcc(struct ufs_hba * hba)1177 static inline int ufshcd_disable_host_tx_lcc(struct ufs_hba *hba)
1178 {
1179 return ufshcd_dme_set(hba, UIC_ARG_MIB(PA_LOCAL_TX_LCC_ENABLE), 0);
1180 }
1181
1182 /* Expose Query-Request API */
1183 int ufshcd_query_descriptor_retry(struct ufs_hba *hba,
1184 enum query_opcode opcode,
1185 enum desc_idn idn, u8 index,
1186 u8 selector,
1187 u8 *desc_buf, int *buf_len);
1188 int ufshcd_read_desc_param(struct ufs_hba *hba,
1189 enum desc_idn desc_id,
1190 int desc_index,
1191 u8 param_offset,
1192 u8 *param_read_buf,
1193 u8 param_size);
1194 int ufshcd_query_attr(struct ufs_hba *hba, enum query_opcode opcode,
1195 enum attr_idn idn, u8 index, u8 selector, u32 *attr_val);
1196 int ufshcd_query_attr_retry(struct ufs_hba *hba,
1197 enum query_opcode opcode, enum attr_idn idn, u8 index, u8 selector,
1198 u32 *attr_val);
1199 int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
1200 enum flag_idn idn, u8 index, bool *flag_res);
1201 int ufshcd_query_flag_retry(struct ufs_hba *hba,
1202 enum query_opcode opcode, enum flag_idn idn, u8 index, bool *flag_res);
1203 int ufshcd_bkops_ctrl(struct ufs_hba *hba, enum bkops_status status);
1204
1205 void ufshcd_auto_hibern8_enable(struct ufs_hba *hba);
1206 void ufshcd_auto_hibern8_update(struct ufs_hba *hba, u32 ahit);
1207 void ufshcd_fixup_dev_quirks(struct ufs_hba *hba, struct ufs_dev_fix *fixups);
1208 #define SD_ASCII_STD true
1209 #define SD_RAW false
1210 int ufshcd_read_string_desc(struct ufs_hba *hba, u8 desc_index,
1211 u8 **buf, bool ascii);
1212
1213 int ufshcd_hold(struct ufs_hba *hba, bool async);
1214 void ufshcd_release(struct ufs_hba *hba);
1215
1216 void ufshcd_map_desc_id_to_length(struct ufs_hba *hba, enum desc_idn desc_id,
1217 int *desc_length);
1218
1219 u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba);
1220
1221 int ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd);
1222
1223 int ufshcd_exec_raw_upiu_cmd(struct ufs_hba *hba,
1224 struct utp_upiu_req *req_upiu,
1225 struct utp_upiu_req *rsp_upiu,
1226 int msgcode,
1227 u8 *desc_buff, int *buff_len,
1228 enum query_opcode desc_op);
1229
1230 /* Wrapper functions for safely calling variant operations */
ufshcd_get_var_name(struct ufs_hba * hba)1231 static inline const char *ufshcd_get_var_name(struct ufs_hba *hba)
1232 {
1233 if (hba->vops)
1234 return hba->vops->name;
1235 return "";
1236 }
1237
ufshcd_vops_init(struct ufs_hba * hba)1238 static inline int ufshcd_vops_init(struct ufs_hba *hba)
1239 {
1240 if (hba->vops && hba->vops->init)
1241 return hba->vops->init(hba);
1242
1243 return 0;
1244 }
1245
ufshcd_vops_exit(struct ufs_hba * hba)1246 static inline void ufshcd_vops_exit(struct ufs_hba *hba)
1247 {
1248 if (hba->vops && hba->vops->exit)
1249 return hba->vops->exit(hba);
1250 }
1251
ufshcd_vops_get_ufs_hci_version(struct ufs_hba * hba)1252 static inline u32 ufshcd_vops_get_ufs_hci_version(struct ufs_hba *hba)
1253 {
1254 if (hba->vops && hba->vops->get_ufs_hci_version)
1255 return hba->vops->get_ufs_hci_version(hba);
1256
1257 return ufshcd_readl(hba, REG_UFS_VERSION);
1258 }
1259
ufshcd_has_utrlcnr(struct ufs_hba * hba)1260 static inline bool ufshcd_has_utrlcnr(struct ufs_hba *hba)
1261 {
1262 return (hba->ufs_version >= ufshci_version(3, 0));
1263 }
1264
ufshcd_vops_clk_scale_notify(struct ufs_hba * hba,bool up,enum ufs_notify_change_status status)1265 static inline int ufshcd_vops_clk_scale_notify(struct ufs_hba *hba,
1266 bool up, enum ufs_notify_change_status status)
1267 {
1268 if (hba->vops && hba->vops->clk_scale_notify)
1269 return hba->vops->clk_scale_notify(hba, up, status);
1270 return 0;
1271 }
1272
ufshcd_vops_event_notify(struct ufs_hba * hba,enum ufs_event_type evt,void * data)1273 static inline void ufshcd_vops_event_notify(struct ufs_hba *hba,
1274 enum ufs_event_type evt,
1275 void *data)
1276 {
1277 if (hba->vops && hba->vops->event_notify)
1278 hba->vops->event_notify(hba, evt, data);
1279 }
1280
ufshcd_vops_setup_clocks(struct ufs_hba * hba,bool on,enum ufs_notify_change_status status)1281 static inline int ufshcd_vops_setup_clocks(struct ufs_hba *hba, bool on,
1282 enum ufs_notify_change_status status)
1283 {
1284 if (hba->vops && hba->vops->setup_clocks)
1285 return hba->vops->setup_clocks(hba, on, status);
1286 return 0;
1287 }
1288
ufshcd_vops_setup_regulators(struct ufs_hba * hba,bool status)1289 static inline int ufshcd_vops_setup_regulators(struct ufs_hba *hba, bool status)
1290 {
1291 if (hba->vops && hba->vops->setup_regulators)
1292 return hba->vops->setup_regulators(hba, status);
1293
1294 return 0;
1295 }
1296
ufshcd_vops_hce_enable_notify(struct ufs_hba * hba,bool status)1297 static inline int ufshcd_vops_hce_enable_notify(struct ufs_hba *hba,
1298 bool status)
1299 {
1300 if (hba->vops && hba->vops->hce_enable_notify)
1301 return hba->vops->hce_enable_notify(hba, status);
1302
1303 return 0;
1304 }
ufshcd_vops_link_startup_notify(struct ufs_hba * hba,bool status)1305 static inline int ufshcd_vops_link_startup_notify(struct ufs_hba *hba,
1306 bool status)
1307 {
1308 if (hba->vops && hba->vops->link_startup_notify)
1309 return hba->vops->link_startup_notify(hba, status);
1310
1311 return 0;
1312 }
1313
ufshcd_vops_pwr_change_notify(struct ufs_hba * hba,bool status,struct ufs_pa_layer_attr * dev_max_params,struct ufs_pa_layer_attr * dev_req_params)1314 static inline int ufshcd_vops_pwr_change_notify(struct ufs_hba *hba,
1315 bool status,
1316 struct ufs_pa_layer_attr *dev_max_params,
1317 struct ufs_pa_layer_attr *dev_req_params)
1318 {
1319 if (hba->vops && hba->vops->pwr_change_notify)
1320 return hba->vops->pwr_change_notify(hba, status,
1321 dev_max_params, dev_req_params);
1322
1323 return -ENOTSUPP;
1324 }
1325
ufshcd_vops_setup_task_mgmt(struct ufs_hba * hba,int tag,u8 tm_function)1326 static inline void ufshcd_vops_setup_task_mgmt(struct ufs_hba *hba,
1327 int tag, u8 tm_function)
1328 {
1329 if (hba->vops && hba->vops->setup_task_mgmt)
1330 return hba->vops->setup_task_mgmt(hba, tag, tm_function);
1331 }
1332
ufshcd_vops_hibern8_notify(struct ufs_hba * hba,enum uic_cmd_dme cmd,enum ufs_notify_change_status status)1333 static inline void ufshcd_vops_hibern8_notify(struct ufs_hba *hba,
1334 enum uic_cmd_dme cmd,
1335 enum ufs_notify_change_status status)
1336 {
1337 if (hba->vops && hba->vops->hibern8_notify)
1338 return hba->vops->hibern8_notify(hba, cmd, status);
1339 }
1340
ufshcd_vops_apply_dev_quirks(struct ufs_hba * hba)1341 static inline int ufshcd_vops_apply_dev_quirks(struct ufs_hba *hba)
1342 {
1343 if (hba->vops && hba->vops->apply_dev_quirks)
1344 return hba->vops->apply_dev_quirks(hba);
1345 return 0;
1346 }
1347
ufshcd_vops_fixup_dev_quirks(struct ufs_hba * hba)1348 static inline void ufshcd_vops_fixup_dev_quirks(struct ufs_hba *hba)
1349 {
1350 if (hba->vops && hba->vops->fixup_dev_quirks)
1351 hba->vops->fixup_dev_quirks(hba);
1352 }
1353
ufshcd_vops_suspend(struct ufs_hba * hba,enum ufs_pm_op op)1354 static inline int ufshcd_vops_suspend(struct ufs_hba *hba, enum ufs_pm_op op)
1355 {
1356 if (hba->vops && hba->vops->suspend)
1357 return hba->vops->suspend(hba, op);
1358
1359 return 0;
1360 }
1361
ufshcd_vops_resume(struct ufs_hba * hba,enum ufs_pm_op op)1362 static inline int ufshcd_vops_resume(struct ufs_hba *hba, enum ufs_pm_op op)
1363 {
1364 if (hba->vops && hba->vops->resume)
1365 return hba->vops->resume(hba, op);
1366
1367 return 0;
1368 }
1369
ufshcd_vops_dbg_register_dump(struct ufs_hba * hba)1370 static inline void ufshcd_vops_dbg_register_dump(struct ufs_hba *hba)
1371 {
1372 if (hba->vops && hba->vops->dbg_register_dump)
1373 hba->vops->dbg_register_dump(hba);
1374 }
1375
ufshcd_vops_device_reset(struct ufs_hba * hba)1376 static inline void ufshcd_vops_device_reset(struct ufs_hba *hba)
1377 {
1378 if (hba->vops && hba->vops->device_reset) {
1379 int err = hba->vops->device_reset(hba);
1380
1381 if (!err) {
1382 ufshcd_set_ufs_dev_active(hba);
1383 if (ufshcd_is_wb_allowed(hba)) {
1384 hba->wb_enabled = false;
1385 hba->wb_buf_flush_enabled = false;
1386 }
1387 }
1388 if (err != -EOPNOTSUPP)
1389 ufshcd_update_evt_hist(hba, UFS_EVT_DEV_RESET, err);
1390 }
1391 }
1392
ufshcd_vops_config_scaling_param(struct ufs_hba * hba,struct devfreq_dev_profile * profile,void * data)1393 static inline void ufshcd_vops_config_scaling_param(struct ufs_hba *hba,
1394 struct devfreq_dev_profile
1395 *profile, void *data)
1396 {
1397 if (hba->vops && hba->vops->config_scaling_param)
1398 hba->vops->config_scaling_param(hba, profile, data);
1399 }
1400
1401 extern struct ufs_pm_lvl_states ufs_pm_lvl_states[];
1402
1403 /*
1404 * ufshcd_scsi_to_upiu_lun - maps scsi LUN to UPIU LUN
1405 * @scsi_lun: scsi LUN id
1406 *
1407 * Returns UPIU LUN id
1408 */
ufshcd_scsi_to_upiu_lun(unsigned int scsi_lun)1409 static inline u8 ufshcd_scsi_to_upiu_lun(unsigned int scsi_lun)
1410 {
1411 if (scsi_is_wlun(scsi_lun))
1412 return (scsi_lun & UFS_UPIU_MAX_UNIT_NUM_ID)
1413 | UFS_UPIU_WLUN_ID;
1414 else
1415 return scsi_lun & UFS_UPIU_MAX_UNIT_NUM_ID;
1416 }
1417
1418 int ufshcd_dump_regs(struct ufs_hba *hba, size_t offset, size_t len,
1419 const char *prefix);
1420 int ufshcd_uic_hibern8_enter(struct ufs_hba *hba);
1421 int ufshcd_uic_hibern8_exit(struct ufs_hba *hba);
1422 #endif /* End of Header */
1423