1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3 * Universal Flash Storage Host controller driver
4 * Copyright (C) 2011-2013 Samsung India Software Operations
5 *
6 * Authors:
7 * Santosh Yaraganavi <santosh.sy@samsung.com>
8 * Vinayak Holikatti <h.vinayak@samsung.com>
9 */
10
11 #ifndef _UFS_H
12 #define _UFS_H
13
14 #include <linux/mutex.h>
15 #include <linux/types.h>
16 #include <linux/android_kabi.h>
17 #include <uapi/scsi/scsi_bsg_ufs.h>
18
19 #define GENERAL_UPIU_REQUEST_SIZE (sizeof(struct utp_upiu_req))
20 #define QUERY_DESC_MAX_SIZE 255
21 #define QUERY_DESC_MIN_SIZE 2
22 #define QUERY_DESC_HDR_SIZE 2
23 #define QUERY_OSF_SIZE (GENERAL_UPIU_REQUEST_SIZE - \
24 (sizeof(struct utp_upiu_header)))
25 #define UFS_SENSE_SIZE 18
26
27 #define UPIU_HEADER_DWORD(byte3, byte2, byte1, byte0)\
28 cpu_to_be32((byte3 << 24) | (byte2 << 16) |\
29 (byte1 << 8) | (byte0))
30 /*
31 * UFS device may have standard LUs and LUN id could be from 0x00 to
32 * 0x7F. Standard LUs use "Peripheral Device Addressing Format".
33 * UFS device may also have the Well Known LUs (also referred as W-LU)
34 * which again could be from 0x00 to 0x7F. For W-LUs, device only use
35 * the "Extended Addressing Format" which means the W-LUNs would be
36 * from 0xc100 (SCSI_W_LUN_BASE) onwards.
37 * This means max. LUN number reported from UFS device could be 0xC17F.
38 */
39 #define UFS_UPIU_MAX_UNIT_NUM_ID 0x7F
40 #define UFS_MAX_LUNS (SCSI_W_LUN_BASE + UFS_UPIU_MAX_UNIT_NUM_ID)
41 #define UFS_UPIU_WLUN_ID (1 << 7)
42 #define UFS_RPMB_UNIT 0xC4
43
44 /* WriteBooster buffer is available only for the logical unit from 0 to 7 */
45 #define UFS_UPIU_MAX_WB_LUN_ID 8
46
47 /* Well known logical unit id in LUN field of UPIU */
48 enum {
49 UFS_UPIU_REPORT_LUNS_WLUN = 0x81,
50 UFS_UPIU_UFS_DEVICE_WLUN = 0xD0,
51 UFS_UPIU_BOOT_WLUN = 0xB0,
52 UFS_UPIU_RPMB_WLUN = 0xC4,
53 };
54
55 /*
56 * UFS Protocol Information Unit related definitions
57 */
58
59 /* Task management functions */
60 enum {
61 UFS_ABORT_TASK = 0x01,
62 UFS_ABORT_TASK_SET = 0x02,
63 UFS_CLEAR_TASK_SET = 0x04,
64 UFS_LOGICAL_RESET = 0x08,
65 UFS_QUERY_TASK = 0x80,
66 UFS_QUERY_TASK_SET = 0x81,
67 };
68
69 /* UTP UPIU Transaction Codes Initiator to Target */
70 enum {
71 UPIU_TRANSACTION_NOP_OUT = 0x00,
72 UPIU_TRANSACTION_COMMAND = 0x01,
73 UPIU_TRANSACTION_DATA_OUT = 0x02,
74 UPIU_TRANSACTION_TASK_REQ = 0x04,
75 UPIU_TRANSACTION_QUERY_REQ = 0x16,
76 };
77
78 /* UTP UPIU Transaction Codes Target to Initiator */
79 enum {
80 UPIU_TRANSACTION_NOP_IN = 0x20,
81 UPIU_TRANSACTION_RESPONSE = 0x21,
82 UPIU_TRANSACTION_DATA_IN = 0x22,
83 UPIU_TRANSACTION_TASK_RSP = 0x24,
84 UPIU_TRANSACTION_READY_XFER = 0x31,
85 UPIU_TRANSACTION_QUERY_RSP = 0x36,
86 UPIU_TRANSACTION_REJECT_UPIU = 0x3F,
87 };
88
89 /* UPIU Read/Write flags */
90 enum {
91 UPIU_CMD_FLAGS_NONE = 0x00,
92 UPIU_CMD_FLAGS_WRITE = 0x20,
93 UPIU_CMD_FLAGS_READ = 0x40,
94 };
95
96 /* UPIU Task Attributes */
97 enum {
98 UPIU_TASK_ATTR_SIMPLE = 0x00,
99 UPIU_TASK_ATTR_ORDERED = 0x01,
100 UPIU_TASK_ATTR_HEADQ = 0x02,
101 UPIU_TASK_ATTR_ACA = 0x03,
102 };
103
104 /* UPIU Query request function */
105 enum {
106 UPIU_QUERY_FUNC_STANDARD_READ_REQUEST = 0x01,
107 UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST = 0x81,
108 };
109
110 /* Flag idn for Query Requests*/
111 enum flag_idn {
112 QUERY_FLAG_IDN_FDEVICEINIT = 0x01,
113 QUERY_FLAG_IDN_PERMANENT_WPE = 0x02,
114 QUERY_FLAG_IDN_PWR_ON_WPE = 0x03,
115 QUERY_FLAG_IDN_BKOPS_EN = 0x04,
116 QUERY_FLAG_IDN_LIFE_SPAN_MODE_ENABLE = 0x05,
117 QUERY_FLAG_IDN_PURGE_ENABLE = 0x06,
118 QUERY_FLAG_IDN_RESERVED2 = 0x07,
119 QUERY_FLAG_IDN_FPHYRESOURCEREMOVAL = 0x08,
120 QUERY_FLAG_IDN_BUSY_RTC = 0x09,
121 QUERY_FLAG_IDN_RESERVED3 = 0x0A,
122 QUERY_FLAG_IDN_PERMANENTLY_DISABLE_FW_UPDATE = 0x0B,
123 QUERY_FLAG_IDN_WB_EN = 0x0E,
124 QUERY_FLAG_IDN_WB_BUFF_FLUSH_EN = 0x0F,
125 QUERY_FLAG_IDN_WB_BUFF_FLUSH_DURING_HIBERN8 = 0x10,
126 QUERY_FLAG_IDN_HPB_RESET = 0x11,
127 QUERY_FLAG_IDN_HPB_EN = 0x12,
128 };
129
130 /* Attribute idn for Query requests */
131 enum attr_idn {
132 QUERY_ATTR_IDN_BOOT_LU_EN = 0x00,
133 QUERY_ATTR_IDN_MAX_HPB_SINGLE_CMD = 0x01,
134 QUERY_ATTR_IDN_POWER_MODE = 0x02,
135 QUERY_ATTR_IDN_ACTIVE_ICC_LVL = 0x03,
136 QUERY_ATTR_IDN_OOO_DATA_EN = 0x04,
137 QUERY_ATTR_IDN_BKOPS_STATUS = 0x05,
138 QUERY_ATTR_IDN_PURGE_STATUS = 0x06,
139 QUERY_ATTR_IDN_MAX_DATA_IN = 0x07,
140 QUERY_ATTR_IDN_MAX_DATA_OUT = 0x08,
141 QUERY_ATTR_IDN_DYN_CAP_NEEDED = 0x09,
142 QUERY_ATTR_IDN_REF_CLK_FREQ = 0x0A,
143 QUERY_ATTR_IDN_CONF_DESC_LOCK = 0x0B,
144 QUERY_ATTR_IDN_MAX_NUM_OF_RTT = 0x0C,
145 QUERY_ATTR_IDN_EE_CONTROL = 0x0D,
146 QUERY_ATTR_IDN_EE_STATUS = 0x0E,
147 QUERY_ATTR_IDN_SECONDS_PASSED = 0x0F,
148 QUERY_ATTR_IDN_CNTX_CONF = 0x10,
149 QUERY_ATTR_IDN_CORR_PRG_BLK_NUM = 0x11,
150 QUERY_ATTR_IDN_RESERVED2 = 0x12,
151 QUERY_ATTR_IDN_RESERVED3 = 0x13,
152 QUERY_ATTR_IDN_FFU_STATUS = 0x14,
153 QUERY_ATTR_IDN_PSA_STATE = 0x15,
154 QUERY_ATTR_IDN_PSA_DATA_SIZE = 0x16,
155 QUERY_ATTR_IDN_REF_CLK_GATING_WAIT_TIME = 0x17,
156 QUERY_ATTR_IDN_WB_FLUSH_STATUS = 0x1C,
157 QUERY_ATTR_IDN_AVAIL_WB_BUFF_SIZE = 0x1D,
158 QUERY_ATTR_IDN_WB_BUFF_LIFE_TIME_EST = 0x1E,
159 QUERY_ATTR_IDN_CURR_WB_BUFF_SIZE = 0x1F,
160 };
161
162 /* Descriptor idn for Query requests */
163 enum desc_idn {
164 QUERY_DESC_IDN_DEVICE = 0x0,
165 QUERY_DESC_IDN_CONFIGURATION = 0x1,
166 QUERY_DESC_IDN_UNIT = 0x2,
167 QUERY_DESC_IDN_RFU_0 = 0x3,
168 QUERY_DESC_IDN_INTERCONNECT = 0x4,
169 QUERY_DESC_IDN_STRING = 0x5,
170 QUERY_DESC_IDN_RFU_1 = 0x6,
171 QUERY_DESC_IDN_GEOMETRY = 0x7,
172 QUERY_DESC_IDN_POWER = 0x8,
173 QUERY_DESC_IDN_HEALTH = 0x9,
174 QUERY_DESC_IDN_MAX,
175 };
176
177 enum desc_header_offset {
178 QUERY_DESC_LENGTH_OFFSET = 0x00,
179 QUERY_DESC_DESC_TYPE_OFFSET = 0x01,
180 };
181
182 /* Unit descriptor parameters offsets in bytes*/
183 enum unit_desc_param {
184 UNIT_DESC_PARAM_LEN = 0x0,
185 UNIT_DESC_PARAM_TYPE = 0x1,
186 UNIT_DESC_PARAM_UNIT_INDEX = 0x2,
187 UNIT_DESC_PARAM_LU_ENABLE = 0x3,
188 UNIT_DESC_PARAM_BOOT_LUN_ID = 0x4,
189 UNIT_DESC_PARAM_LU_WR_PROTECT = 0x5,
190 UNIT_DESC_PARAM_LU_Q_DEPTH = 0x6,
191 UNIT_DESC_PARAM_PSA_SENSITIVE = 0x7,
192 UNIT_DESC_PARAM_MEM_TYPE = 0x8,
193 UNIT_DESC_PARAM_DATA_RELIABILITY = 0x9,
194 UNIT_DESC_PARAM_LOGICAL_BLK_SIZE = 0xA,
195 UNIT_DESC_PARAM_LOGICAL_BLK_COUNT = 0xB,
196 UNIT_DESC_PARAM_ERASE_BLK_SIZE = 0x13,
197 UNIT_DESC_PARAM_PROVISIONING_TYPE = 0x17,
198 UNIT_DESC_PARAM_PHY_MEM_RSRC_CNT = 0x18,
199 UNIT_DESC_PARAM_CTX_CAPABILITIES = 0x20,
200 UNIT_DESC_PARAM_LARGE_UNIT_SIZE_M1 = 0x22,
201 UNIT_DESC_PARAM_HPB_LU_MAX_ACTIVE_RGNS = 0x23,
202 UNIT_DESC_PARAM_HPB_PIN_RGN_START_OFF = 0x25,
203 UNIT_DESC_PARAM_HPB_NUM_PIN_RGNS = 0x27,
204 UNIT_DESC_PARAM_WB_BUF_ALLOC_UNITS = 0x29,
205 };
206
207 /* Device descriptor parameters offsets in bytes*/
208 enum device_desc_param {
209 DEVICE_DESC_PARAM_LEN = 0x0,
210 DEVICE_DESC_PARAM_TYPE = 0x1,
211 DEVICE_DESC_PARAM_DEVICE_TYPE = 0x2,
212 DEVICE_DESC_PARAM_DEVICE_CLASS = 0x3,
213 DEVICE_DESC_PARAM_DEVICE_SUB_CLASS = 0x4,
214 DEVICE_DESC_PARAM_PRTCL = 0x5,
215 DEVICE_DESC_PARAM_NUM_LU = 0x6,
216 DEVICE_DESC_PARAM_NUM_WLU = 0x7,
217 DEVICE_DESC_PARAM_BOOT_ENBL = 0x8,
218 DEVICE_DESC_PARAM_DESC_ACCSS_ENBL = 0x9,
219 DEVICE_DESC_PARAM_INIT_PWR_MODE = 0xA,
220 DEVICE_DESC_PARAM_HIGH_PR_LUN = 0xB,
221 DEVICE_DESC_PARAM_SEC_RMV_TYPE = 0xC,
222 DEVICE_DESC_PARAM_SEC_LU = 0xD,
223 DEVICE_DESC_PARAM_BKOP_TERM_LT = 0xE,
224 DEVICE_DESC_PARAM_ACTVE_ICC_LVL = 0xF,
225 DEVICE_DESC_PARAM_SPEC_VER = 0x10,
226 DEVICE_DESC_PARAM_MANF_DATE = 0x12,
227 DEVICE_DESC_PARAM_MANF_NAME = 0x14,
228 DEVICE_DESC_PARAM_PRDCT_NAME = 0x15,
229 DEVICE_DESC_PARAM_SN = 0x16,
230 DEVICE_DESC_PARAM_OEM_ID = 0x17,
231 DEVICE_DESC_PARAM_MANF_ID = 0x18,
232 DEVICE_DESC_PARAM_UD_OFFSET = 0x1A,
233 DEVICE_DESC_PARAM_UD_LEN = 0x1B,
234 DEVICE_DESC_PARAM_RTT_CAP = 0x1C,
235 DEVICE_DESC_PARAM_FRQ_RTC = 0x1D,
236 DEVICE_DESC_PARAM_UFS_FEAT = 0x1F,
237 DEVICE_DESC_PARAM_FFU_TMT = 0x20,
238 DEVICE_DESC_PARAM_Q_DPTH = 0x21,
239 DEVICE_DESC_PARAM_DEV_VER = 0x22,
240 DEVICE_DESC_PARAM_NUM_SEC_WPA = 0x24,
241 DEVICE_DESC_PARAM_PSA_MAX_DATA = 0x25,
242 DEVICE_DESC_PARAM_PSA_TMT = 0x29,
243 DEVICE_DESC_PARAM_PRDCT_REV = 0x2A,
244 DEVICE_DESC_PARAM_HPB_VER = 0x40,
245 DEVICE_DESC_PARAM_HPB_CONTROL = 0x42,
246 DEVICE_DESC_PARAM_EXT_UFS_FEATURE_SUP = 0x4F,
247 DEVICE_DESC_PARAM_WB_PRESRV_USRSPC_EN = 0x53,
248 DEVICE_DESC_PARAM_WB_TYPE = 0x54,
249 DEVICE_DESC_PARAM_WB_SHARED_ALLOC_UNITS = 0x55,
250 };
251
252 /* Interconnect descriptor parameters offsets in bytes*/
253 enum interconnect_desc_param {
254 INTERCONNECT_DESC_PARAM_LEN = 0x0,
255 INTERCONNECT_DESC_PARAM_TYPE = 0x1,
256 INTERCONNECT_DESC_PARAM_UNIPRO_VER = 0x2,
257 INTERCONNECT_DESC_PARAM_MPHY_VER = 0x4,
258 };
259
260 /* Geometry descriptor parameters offsets in bytes*/
261 enum geometry_desc_param {
262 GEOMETRY_DESC_PARAM_LEN = 0x0,
263 GEOMETRY_DESC_PARAM_TYPE = 0x1,
264 GEOMETRY_DESC_PARAM_DEV_CAP = 0x4,
265 GEOMETRY_DESC_PARAM_MAX_NUM_LUN = 0xC,
266 GEOMETRY_DESC_PARAM_SEG_SIZE = 0xD,
267 GEOMETRY_DESC_PARAM_ALLOC_UNIT_SIZE = 0x11,
268 GEOMETRY_DESC_PARAM_MIN_BLK_SIZE = 0x12,
269 GEOMETRY_DESC_PARAM_OPT_RD_BLK_SIZE = 0x13,
270 GEOMETRY_DESC_PARAM_OPT_WR_BLK_SIZE = 0x14,
271 GEOMETRY_DESC_PARAM_MAX_IN_BUF_SIZE = 0x15,
272 GEOMETRY_DESC_PARAM_MAX_OUT_BUF_SIZE = 0x16,
273 GEOMETRY_DESC_PARAM_RPMB_RW_SIZE = 0x17,
274 GEOMETRY_DESC_PARAM_DYN_CAP_RSRC_PLC = 0x18,
275 GEOMETRY_DESC_PARAM_DATA_ORDER = 0x19,
276 GEOMETRY_DESC_PARAM_MAX_NUM_CTX = 0x1A,
277 GEOMETRY_DESC_PARAM_TAG_UNIT_SIZE = 0x1B,
278 GEOMETRY_DESC_PARAM_TAG_RSRC_SIZE = 0x1C,
279 GEOMETRY_DESC_PARAM_SEC_RM_TYPES = 0x1D,
280 GEOMETRY_DESC_PARAM_MEM_TYPES = 0x1E,
281 GEOMETRY_DESC_PARAM_SCM_MAX_NUM_UNITS = 0x20,
282 GEOMETRY_DESC_PARAM_SCM_CAP_ADJ_FCTR = 0x24,
283 GEOMETRY_DESC_PARAM_NPM_MAX_NUM_UNITS = 0x26,
284 GEOMETRY_DESC_PARAM_NPM_CAP_ADJ_FCTR = 0x2A,
285 GEOMETRY_DESC_PARAM_ENM1_MAX_NUM_UNITS = 0x2C,
286 GEOMETRY_DESC_PARAM_ENM1_CAP_ADJ_FCTR = 0x30,
287 GEOMETRY_DESC_PARAM_ENM2_MAX_NUM_UNITS = 0x32,
288 GEOMETRY_DESC_PARAM_ENM2_CAP_ADJ_FCTR = 0x36,
289 GEOMETRY_DESC_PARAM_ENM3_MAX_NUM_UNITS = 0x38,
290 GEOMETRY_DESC_PARAM_ENM3_CAP_ADJ_FCTR = 0x3C,
291 GEOMETRY_DESC_PARAM_ENM4_MAX_NUM_UNITS = 0x3E,
292 GEOMETRY_DESC_PARAM_ENM4_CAP_ADJ_FCTR = 0x42,
293 GEOMETRY_DESC_PARAM_OPT_LOG_BLK_SIZE = 0x44,
294 GEOMETRY_DESC_PARAM_HPB_REGION_SIZE = 0x48,
295 GEOMETRY_DESC_PARAM_HPB_NUMBER_LU = 0x49,
296 GEOMETRY_DESC_PARAM_HPB_SUBREGION_SIZE = 0x4A,
297 GEOMETRY_DESC_PARAM_HPB_MAX_ACTIVE_REGS = 0x4B,
298 GEOMETRY_DESC_PARAM_WB_MAX_ALLOC_UNITS = 0x4F,
299 GEOMETRY_DESC_PARAM_WB_MAX_WB_LUNS = 0x53,
300 GEOMETRY_DESC_PARAM_WB_BUFF_CAP_ADJ = 0x54,
301 GEOMETRY_DESC_PARAM_WB_SUP_RED_TYPE = 0x55,
302 GEOMETRY_DESC_PARAM_WB_SUP_WB_TYPE = 0x56,
303 };
304
305 /* Health descriptor parameters offsets in bytes*/
306 enum health_desc_param {
307 HEALTH_DESC_PARAM_LEN = 0x0,
308 HEALTH_DESC_PARAM_TYPE = 0x1,
309 HEALTH_DESC_PARAM_EOL_INFO = 0x2,
310 HEALTH_DESC_PARAM_LIFE_TIME_EST_A = 0x3,
311 HEALTH_DESC_PARAM_LIFE_TIME_EST_B = 0x4,
312 };
313
314 /* WriteBooster buffer mode */
315 enum {
316 WB_BUF_MODE_LU_DEDICATED = 0x0,
317 WB_BUF_MODE_SHARED = 0x1,
318 };
319
320 /*
321 * Logical Unit Write Protect
322 * 00h: LU not write protected
323 * 01h: LU write protected when fPowerOnWPEn =1
324 * 02h: LU permanently write protected when fPermanentWPEn =1
325 */
326 enum ufs_lu_wp_type {
327 UFS_LU_NO_WP = 0x00,
328 UFS_LU_POWER_ON_WP = 0x01,
329 UFS_LU_PERM_WP = 0x02,
330 };
331
332 /* bActiveICCLevel parameter current units */
333 enum {
334 UFSHCD_NANO_AMP = 0,
335 UFSHCD_MICRO_AMP = 1,
336 UFSHCD_MILI_AMP = 2,
337 UFSHCD_AMP = 3,
338 };
339
340 /* Possible values for dExtendedUFSFeaturesSupport */
341 enum {
342 UFS_DEV_HPB_SUPPORT = BIT(7),
343 UFS_DEV_WRITE_BOOSTER_SUP = BIT(8),
344 };
345 #define UFS_DEV_HPB_SUPPORT_VERSION 0x310
346
347 #define POWER_DESC_MAX_SIZE 0x62
348 #define POWER_DESC_MAX_ACTV_ICC_LVLS 16
349
350 /* Attribute bActiveICCLevel parameter bit masks definitions */
351 #define ATTR_ICC_LVL_UNIT_OFFSET 14
352 #define ATTR_ICC_LVL_UNIT_MASK (0x3 << ATTR_ICC_LVL_UNIT_OFFSET)
353 #define ATTR_ICC_LVL_VALUE_MASK 0x3FF
354
355 /* Power descriptor parameters offsets in bytes */
356 enum power_desc_param_offset {
357 PWR_DESC_LEN = 0x0,
358 PWR_DESC_TYPE = 0x1,
359 PWR_DESC_ACTIVE_LVLS_VCC_0 = 0x2,
360 PWR_DESC_ACTIVE_LVLS_VCCQ_0 = 0x22,
361 PWR_DESC_ACTIVE_LVLS_VCCQ2_0 = 0x42,
362 };
363
364 /* Exception event mask values */
365 enum {
366 MASK_EE_STATUS = 0xFFFF,
367 MASK_EE_URGENT_BKOPS = (1 << 2),
368 };
369
370 /* Background operation status */
371 enum bkops_status {
372 BKOPS_STATUS_NO_OP = 0x0,
373 BKOPS_STATUS_NON_CRITICAL = 0x1,
374 BKOPS_STATUS_PERF_IMPACT = 0x2,
375 BKOPS_STATUS_CRITICAL = 0x3,
376 BKOPS_STATUS_MAX = BKOPS_STATUS_CRITICAL,
377 };
378
379 /* UTP QUERY Transaction Specific Fields OpCode */
380 enum query_opcode {
381 UPIU_QUERY_OPCODE_NOP = 0x0,
382 UPIU_QUERY_OPCODE_READ_DESC = 0x1,
383 UPIU_QUERY_OPCODE_WRITE_DESC = 0x2,
384 UPIU_QUERY_OPCODE_READ_ATTR = 0x3,
385 UPIU_QUERY_OPCODE_WRITE_ATTR = 0x4,
386 UPIU_QUERY_OPCODE_READ_FLAG = 0x5,
387 UPIU_QUERY_OPCODE_SET_FLAG = 0x6,
388 UPIU_QUERY_OPCODE_CLEAR_FLAG = 0x7,
389 UPIU_QUERY_OPCODE_TOGGLE_FLAG = 0x8,
390 };
391
392 /* bRefClkFreq attribute values */
393 enum ufs_ref_clk_freq {
394 REF_CLK_FREQ_19_2_MHZ = 0,
395 REF_CLK_FREQ_26_MHZ = 1,
396 REF_CLK_FREQ_38_4_MHZ = 2,
397 REF_CLK_FREQ_52_MHZ = 3,
398 REF_CLK_FREQ_INVAL = -1,
399 };
400
401 struct ufs_ref_clk {
402 unsigned long freq_hz;
403 enum ufs_ref_clk_freq val;
404 };
405
406 /* Query response result code */
407 enum {
408 QUERY_RESULT_SUCCESS = 0x00,
409 QUERY_RESULT_NOT_READABLE = 0xF6,
410 QUERY_RESULT_NOT_WRITEABLE = 0xF7,
411 QUERY_RESULT_ALREADY_WRITTEN = 0xF8,
412 QUERY_RESULT_INVALID_LENGTH = 0xF9,
413 QUERY_RESULT_INVALID_VALUE = 0xFA,
414 QUERY_RESULT_INVALID_SELECTOR = 0xFB,
415 QUERY_RESULT_INVALID_INDEX = 0xFC,
416 QUERY_RESULT_INVALID_IDN = 0xFD,
417 QUERY_RESULT_INVALID_OPCODE = 0xFE,
418 QUERY_RESULT_GENERAL_FAILURE = 0xFF,
419 };
420
421 /* UTP Transfer Request Command Type (CT) */
422 enum {
423 UPIU_COMMAND_SET_TYPE_SCSI = 0x0,
424 UPIU_COMMAND_SET_TYPE_UFS = 0x1,
425 UPIU_COMMAND_SET_TYPE_QUERY = 0x2,
426 };
427
428 /* UTP Transfer Request Command Offset */
429 #define UPIU_COMMAND_TYPE_OFFSET 28
430
431 /* Offset of the response code in the UPIU header */
432 #define UPIU_RSP_CODE_OFFSET 8
433
434 enum {
435 MASK_SCSI_STATUS = 0xFF,
436 MASK_TASK_RESPONSE = 0xFF00,
437 MASK_RSP_UPIU_RESULT = 0xFFFF,
438 MASK_QUERY_DATA_SEG_LEN = 0xFFFF,
439 MASK_RSP_UPIU_DATA_SEG_LEN = 0xFFFF,
440 MASK_RSP_EXCEPTION_EVENT = 0x10000,
441 MASK_TM_SERVICE_RESP = 0xFF,
442 MASK_TM_FUNC = 0xFF,
443 };
444
445 /* Task management service response */
446 enum {
447 UPIU_TASK_MANAGEMENT_FUNC_COMPL = 0x00,
448 UPIU_TASK_MANAGEMENT_FUNC_NOT_SUPPORTED = 0x04,
449 UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED = 0x08,
450 UPIU_TASK_MANAGEMENT_FUNC_FAILED = 0x05,
451 UPIU_INCORRECT_LOGICAL_UNIT_NO = 0x09,
452 };
453
454 /* UFS device power modes */
455 enum ufs_dev_pwr_mode {
456 UFS_ACTIVE_PWR_MODE = 1,
457 UFS_SLEEP_PWR_MODE = 2,
458 UFS_POWERDOWN_PWR_MODE = 3,
459 };
460
461 #define UFS_WB_BUF_REMAIN_PERCENT(val) ((val) / 10)
462
463 /**
464 * struct utp_cmd_rsp - Response UPIU structure
465 * @residual_transfer_count: Residual transfer count DW-3
466 * @reserved: Reserved double words DW-4 to DW-7
467 * @sense_data_len: Sense data length DW-8 U16
468 * @sense_data: Sense data field DW-8 to DW-12
469 */
470 struct utp_cmd_rsp {
471 __be32 residual_transfer_count;
472 __be32 reserved[4];
473 __be16 sense_data_len;
474 u8 sense_data[UFS_SENSE_SIZE];
475 };
476
477 struct ufshpb_active_field {
478 __be16 active_rgn;
479 __be16 active_srgn;
480 };
481 #define HPB_ACT_FIELD_SIZE 4
482
483 /**
484 * struct utp_hpb_rsp - Response UPIU structure
485 * @residual_transfer_count: Residual transfer count DW-3
486 * @reserved1: Reserved double words DW-4 to DW-7
487 * @sense_data_len: Sense data length DW-8 U16
488 * @desc_type: Descriptor type of sense data
489 * @additional_len: Additional length of sense data
490 * @hpb_op: HPB operation type
491 * @lun: LUN of response UPIU
492 * @active_rgn_cnt: Active region count
493 * @inactive_rgn_cnt: Inactive region count
494 * @hpb_active_field: Recommended to read HPB region and subregion
495 * @hpb_inactive_field: To be inactivated HPB region and subregion
496 */
497 struct utp_hpb_rsp {
498 __be32 residual_transfer_count;
499 __be32 reserved1[4];
500 __be16 sense_data_len;
501 u8 desc_type;
502 u8 additional_len;
503 u8 hpb_op;
504 u8 lun;
505 u8 active_rgn_cnt;
506 u8 inactive_rgn_cnt;
507 struct ufshpb_active_field hpb_active_field[2];
508 __be16 hpb_inactive_field[2];
509 };
510 #define UTP_HPB_RSP_SIZE 40
511
512 /**
513 * struct utp_upiu_rsp - general upiu response structure
514 * @header: UPIU header structure DW-0 to DW-2
515 * @sr: fields structure for scsi command DW-3 to DW-12
516 * @qr: fields structure for query request DW-3 to DW-7
517 */
518 struct utp_upiu_rsp {
519 struct utp_upiu_header header;
520 union {
521 struct utp_cmd_rsp sr;
522 struct utp_hpb_rsp hr;
523 struct utp_upiu_query qr;
524 };
525 };
526
527 /**
528 * struct ufs_query_req - parameters for building a query request
529 * @query_func: UPIU header query function
530 * @upiu_req: the query request data
531 */
532 struct ufs_query_req {
533 u8 query_func;
534 struct utp_upiu_query upiu_req;
535 };
536
537 /**
538 * struct ufs_query_resp - UPIU QUERY
539 * @response: device response code
540 * @upiu_res: query response data
541 */
542 struct ufs_query_res {
543 u8 response;
544 struct utp_upiu_query upiu_res;
545 };
546
547 #define UFS_VREG_VCC_MIN_UV 2700000 /* uV */
548 #define UFS_VREG_VCC_MAX_UV 3600000 /* uV */
549 #define UFS_VREG_VCC_1P8_MIN_UV 1700000 /* uV */
550 #define UFS_VREG_VCC_1P8_MAX_UV 1950000 /* uV */
551 #define UFS_VREG_VCCQ_MIN_UV 1140000 /* uV */
552 #define UFS_VREG_VCCQ_MAX_UV 1260000 /* uV */
553 #define UFS_VREG_VCCQ2_MIN_UV 1700000 /* uV */
554 #define UFS_VREG_VCCQ2_MAX_UV 1950000 /* uV */
555
556 /*
557 * VCCQ & VCCQ2 current requirement when UFS device is in sleep state
558 * and link is in Hibern8 state.
559 */
560 #define UFS_VREG_LPM_LOAD_UA 1000 /* uA */
561
562 struct ufs_vreg {
563 struct regulator *reg;
564 const char *name;
565 bool always_on;
566 bool enabled;
567 int min_uV;
568 int max_uV;
569 int max_uA;
570 };
571
572 struct ufs_vreg_info {
573 struct ufs_vreg *vcc;
574 struct ufs_vreg *vccq;
575 struct ufs_vreg *vccq2;
576 struct ufs_vreg *vdd_hba;
577 };
578
579 struct ufs_dev_info {
580 bool f_power_on_wp_en;
581 /* Keeps information if any of the LU is power on write protected */
582 bool is_lu_power_on_wp;
583 /* Maximum number of general LU supported by the UFS device */
584 u8 max_lu_supported;
585 u8 wb_dedicated_lu;
586 u16 wmanufacturerid;
587 /*UFS device Product Name */
588 u8 *model;
589 u16 wspecversion;
590 u32 clk_gating_wait_us;
591 u32 d_ext_ufs_feature_sup;
592 u8 b_wb_buffer_type;
593 u32 d_wb_alloc_units;
594 bool b_rpm_dev_flush_capable;
595 u8 b_presrv_uspc_en;
596 /* UFS HPB related flag */
597 bool hpb_enabled;
598 ANDROID_KABI_RESERVE(1);
599 };
600
601 /**
602 * ufs_is_valid_unit_desc_lun - checks if the given LUN has a unit descriptor
603 * @dev_info: pointer of instance of struct ufs_dev_info
604 * @lun: LU number to check
605 * @return: true if the lun has a matching unit descriptor, false otherwise
606 */
ufs_is_valid_unit_desc_lun(struct ufs_dev_info * dev_info,u8 lun,u8 param_offset)607 static inline bool ufs_is_valid_unit_desc_lun(struct ufs_dev_info *dev_info,
608 u8 lun, u8 param_offset)
609 {
610 if (!dev_info || !dev_info->max_lu_supported) {
611 pr_err("Max General LU supported by UFS isn't initialized\n");
612 return false;
613 }
614 /* WB is available only for the logical unit from 0 to 7 */
615 if (param_offset == UNIT_DESC_PARAM_WB_BUF_ALLOC_UNITS)
616 return lun < UFS_UPIU_MAX_WB_LUN_ID;
617 return lun == UFS_UPIU_RPMB_WLUN || (lun < dev_info->max_lu_supported);
618 }
619
620 #endif /* End of Header */
621