1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3 * Broadcom Starfighter2 private context
4 *
5 * Copyright (C) 2014, Broadcom Corporation
6 */
7
8 #ifndef __BCM_SF2_H
9 #define __BCM_SF2_H
10
11 #include <linux/platform_device.h>
12 #include <linux/kernel.h>
13 #include <linux/io.h>
14 #include <linux/spinlock.h>
15 #include <linux/mutex.h>
16 #include <linux/mii.h>
17 #include <linux/ethtool.h>
18 #include <linux/types.h>
19 #include <linux/bitops.h>
20 #include <linux/if_vlan.h>
21 #include <linux/reset.h>
22
23 #include <net/dsa.h>
24
25 #include "bcm_sf2_regs.h"
26 #include "b53/b53_priv.h"
27
28 struct bcm_sf2_hw_params {
29 u16 top_rev;
30 u16 core_rev;
31 u16 gphy_rev;
32 u32 num_gphy;
33 u8 num_acb_queue;
34 u8 num_rgmii;
35 u8 num_ports;
36 u8 fcb_pause_override:1;
37 u8 acb_packets_inflight:1;
38 };
39
40 #define BCM_SF2_REGS_NAME {\
41 "core", "reg", "intrl2_0", "intrl2_1", "fcb", "acb" \
42 }
43
44 #define BCM_SF2_REGS_NUM 6
45
46 struct bcm_sf2_port_status {
47 unsigned int link;
48 bool enabled;
49 };
50
51 struct bcm_sf2_cfp_priv {
52 /* Mutex protecting concurrent accesses to the CFP registers */
53 struct mutex lock;
54 DECLARE_BITMAP(used, CFP_NUM_RULES);
55 DECLARE_BITMAP(unique, CFP_NUM_RULES);
56 unsigned int rules_cnt;
57 struct list_head rules_list;
58 };
59
60 struct bcm_sf2_priv {
61 /* Base registers, keep those in order with BCM_SF2_REGS_NAME */
62 void __iomem *core;
63 void __iomem *reg;
64 void __iomem *intrl2_0;
65 void __iomem *intrl2_1;
66 void __iomem *fcb;
67 void __iomem *acb;
68
69 struct reset_control *rcdev;
70
71 /* Register offsets indirection tables */
72 u32 type;
73 const u16 *reg_offsets;
74 unsigned int core_reg_align;
75 unsigned int num_cfp_rules;
76
77 /* spinlock protecting access to the indirect registers */
78 spinlock_t indir_lock;
79
80 int irq0;
81 int irq1;
82 u32 irq0_stat;
83 u32 irq0_mask;
84 u32 irq1_stat;
85 u32 irq1_mask;
86
87 /* Backing b53_device */
88 struct b53_device *dev;
89
90 struct bcm_sf2_hw_params hw_params;
91
92 struct bcm_sf2_port_status port_sts[DSA_MAX_PORTS];
93
94 /* Mask of ports enabled for Wake-on-LAN */
95 u32 wol_ports_mask;
96
97 struct clk *clk;
98 struct clk *clk_mdiv;
99
100 /* MoCA port location */
101 int moca_port;
102
103 /* Bitmask of ports having an integrated PHY */
104 unsigned int int_phy_mask;
105
106 /* Master and slave MDIO bus controller */
107 unsigned int indir_phy_mask;
108 struct device_node *master_mii_dn;
109 struct mii_bus *slave_mii_bus;
110 struct mii_bus *master_mii_bus;
111
112 /* Bitmask of ports needing BRCM tags */
113 unsigned int brcm_tag_mask;
114
115 /* CFP rules context */
116 struct bcm_sf2_cfp_priv cfp;
117 };
118
bcm_sf2_to_priv(struct dsa_switch * ds)119 static inline struct bcm_sf2_priv *bcm_sf2_to_priv(struct dsa_switch *ds)
120 {
121 struct b53_device *dev = ds->priv;
122
123 return dev->priv;
124 }
125
bcm_sf2_mangle_addr(struct bcm_sf2_priv * priv,u32 off)126 static inline u32 bcm_sf2_mangle_addr(struct bcm_sf2_priv *priv, u32 off)
127 {
128 return off << priv->core_reg_align;
129 }
130
131 #define SF2_IO_MACRO(name) \
132 static inline u32 name##_readl(struct bcm_sf2_priv *priv, u32 off) \
133 { \
134 return readl_relaxed(priv->name + off); \
135 } \
136 static inline void name##_writel(struct bcm_sf2_priv *priv, \
137 u32 val, u32 off) \
138 { \
139 writel_relaxed(val, priv->name + off); \
140 } \
141
142 /* Accesses to 64-bits register requires us to latch the hi/lo pairs
143 * using the REG_DIR_DATA_{READ,WRITE} ancillary registers. The 'indir_lock'
144 * spinlock is automatically grabbed and released to provide relative
145 * atomiticy with latched reads/writes.
146 */
147 #define SF2_IO64_MACRO(name) \
148 static inline u64 name##_readq(struct bcm_sf2_priv *priv, u32 off) \
149 { \
150 u32 indir, dir; \
151 spin_lock(&priv->indir_lock); \
152 dir = name##_readl(priv, off); \
153 indir = reg_readl(priv, REG_DIR_DATA_READ); \
154 spin_unlock(&priv->indir_lock); \
155 return (u64)indir << 32 | dir; \
156 } \
157 static inline void name##_writeq(struct bcm_sf2_priv *priv, u64 val, \
158 u32 off) \
159 { \
160 spin_lock(&priv->indir_lock); \
161 reg_writel(priv, upper_32_bits(val), REG_DIR_DATA_WRITE); \
162 name##_writel(priv, lower_32_bits(val), off); \
163 spin_unlock(&priv->indir_lock); \
164 }
165
166 #define SWITCH_INTR_L2(which) \
167 static inline void intrl2_##which##_mask_clear(struct bcm_sf2_priv *priv, \
168 u32 mask) \
169 { \
170 priv->irq##which##_mask &= ~(mask); \
171 intrl2_##which##_writel(priv, mask, INTRL2_CPU_MASK_CLEAR); \
172 } \
173 static inline void intrl2_##which##_mask_set(struct bcm_sf2_priv *priv, \
174 u32 mask) \
175 { \
176 intrl2_## which##_writel(priv, mask, INTRL2_CPU_MASK_SET); \
177 priv->irq##which##_mask |= (mask); \
178 } \
179
core_readl(struct bcm_sf2_priv * priv,u32 off)180 static inline u32 core_readl(struct bcm_sf2_priv *priv, u32 off)
181 {
182 u32 tmp = bcm_sf2_mangle_addr(priv, off);
183 return readl_relaxed(priv->core + tmp);
184 }
185
core_writel(struct bcm_sf2_priv * priv,u32 val,u32 off)186 static inline void core_writel(struct bcm_sf2_priv *priv, u32 val, u32 off)
187 {
188 u32 tmp = bcm_sf2_mangle_addr(priv, off);
189 writel_relaxed(val, priv->core + tmp);
190 }
191
reg_readl(struct bcm_sf2_priv * priv,u16 off)192 static inline u32 reg_readl(struct bcm_sf2_priv *priv, u16 off)
193 {
194 return readl_relaxed(priv->reg + priv->reg_offsets[off]);
195 }
196
reg_writel(struct bcm_sf2_priv * priv,u32 val,u16 off)197 static inline void reg_writel(struct bcm_sf2_priv *priv, u32 val, u16 off)
198 {
199 writel_relaxed(val, priv->reg + priv->reg_offsets[off]);
200 }
201
202 SF2_IO64_MACRO(core);
203 SF2_IO_MACRO(intrl2_0);
204 SF2_IO_MACRO(intrl2_1);
205 SF2_IO_MACRO(fcb);
206 SF2_IO_MACRO(acb);
207
208 SWITCH_INTR_L2(0);
209 SWITCH_INTR_L2(1);
210
211 /* RXNFC */
212 int bcm_sf2_get_rxnfc(struct dsa_switch *ds, int port,
213 struct ethtool_rxnfc *nfc, u32 *rule_locs);
214 int bcm_sf2_set_rxnfc(struct dsa_switch *ds, int port,
215 struct ethtool_rxnfc *nfc);
216 int bcm_sf2_cfp_rst(struct bcm_sf2_priv *priv);
217 void bcm_sf2_cfp_exit(struct dsa_switch *ds);
218 int bcm_sf2_cfp_resume(struct dsa_switch *ds);
219 void bcm_sf2_cfp_get_strings(struct dsa_switch *ds, int port,
220 u32 stringset, uint8_t *data);
221 void bcm_sf2_cfp_get_ethtool_stats(struct dsa_switch *ds, int port,
222 uint64_t *data);
223 int bcm_sf2_cfp_get_sset_count(struct dsa_switch *ds, int port, int sset);
224
225 #endif /* __BCM_SF2_H */
226