1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3 * This control block defines the PACA which defines the processor
4 * specific data for each logical processor on the system.
5 * There are some pointers defined that are utilized by PLIC.
6 *
7 * C 2001 PPC 64 Team, IBM Corp
8 */
9 #ifndef _ASM_POWERPC_PACA_H
10 #define _ASM_POWERPC_PACA_H
11 #ifdef __KERNEL__
12
13 #ifdef CONFIG_PPC64
14
15 #include <linux/cache.h>
16 #include <linux/string.h>
17 #include <asm/types.h>
18 #include <asm/mmu.h>
19 #include <asm/page.h>
20 #ifdef CONFIG_PPC_BOOK3E
21 #include <asm/exception-64e.h>
22 #else
23 #include <asm/exception-64s.h>
24 #endif
25 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
26 #include <asm/kvm_book3s_asm.h>
27 #endif
28 #include <asm/accounting.h>
29 #include <asm/hmi.h>
30 #include <asm/cpuidle.h>
31 #include <asm/atomic.h>
32
33 #include <asm-generic/mmiowb_types.h>
34
35 register struct paca_struct *local_paca asm("r13");
36
37 #if defined(CONFIG_DEBUG_PREEMPT) && defined(CONFIG_SMP)
38 extern unsigned int debug_smp_processor_id(void); /* from linux/smp.h */
39 /*
40 * Add standard checks that preemption cannot occur when using get_paca():
41 * otherwise the paca_struct it points to may be the wrong one just after.
42 */
43 #define get_paca() ((void) debug_smp_processor_id(), local_paca)
44 #else
45 #define get_paca() local_paca
46 #endif
47
48 #define get_slb_shadow() (get_paca()->slb_shadow_ptr)
49
50 struct task_struct;
51 struct rtas_args;
52 struct lppaca;
53
54 /*
55 * Defines the layout of the paca.
56 *
57 * This structure is not directly accessed by firmware or the service
58 * processor.
59 */
60 struct paca_struct {
61 #ifdef CONFIG_PPC_PSERIES
62 /*
63 * Because hw_cpu_id, unlike other paca fields, is accessed
64 * routinely from other CPUs (from the IRQ code), we stick to
65 * read-only (after boot) fields in the first cacheline to
66 * avoid cacheline bouncing.
67 */
68
69 struct lppaca *lppaca_ptr; /* Pointer to LpPaca for PLIC */
70 #endif /* CONFIG_PPC_PSERIES */
71
72 /*
73 * MAGIC: the spinlock functions in arch/powerpc/lib/locks.c
74 * load lock_token and paca_index with a single lwz
75 * instruction. They must travel together and be properly
76 * aligned.
77 */
78 #ifdef __BIG_ENDIAN__
79 u16 lock_token; /* Constant 0x8000, used in locks */
80 u16 paca_index; /* Logical processor number */
81 #else
82 u16 paca_index; /* Logical processor number */
83 u16 lock_token; /* Constant 0x8000, used in locks */
84 #endif
85
86 u64 kernel_toc; /* Kernel TOC address */
87 u64 kernelbase; /* Base address of kernel */
88 u64 kernel_msr; /* MSR while running in kernel */
89 void *emergency_sp; /* pointer to emergency stack */
90 u64 data_offset; /* per cpu data offset */
91 s16 hw_cpu_id; /* Physical processor number */
92 u8 cpu_start; /* At startup, processor spins until */
93 /* this becomes non-zero. */
94 u8 kexec_state; /* set when kexec down has irqs off */
95 #ifdef CONFIG_PPC_BOOK3S_64
96 struct slb_shadow *slb_shadow_ptr;
97 struct dtl_entry *dispatch_log;
98 struct dtl_entry *dispatch_log_end;
99 #endif
100 u64 dscr_default; /* per-CPU default DSCR */
101
102 #ifdef CONFIG_PPC_BOOK3S_64
103 /*
104 * Now, starting in cacheline 2, the exception save areas
105 */
106 /* used for most interrupts/exceptions */
107 u64 exgen[EX_SIZE] __attribute__((aligned(0x80)));
108 u64 exslb[EX_SIZE]; /* used for SLB/segment table misses
109 * on the linear mapping */
110 /* SLB related definitions */
111 u16 vmalloc_sllp;
112 u8 slb_cache_ptr;
113 u8 stab_rr; /* stab/slb round-robin counter */
114 #ifdef CONFIG_DEBUG_VM
115 u8 in_kernel_slb_handler;
116 #endif
117 u32 slb_used_bitmap; /* Bitmaps for first 32 SLB entries. */
118 u32 slb_kern_bitmap;
119 u32 slb_cache[SLB_CACHE_ENTRIES];
120 #endif /* CONFIG_PPC_BOOK3S_64 */
121
122 #ifdef CONFIG_PPC_BOOK3E
123 u64 exgen[8] __aligned(0x40);
124 /* Keep pgd in the same cacheline as the start of extlb */
125 pgd_t *pgd __aligned(0x40); /* Current PGD */
126 pgd_t *kernel_pgd; /* Kernel PGD */
127
128 /* Shared by all threads of a core -- points to tcd of first thread */
129 struct tlb_core_data *tcd_ptr;
130
131 /*
132 * We can have up to 3 levels of reentrancy in the TLB miss handler,
133 * in each of four exception levels (normal, crit, mcheck, debug).
134 */
135 u64 extlb[12][EX_TLB_SIZE / sizeof(u64)];
136 u64 exmc[8]; /* used for machine checks */
137 u64 excrit[8]; /* used for crit interrupts */
138 u64 exdbg[8]; /* used for debug interrupts */
139
140 /* Kernel stack pointers for use by special exceptions */
141 void *mc_kstack;
142 void *crit_kstack;
143 void *dbg_kstack;
144
145 struct tlb_core_data tcd;
146 #endif /* CONFIG_PPC_BOOK3E */
147
148 #ifdef CONFIG_PPC_BOOK3S
149 mm_context_id_t mm_ctx_id;
150 #ifdef CONFIG_PPC_MM_SLICES
151 unsigned char mm_ctx_low_slices_psize[BITS_PER_LONG / BITS_PER_BYTE];
152 unsigned char mm_ctx_high_slices_psize[SLICE_ARRAY_SIZE];
153 unsigned long mm_ctx_slb_addr_limit;
154 #else
155 u16 mm_ctx_user_psize;
156 u16 mm_ctx_sllp;
157 #endif
158 #endif
159
160 /*
161 * then miscellaneous read-write fields
162 */
163 struct task_struct *__current; /* Pointer to current */
164 u64 kstack; /* Saved Kernel stack addr */
165 u64 saved_r1; /* r1 save for RTAS calls or PM or EE=0 */
166 u64 saved_msr; /* MSR saved here by enter_rtas */
167 #ifdef CONFIG_PPC_BOOK3E
168 u16 trap_save; /* Used when bad stack is encountered */
169 #endif
170 u8 irq_soft_mask; /* mask for irq soft masking */
171 u8 irq_happened; /* irq happened while soft-disabled */
172 u8 irq_work_pending; /* IRQ_WORK interrupt while soft-disable */
173 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
174 u8 pmcregs_in_use; /* pseries puts this in lppaca */
175 #endif
176 u64 sprg_vdso; /* Saved user-visible sprg */
177 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
178 u64 tm_scratch; /* TM scratch area for reclaim */
179 #endif
180
181 #ifdef CONFIG_PPC_POWERNV
182 /* PowerNV idle fields */
183 /* PNV_CORE_IDLE_* bits, all siblings work on thread 0 paca */
184 unsigned long idle_state;
185 union {
186 /* P7/P8 specific fields */
187 struct {
188 /* PNV_THREAD_RUNNING/NAP/SLEEP */
189 u8 thread_idle_state;
190 /* Mask to denote subcore sibling threads */
191 u8 subcore_sibling_mask;
192 };
193
194 /* P9 specific fields */
195 struct {
196 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
197 /* The PSSCR value that the kernel requested before going to stop */
198 u64 requested_psscr;
199 /* Flag to request this thread not to stop */
200 atomic_t dont_stop;
201 #endif
202 };
203 };
204 #endif
205
206 #ifdef CONFIG_PPC_BOOK3S_64
207 /* Non-maskable exceptions that are not performance critical */
208 u64 exnmi[EX_SIZE]; /* used for system reset (nmi) */
209 u64 exmc[EX_SIZE]; /* used for machine checks */
210 #endif
211 #ifdef CONFIG_PPC_BOOK3S_64
212 /* Exclusive stacks for system reset and machine check exception. */
213 void *nmi_emergency_sp;
214 void *mc_emergency_sp;
215
216 u16 in_nmi; /* In nmi handler */
217
218 /*
219 * Flag to check whether we are in machine check early handler
220 * and already using emergency stack.
221 */
222 u16 in_mce;
223 u8 hmi_event_available; /* HMI event is available */
224 u8 hmi_p9_special_emu; /* HMI P9 special emulation */
225 u32 hmi_irqs; /* HMI irq stat */
226 #endif
227 u8 ftrace_enabled; /* Hard disable ftrace */
228
229 /* Stuff for accurate time accounting */
230 struct cpu_accounting_data accounting;
231 u64 dtl_ridx; /* read index in dispatch log */
232 struct dtl_entry *dtl_curr; /* pointer corresponding to dtl_ridx */
233
234 #ifdef CONFIG_KVM_BOOK3S_HANDLER
235 #ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
236 /* We use this to store guest state in */
237 struct kvmppc_book3s_shadow_vcpu shadow_vcpu;
238 #endif
239 struct kvmppc_host_state kvm_hstate;
240 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
241 /*
242 * Bitmap for sibling subcore status. See kvm/book3s_hv_ras.c for
243 * more details
244 */
245 struct sibling_subcore_state *sibling_subcore_state;
246 #endif
247 #endif
248 #ifdef CONFIG_PPC_BOOK3S_64
249 /*
250 * rfi fallback flush must be in its own cacheline to prevent
251 * other paca data leaking into the L1d
252 */
253 u64 exrfi[EX_SIZE] __aligned(0x80);
254 void *rfi_flush_fallback_area;
255 u64 l1d_flush_size;
256 #endif
257 #ifdef CONFIG_PPC_PSERIES
258 struct rtas_args *rtas_args_reentrant;
259 u8 *mce_data_buf; /* buffer to hold per cpu rtas errlog */
260 #endif /* CONFIG_PPC_PSERIES */
261
262 #ifdef CONFIG_PPC_BOOK3S_64
263 /* Capture SLB related old contents in MCE handler. */
264 struct slb_entry *mce_faulty_slbs;
265 u16 slb_save_cache_ptr;
266 #endif /* CONFIG_PPC_BOOK3S_64 */
267 #ifdef CONFIG_STACKPROTECTOR
268 unsigned long canary;
269 #endif
270 #ifdef CONFIG_MMIOWB
271 struct mmiowb_state mmiowb_state;
272 #endif
273 } ____cacheline_aligned;
274
275 extern void copy_mm_to_paca(struct mm_struct *mm);
276 extern struct paca_struct **paca_ptrs;
277 extern void initialise_paca(struct paca_struct *new_paca, int cpu);
278 extern void setup_paca(struct paca_struct *new_paca);
279 extern void allocate_paca_ptrs(void);
280 extern void allocate_paca(int cpu);
281 extern void free_unused_pacas(void);
282
283 #else /* CONFIG_PPC64 */
284
allocate_paca_ptrs(void)285 static inline void allocate_paca_ptrs(void) { };
allocate_paca(int cpu)286 static inline void allocate_paca(int cpu) { };
free_unused_pacas(void)287 static inline void free_unused_pacas(void) { };
288
289 #endif /* CONFIG_PPC64 */
290
291 #endif /* __KERNEL__ */
292 #endif /* _ASM_POWERPC_PACA_H */
293