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1 /*
2  * Copyright (c) 2018, Mellanox Technologies. All rights reserved.
3  *
4  * This software is available to you under a choice of one of two
5  * licenses.  You may choose to be licensed under the terms of the GNU
6  * General Public License (GPL) Version 2, available from the file
7  * COPYING in the main directory of this source tree, or the
8  * OpenIB.org BSD license below:
9  *
10  *     Redistribution and use in source and binary forms, with or
11  *     without modification, are permitted provided that the following
12  *     conditions are met:
13  *
14  *      - Redistributions of source code must retain the above
15  *        copyright notice, this list of conditions and the following
16  *        disclaimer.
17  *
18  *      - Redistributions in binary form must reproduce the above
19  *        copyright notice, this list of conditions and the following
20  *        disclaimer in the documentation and/or other materials
21  *        provided with the distribution.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30  * SOFTWARE.
31  */
32 
33 #include <linux/bpf_trace.h>
34 #include <net/xdp_sock_drv.h>
35 #include "en/xdp.h"
36 #include "en/params.h"
37 
mlx5e_xdp_max_mtu(struct mlx5e_params * params,struct mlx5e_xsk_param * xsk)38 int mlx5e_xdp_max_mtu(struct mlx5e_params *params, struct mlx5e_xsk_param *xsk)
39 {
40 	int hr = mlx5e_get_linear_rq_headroom(params, xsk);
41 
42 	/* Let S := SKB_DATA_ALIGN(sizeof(struct skb_shared_info)).
43 	 * The condition checked in mlx5e_rx_is_linear_skb is:
44 	 *   SKB_DATA_ALIGN(sw_mtu + hard_mtu + hr) + S <= PAGE_SIZE         (1)
45 	 *   (Note that hw_mtu == sw_mtu + hard_mtu.)
46 	 * What is returned from this function is:
47 	 *   max_mtu = PAGE_SIZE - S - hr - hard_mtu                         (2)
48 	 * After assigning sw_mtu := max_mtu, the left side of (1) turns to
49 	 * SKB_DATA_ALIGN(PAGE_SIZE - S) + S, which is equal to PAGE_SIZE,
50 	 * because both PAGE_SIZE and S are already aligned. Any number greater
51 	 * than max_mtu would make the left side of (1) greater than PAGE_SIZE,
52 	 * so max_mtu is the maximum MTU allowed.
53 	 */
54 
55 	return MLX5E_HW2SW_MTU(params, SKB_MAX_HEAD(hr));
56 }
57 
58 static inline bool
mlx5e_xmit_xdp_buff(struct mlx5e_xdpsq * sq,struct mlx5e_rq * rq,struct mlx5e_dma_info * di,struct xdp_buff * xdp)59 mlx5e_xmit_xdp_buff(struct mlx5e_xdpsq *sq, struct mlx5e_rq *rq,
60 		    struct mlx5e_dma_info *di, struct xdp_buff *xdp)
61 {
62 	struct mlx5e_xmit_data xdptxd;
63 	struct mlx5e_xdp_info xdpi;
64 	struct xdp_frame *xdpf;
65 	dma_addr_t dma_addr;
66 
67 	xdpf = xdp_convert_buff_to_frame(xdp);
68 	if (unlikely(!xdpf))
69 		return false;
70 
71 	xdptxd.data = xdpf->data;
72 	xdptxd.len  = xdpf->len;
73 
74 	if (xdp->rxq->mem.type == MEM_TYPE_XSK_BUFF_POOL) {
75 		/* The xdp_buff was in the UMEM and was copied into a newly
76 		 * allocated page. The UMEM page was returned via the ZCA, and
77 		 * this new page has to be mapped at this point and has to be
78 		 * unmapped and returned via xdp_return_frame on completion.
79 		 */
80 
81 		/* Prevent double recycling of the UMEM page. Even in case this
82 		 * function returns false, the xdp_buff shouldn't be recycled,
83 		 * as it was already done in xdp_convert_zc_to_xdp_frame.
84 		 */
85 		__set_bit(MLX5E_RQ_FLAG_XDP_XMIT, rq->flags); /* non-atomic */
86 
87 		xdpi.mode = MLX5E_XDP_XMIT_MODE_FRAME;
88 
89 		dma_addr = dma_map_single(sq->pdev, xdptxd.data, xdptxd.len,
90 					  DMA_TO_DEVICE);
91 		if (dma_mapping_error(sq->pdev, dma_addr)) {
92 			xdp_return_frame(xdpf);
93 			return false;
94 		}
95 
96 		xdptxd.dma_addr     = dma_addr;
97 		xdpi.frame.xdpf     = xdpf;
98 		xdpi.frame.dma_addr = dma_addr;
99 	} else {
100 		/* Driver assumes that xdp_convert_buff_to_frame returns
101 		 * an xdp_frame that points to the same memory region as
102 		 * the original xdp_buff. It allows to map the memory only
103 		 * once and to use the DMA_BIDIRECTIONAL mode.
104 		 */
105 
106 		xdpi.mode = MLX5E_XDP_XMIT_MODE_PAGE;
107 
108 		dma_addr = di->addr + (xdpf->data - (void *)xdpf);
109 		dma_sync_single_for_device(sq->pdev, dma_addr, xdptxd.len,
110 					   DMA_TO_DEVICE);
111 
112 		xdptxd.dma_addr = dma_addr;
113 		xdpi.page.rq    = rq;
114 		xdpi.page.di    = *di;
115 	}
116 
117 	return INDIRECT_CALL_2(sq->xmit_xdp_frame, mlx5e_xmit_xdp_frame_mpwqe,
118 			       mlx5e_xmit_xdp_frame, sq, &xdptxd, &xdpi, 0);
119 }
120 
121 /* returns true if packet was consumed by xdp */
mlx5e_xdp_handle(struct mlx5e_rq * rq,struct mlx5e_dma_info * di,u32 * len,struct xdp_buff * xdp)122 bool mlx5e_xdp_handle(struct mlx5e_rq *rq, struct mlx5e_dma_info *di,
123 		      u32 *len, struct xdp_buff *xdp)
124 {
125 	struct bpf_prog *prog = rcu_dereference(rq->xdp_prog);
126 	u32 act;
127 	int err;
128 
129 	if (!prog)
130 		return false;
131 
132 	act = bpf_prog_run_xdp(prog, xdp);
133 	switch (act) {
134 	case XDP_PASS:
135 		*len = xdp->data_end - xdp->data;
136 		return false;
137 	case XDP_TX:
138 		if (unlikely(!mlx5e_xmit_xdp_buff(rq->xdpsq, rq, di, xdp)))
139 			goto xdp_abort;
140 		__set_bit(MLX5E_RQ_FLAG_XDP_XMIT, rq->flags); /* non-atomic */
141 		return true;
142 	case XDP_REDIRECT:
143 		/* When XDP enabled then page-refcnt==1 here */
144 		err = xdp_do_redirect(rq->netdev, xdp, prog);
145 		if (unlikely(err))
146 			goto xdp_abort;
147 		__set_bit(MLX5E_RQ_FLAG_XDP_XMIT, rq->flags);
148 		__set_bit(MLX5E_RQ_FLAG_XDP_REDIRECT, rq->flags);
149 		if (xdp->rxq->mem.type != MEM_TYPE_XSK_BUFF_POOL)
150 			mlx5e_page_dma_unmap(rq, di);
151 		rq->stats->xdp_redirect++;
152 		return true;
153 	default:
154 		bpf_warn_invalid_xdp_action(act);
155 		fallthrough;
156 	case XDP_ABORTED:
157 xdp_abort:
158 		trace_xdp_exception(rq->netdev, prog, act);
159 		fallthrough;
160 	case XDP_DROP:
161 		rq->stats->xdp_drop++;
162 		return true;
163 	}
164 }
165 
mlx5e_xdpsq_get_next_pi(struct mlx5e_xdpsq * sq,u16 size)166 static u16 mlx5e_xdpsq_get_next_pi(struct mlx5e_xdpsq *sq, u16 size)
167 {
168 	struct mlx5_wq_cyc *wq = &sq->wq;
169 	u16 pi, contig_wqebbs;
170 
171 	pi = mlx5_wq_cyc_ctr2ix(wq, sq->pc);
172 	contig_wqebbs = mlx5_wq_cyc_get_contig_wqebbs(wq, pi);
173 	if (unlikely(contig_wqebbs < size)) {
174 		struct mlx5e_xdp_wqe_info *wi, *edge_wi;
175 
176 		wi = &sq->db.wqe_info[pi];
177 		edge_wi = wi + contig_wqebbs;
178 
179 		/* Fill SQ frag edge with NOPs to avoid WQE wrapping two pages. */
180 		for (; wi < edge_wi; wi++) {
181 			*wi = (struct mlx5e_xdp_wqe_info) {
182 				.num_wqebbs = 1,
183 				.num_pkts = 0,
184 			};
185 			mlx5e_post_nop(wq, sq->sqn, &sq->pc);
186 		}
187 		sq->stats->nops += contig_wqebbs;
188 
189 		pi = mlx5_wq_cyc_ctr2ix(wq, sq->pc);
190 	}
191 
192 	return pi;
193 }
194 
mlx5e_xdp_mpwqe_session_start(struct mlx5e_xdpsq * sq)195 static void mlx5e_xdp_mpwqe_session_start(struct mlx5e_xdpsq *sq)
196 {
197 	struct mlx5e_tx_mpwqe *session = &sq->mpwqe;
198 	struct mlx5e_xdpsq_stats *stats = sq->stats;
199 	struct mlx5e_tx_wqe *wqe;
200 	u16 pi;
201 
202 	pi = mlx5e_xdpsq_get_next_pi(sq, MLX5E_TX_MPW_MAX_WQEBBS);
203 	wqe = MLX5E_TX_FETCH_WQE(sq, pi);
204 	net_prefetchw(wqe->data);
205 
206 	*session = (struct mlx5e_tx_mpwqe) {
207 		.wqe = wqe,
208 		.bytes_count = 0,
209 		.ds_count = MLX5E_TX_WQE_EMPTY_DS_COUNT,
210 		.pkt_count = 0,
211 		.inline_on = mlx5e_xdp_get_inline_state(sq, session->inline_on),
212 	};
213 
214 	stats->mpwqe++;
215 }
216 
mlx5e_xdp_mpwqe_complete(struct mlx5e_xdpsq * sq)217 void mlx5e_xdp_mpwqe_complete(struct mlx5e_xdpsq *sq)
218 {
219 	struct mlx5_wq_cyc       *wq    = &sq->wq;
220 	struct mlx5e_tx_mpwqe *session = &sq->mpwqe;
221 	struct mlx5_wqe_ctrl_seg *cseg = &session->wqe->ctrl;
222 	u16 ds_count = session->ds_count;
223 	u16 pi = mlx5_wq_cyc_ctr2ix(wq, sq->pc);
224 	struct mlx5e_xdp_wqe_info *wi = &sq->db.wqe_info[pi];
225 
226 	cseg->opmod_idx_opcode =
227 		cpu_to_be32((sq->pc << 8) | MLX5_OPCODE_ENHANCED_MPSW);
228 	cseg->qpn_ds = cpu_to_be32((sq->sqn << 8) | ds_count);
229 
230 	wi->num_wqebbs = DIV_ROUND_UP(ds_count, MLX5_SEND_WQEBB_NUM_DS);
231 	wi->num_pkts   = session->pkt_count;
232 
233 	sq->pc += wi->num_wqebbs;
234 
235 	sq->doorbell_cseg = cseg;
236 
237 	session->wqe = NULL; /* Close session */
238 }
239 
240 enum {
241 	MLX5E_XDP_CHECK_OK = 1,
242 	MLX5E_XDP_CHECK_START_MPWQE = 2,
243 };
244 
mlx5e_xmit_xdp_frame_check_mpwqe(struct mlx5e_xdpsq * sq)245 INDIRECT_CALLABLE_SCOPE int mlx5e_xmit_xdp_frame_check_mpwqe(struct mlx5e_xdpsq *sq)
246 {
247 	if (unlikely(!sq->mpwqe.wqe)) {
248 		const u16 stop_room = mlx5e_stop_room_for_wqe(MLX5_SEND_WQE_MAX_WQEBBS);
249 
250 		if (unlikely(!mlx5e_wqc_has_room_for(&sq->wq, sq->cc, sq->pc,
251 						     stop_room))) {
252 			/* SQ is full, ring doorbell */
253 			mlx5e_xmit_xdp_doorbell(sq);
254 			sq->stats->full++;
255 			return -EBUSY;
256 		}
257 
258 		return MLX5E_XDP_CHECK_START_MPWQE;
259 	}
260 
261 	return MLX5E_XDP_CHECK_OK;
262 }
263 
264 INDIRECT_CALLABLE_SCOPE bool
mlx5e_xmit_xdp_frame_mpwqe(struct mlx5e_xdpsq * sq,struct mlx5e_xmit_data * xdptxd,struct mlx5e_xdp_info * xdpi,int check_result)265 mlx5e_xmit_xdp_frame_mpwqe(struct mlx5e_xdpsq *sq, struct mlx5e_xmit_data *xdptxd,
266 			   struct mlx5e_xdp_info *xdpi, int check_result)
267 {
268 	struct mlx5e_tx_mpwqe *session = &sq->mpwqe;
269 	struct mlx5e_xdpsq_stats *stats = sq->stats;
270 
271 	if (unlikely(xdptxd->len > sq->hw_mtu)) {
272 		stats->err++;
273 		return false;
274 	}
275 
276 	if (!check_result)
277 		check_result = mlx5e_xmit_xdp_frame_check_mpwqe(sq);
278 	if (unlikely(check_result < 0))
279 		return false;
280 
281 	if (check_result == MLX5E_XDP_CHECK_START_MPWQE) {
282 		/* Start the session when nothing can fail, so it's guaranteed
283 		 * that if there is an active session, it has at least one dseg,
284 		 * and it's safe to complete it at any time.
285 		 */
286 		mlx5e_xdp_mpwqe_session_start(sq);
287 	}
288 
289 	mlx5e_xdp_mpwqe_add_dseg(sq, xdptxd, stats);
290 
291 	if (unlikely(mlx5e_xdp_mpqwe_is_full(session)))
292 		mlx5e_xdp_mpwqe_complete(sq);
293 
294 	mlx5e_xdpi_fifo_push(&sq->db.xdpi_fifo, xdpi);
295 	stats->xmit++;
296 	return true;
297 }
298 
mlx5e_xmit_xdp_frame_check(struct mlx5e_xdpsq * sq)299 INDIRECT_CALLABLE_SCOPE int mlx5e_xmit_xdp_frame_check(struct mlx5e_xdpsq *sq)
300 {
301 	if (unlikely(!mlx5e_wqc_has_room_for(&sq->wq, sq->cc, sq->pc, 1))) {
302 		/* SQ is full, ring doorbell */
303 		mlx5e_xmit_xdp_doorbell(sq);
304 		sq->stats->full++;
305 		return -EBUSY;
306 	}
307 
308 	return MLX5E_XDP_CHECK_OK;
309 }
310 
311 INDIRECT_CALLABLE_SCOPE bool
mlx5e_xmit_xdp_frame(struct mlx5e_xdpsq * sq,struct mlx5e_xmit_data * xdptxd,struct mlx5e_xdp_info * xdpi,int check_result)312 mlx5e_xmit_xdp_frame(struct mlx5e_xdpsq *sq, struct mlx5e_xmit_data *xdptxd,
313 		     struct mlx5e_xdp_info *xdpi, int check_result)
314 {
315 	struct mlx5_wq_cyc       *wq   = &sq->wq;
316 	u16                       pi   = mlx5_wq_cyc_ctr2ix(wq, sq->pc);
317 	struct mlx5e_tx_wqe      *wqe  = mlx5_wq_cyc_get_wqe(wq, pi);
318 
319 	struct mlx5_wqe_ctrl_seg *cseg = &wqe->ctrl;
320 	struct mlx5_wqe_eth_seg  *eseg = &wqe->eth;
321 	struct mlx5_wqe_data_seg *dseg = wqe->data;
322 
323 	dma_addr_t dma_addr = xdptxd->dma_addr;
324 	u32 dma_len = xdptxd->len;
325 
326 	struct mlx5e_xdpsq_stats *stats = sq->stats;
327 
328 	net_prefetchw(wqe);
329 
330 	if (unlikely(dma_len < MLX5E_XDP_MIN_INLINE || sq->hw_mtu < dma_len)) {
331 		stats->err++;
332 		return false;
333 	}
334 
335 	if (!check_result)
336 		check_result = mlx5e_xmit_xdp_frame_check(sq);
337 	if (unlikely(check_result < 0))
338 		return false;
339 
340 	cseg->fm_ce_se = 0;
341 
342 	/* copy the inline part if required */
343 	if (sq->min_inline_mode != MLX5_INLINE_MODE_NONE) {
344 		memcpy(eseg->inline_hdr.start, xdptxd->data, MLX5E_XDP_MIN_INLINE);
345 		eseg->inline_hdr.sz = cpu_to_be16(MLX5E_XDP_MIN_INLINE);
346 		dma_len  -= MLX5E_XDP_MIN_INLINE;
347 		dma_addr += MLX5E_XDP_MIN_INLINE;
348 		dseg++;
349 	}
350 
351 	/* write the dma part */
352 	dseg->addr       = cpu_to_be64(dma_addr);
353 	dseg->byte_count = cpu_to_be32(dma_len);
354 
355 	cseg->opmod_idx_opcode = cpu_to_be32((sq->pc << 8) | MLX5_OPCODE_SEND);
356 
357 	sq->pc++;
358 
359 	sq->doorbell_cseg = cseg;
360 
361 	mlx5e_xdpi_fifo_push(&sq->db.xdpi_fifo, xdpi);
362 	stats->xmit++;
363 	return true;
364 }
365 
mlx5e_free_xdpsq_desc(struct mlx5e_xdpsq * sq,struct mlx5e_xdp_wqe_info * wi,u32 * xsk_frames,bool recycle)366 static void mlx5e_free_xdpsq_desc(struct mlx5e_xdpsq *sq,
367 				  struct mlx5e_xdp_wqe_info *wi,
368 				  u32 *xsk_frames,
369 				  bool recycle)
370 {
371 	struct mlx5e_xdp_info_fifo *xdpi_fifo = &sq->db.xdpi_fifo;
372 	u16 i;
373 
374 	for (i = 0; i < wi->num_pkts; i++) {
375 		struct mlx5e_xdp_info xdpi = mlx5e_xdpi_fifo_pop(xdpi_fifo);
376 
377 		switch (xdpi.mode) {
378 		case MLX5E_XDP_XMIT_MODE_FRAME:
379 			/* XDP_TX from the XSK RQ and XDP_REDIRECT */
380 			dma_unmap_single(sq->pdev, xdpi.frame.dma_addr,
381 					 xdpi.frame.xdpf->len, DMA_TO_DEVICE);
382 			xdp_return_frame(xdpi.frame.xdpf);
383 			break;
384 		case MLX5E_XDP_XMIT_MODE_PAGE:
385 			/* XDP_TX from the regular RQ */
386 			mlx5e_page_release_dynamic(xdpi.page.rq, &xdpi.page.di, recycle);
387 			break;
388 		case MLX5E_XDP_XMIT_MODE_XSK:
389 			/* AF_XDP send */
390 			(*xsk_frames)++;
391 			break;
392 		default:
393 			WARN_ON_ONCE(true);
394 		}
395 	}
396 }
397 
mlx5e_poll_xdpsq_cq(struct mlx5e_cq * cq)398 bool mlx5e_poll_xdpsq_cq(struct mlx5e_cq *cq)
399 {
400 	struct mlx5e_xdpsq *sq;
401 	struct mlx5_cqe64 *cqe;
402 	u32 xsk_frames = 0;
403 	u16 sqcc;
404 	int i;
405 
406 	sq = container_of(cq, struct mlx5e_xdpsq, cq);
407 
408 	if (unlikely(!test_bit(MLX5E_SQ_STATE_ENABLED, &sq->state)))
409 		return false;
410 
411 	cqe = mlx5_cqwq_get_cqe(&cq->wq);
412 	if (!cqe)
413 		return false;
414 
415 	/* sq->cc must be updated only after mlx5_cqwq_update_db_record(),
416 	 * otherwise a cq overrun may occur
417 	 */
418 	sqcc = sq->cc;
419 
420 	i = 0;
421 	do {
422 		struct mlx5e_xdp_wqe_info *wi;
423 		u16 wqe_counter, ci;
424 		bool last_wqe;
425 
426 		mlx5_cqwq_pop(&cq->wq);
427 
428 		wqe_counter = be16_to_cpu(cqe->wqe_counter);
429 
430 		do {
431 			last_wqe = (sqcc == wqe_counter);
432 			ci = mlx5_wq_cyc_ctr2ix(&sq->wq, sqcc);
433 			wi = &sq->db.wqe_info[ci];
434 
435 			sqcc += wi->num_wqebbs;
436 
437 			mlx5e_free_xdpsq_desc(sq, wi, &xsk_frames, true);
438 		} while (!last_wqe);
439 
440 		if (unlikely(get_cqe_opcode(cqe) != MLX5_CQE_REQ)) {
441 			netdev_WARN_ONCE(sq->channel->netdev,
442 					 "Bad OP in XDPSQ CQE: 0x%x\n",
443 					 get_cqe_opcode(cqe));
444 			mlx5e_dump_error_cqe(&sq->cq, sq->sqn,
445 					     (struct mlx5_err_cqe *)cqe);
446 			mlx5_wq_cyc_wqe_dump(&sq->wq, ci, wi->num_wqebbs);
447 		}
448 	} while ((++i < MLX5E_TX_CQ_POLL_BUDGET) && (cqe = mlx5_cqwq_get_cqe(&cq->wq)));
449 
450 	if (xsk_frames)
451 		xsk_tx_completed(sq->xsk_pool, xsk_frames);
452 
453 	sq->stats->cqes += i;
454 
455 	mlx5_cqwq_update_db_record(&cq->wq);
456 
457 	/* ensure cq space is freed before enabling more cqes */
458 	wmb();
459 
460 	sq->cc = sqcc;
461 	return (i == MLX5E_TX_CQ_POLL_BUDGET);
462 }
463 
mlx5e_free_xdpsq_descs(struct mlx5e_xdpsq * sq)464 void mlx5e_free_xdpsq_descs(struct mlx5e_xdpsq *sq)
465 {
466 	u32 xsk_frames = 0;
467 
468 	while (sq->cc != sq->pc) {
469 		struct mlx5e_xdp_wqe_info *wi;
470 		u16 ci;
471 
472 		ci = mlx5_wq_cyc_ctr2ix(&sq->wq, sq->cc);
473 		wi = &sq->db.wqe_info[ci];
474 
475 		sq->cc += wi->num_wqebbs;
476 
477 		mlx5e_free_xdpsq_desc(sq, wi, &xsk_frames, false);
478 	}
479 
480 	if (xsk_frames)
481 		xsk_tx_completed(sq->xsk_pool, xsk_frames);
482 }
483 
mlx5e_xdp_xmit(struct net_device * dev,int n,struct xdp_frame ** frames,u32 flags)484 int mlx5e_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames,
485 		   u32 flags)
486 {
487 	struct mlx5e_priv *priv = netdev_priv(dev);
488 	struct mlx5e_xdpsq *sq;
489 	int drops = 0;
490 	int sq_num;
491 	int i;
492 
493 	/* this flag is sufficient, no need to test internal sq state */
494 	if (unlikely(!mlx5e_xdp_tx_is_enabled(priv)))
495 		return -ENETDOWN;
496 
497 	if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK))
498 		return -EINVAL;
499 
500 	sq_num = smp_processor_id();
501 
502 	if (unlikely(sq_num >= priv->channels.num))
503 		return -ENXIO;
504 
505 	sq = &priv->channels.c[sq_num]->xdpsq;
506 
507 	for (i = 0; i < n; i++) {
508 		struct xdp_frame *xdpf = frames[i];
509 		struct mlx5e_xmit_data xdptxd;
510 		struct mlx5e_xdp_info xdpi;
511 		bool ret;
512 
513 		xdptxd.data = xdpf->data;
514 		xdptxd.len = xdpf->len;
515 		xdptxd.dma_addr = dma_map_single(sq->pdev, xdptxd.data,
516 						 xdptxd.len, DMA_TO_DEVICE);
517 
518 		if (unlikely(dma_mapping_error(sq->pdev, xdptxd.dma_addr))) {
519 			xdp_return_frame_rx_napi(xdpf);
520 			drops++;
521 			continue;
522 		}
523 
524 		xdpi.mode           = MLX5E_XDP_XMIT_MODE_FRAME;
525 		xdpi.frame.xdpf     = xdpf;
526 		xdpi.frame.dma_addr = xdptxd.dma_addr;
527 
528 		ret = INDIRECT_CALL_2(sq->xmit_xdp_frame, mlx5e_xmit_xdp_frame_mpwqe,
529 				      mlx5e_xmit_xdp_frame, sq, &xdptxd, &xdpi, 0);
530 		if (unlikely(!ret)) {
531 			dma_unmap_single(sq->pdev, xdptxd.dma_addr,
532 					 xdptxd.len, DMA_TO_DEVICE);
533 			xdp_return_frame_rx_napi(xdpf);
534 			drops++;
535 		}
536 	}
537 
538 	if (flags & XDP_XMIT_FLUSH) {
539 		if (sq->mpwqe.wqe)
540 			mlx5e_xdp_mpwqe_complete(sq);
541 		mlx5e_xmit_xdp_doorbell(sq);
542 	}
543 
544 	return n - drops;
545 }
546 
mlx5e_xdp_rx_poll_complete(struct mlx5e_rq * rq)547 void mlx5e_xdp_rx_poll_complete(struct mlx5e_rq *rq)
548 {
549 	struct mlx5e_xdpsq *xdpsq = rq->xdpsq;
550 
551 	if (xdpsq->mpwqe.wqe)
552 		mlx5e_xdp_mpwqe_complete(xdpsq);
553 
554 	mlx5e_xmit_xdp_doorbell(xdpsq);
555 
556 	if (test_bit(MLX5E_RQ_FLAG_XDP_REDIRECT, rq->flags)) {
557 		xdp_do_flush_map();
558 		__clear_bit(MLX5E_RQ_FLAG_XDP_REDIRECT, rq->flags);
559 	}
560 }
561 
mlx5e_set_xmit_fp(struct mlx5e_xdpsq * sq,bool is_mpw)562 void mlx5e_set_xmit_fp(struct mlx5e_xdpsq *sq, bool is_mpw)
563 {
564 	sq->xmit_xdp_frame_check = is_mpw ?
565 		mlx5e_xmit_xdp_frame_check_mpwqe : mlx5e_xmit_xdp_frame_check;
566 	sq->xmit_xdp_frame = is_mpw ?
567 		mlx5e_xmit_xdp_frame_mpwqe : mlx5e_xmit_xdp_frame;
568 }
569