1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (C) 2020 ARM Ltd.
4 */
5
6 #include <linux/bitops.h>
7 #include <linux/cpu.h>
8 #include <linux/kernel.h>
9 #include <linux/mm.h>
10 #include <linux/prctl.h>
11 #include <linux/sched.h>
12 #include <linux/sched/mm.h>
13 #include <linux/string.h>
14 #include <linux/swap.h>
15 #include <linux/swapops.h>
16 #include <linux/thread_info.h>
17 #include <linux/types.h>
18 #include <linux/uio.h>
19
20 #include <asm/barrier.h>
21 #include <asm/cpufeature.h>
22 #include <asm/mte.h>
23 #include <asm/ptrace.h>
24 #include <asm/sysreg.h>
25
26 static bool report_fault_once = true;
27
28 static DEFINE_PER_CPU_READ_MOSTLY(u64, mte_tcf_preferred);
29
30 #ifdef CONFIG_KASAN_HW_TAGS
31 /* Whether the MTE asynchronous mode is enabled. */
32 DEFINE_STATIC_KEY_FALSE(mte_async_mode);
33 EXPORT_SYMBOL_GPL(mte_async_mode);
34 #endif
35
mte_sync_page_tags(struct page * page,pte_t * ptep,bool check_swap)36 static void mte_sync_page_tags(struct page *page, pte_t *ptep, bool check_swap)
37 {
38 pte_t old_pte = READ_ONCE(*ptep);
39
40 if (check_swap && is_swap_pte(old_pte)) {
41 swp_entry_t entry = pte_to_swp_entry(old_pte);
42
43 if (!non_swap_entry(entry) && mte_restore_tags(entry, page))
44 return;
45 }
46
47 page_kasan_tag_reset(page);
48 /*
49 * We need smp_wmb() in between setting the flags and clearing the
50 * tags because if another thread reads page->flags and builds a
51 * tagged address out of it, there is an actual dependency to the
52 * memory access, but on the current thread we do not guarantee that
53 * the new page->flags are visible before the tags were updated.
54 */
55 smp_wmb();
56 mte_clear_page_tags(page_address(page));
57 }
58
mte_sync_tags(pte_t * ptep,pte_t pte)59 void mte_sync_tags(pte_t *ptep, pte_t pte)
60 {
61 struct page *page = pte_page(pte);
62 long i, nr_pages = compound_nr(page);
63 bool check_swap = nr_pages == 1;
64
65 /* if PG_mte_tagged is set, tags have already been initialised */
66 for (i = 0; i < nr_pages; i++, page++) {
67 if (!test_and_set_bit(PG_mte_tagged, &page->flags))
68 mte_sync_page_tags(page, ptep, check_swap);
69 }
70
71 /* ensure the tags are visible before the PTE is set */
72 smp_wmb();
73 }
74
memcmp_pages(struct page * page1,struct page * page2)75 int memcmp_pages(struct page *page1, struct page *page2)
76 {
77 char *addr1, *addr2;
78 int ret;
79
80 addr1 = page_address(page1);
81 addr2 = page_address(page2);
82 ret = memcmp(addr1, addr2, PAGE_SIZE);
83
84 if (!system_supports_mte() || ret)
85 return ret;
86
87 /*
88 * If the page content is identical but at least one of the pages is
89 * tagged, return non-zero to avoid KSM merging. If only one of the
90 * pages is tagged, set_pte_at() may zero or change the tags of the
91 * other page via mte_sync_tags().
92 */
93 if (test_bit(PG_mte_tagged, &page1->flags) ||
94 test_bit(PG_mte_tagged, &page2->flags))
95 return addr1 != addr2;
96
97 return ret;
98 }
99
__mte_enable_kernel(const char * mode,unsigned long tcf)100 static inline void __mte_enable_kernel(const char *mode, unsigned long tcf)
101 {
102 /* Enable MTE Sync Mode for EL1. */
103 sysreg_clear_set(sctlr_el1, SCTLR_ELx_TCF_MASK, tcf);
104 isb();
105
106 pr_info_once("MTE: enabled in %s mode at EL1\n", mode);
107 }
108
109 #ifdef CONFIG_KASAN_HW_TAGS
mte_enable_kernel_sync(void)110 void mte_enable_kernel_sync(void)
111 {
112 /*
113 * Make sure we enter this function when no PE has set
114 * async mode previously.
115 */
116 WARN_ONCE(system_uses_mte_async_mode(),
117 "MTE async mode enabled system wide!");
118
119 __mte_enable_kernel("synchronous", SCTLR_ELx_TCF_SYNC);
120 }
121
mte_enable_kernel_async(void)122 void mte_enable_kernel_async(void)
123 {
124 __mte_enable_kernel("asynchronous", SCTLR_ELx_TCF_ASYNC);
125
126 /*
127 * MTE async mode is set system wide by the first PE that
128 * executes this function.
129 *
130 * Note: If in future KASAN acquires a runtime switching
131 * mode in between sync and async, this strategy needs
132 * to be reviewed.
133 */
134 if (!system_uses_mte_async_mode())
135 static_branch_enable(&mte_async_mode);
136 }
137 #endif
138
mte_set_report_once(bool state)139 void mte_set_report_once(bool state)
140 {
141 WRITE_ONCE(report_fault_once, state);
142 }
143
mte_report_once(void)144 bool mte_report_once(void)
145 {
146 return READ_ONCE(report_fault_once);
147 }
148
149 #ifdef CONFIG_KASAN_HW_TAGS
mte_check_tfsr_el1(void)150 void mte_check_tfsr_el1(void)
151 {
152 u64 tfsr_el1 = read_sysreg_s(SYS_TFSR_EL1);
153
154 if (unlikely(tfsr_el1 & SYS_TFSR_EL1_TF1)) {
155 /*
156 * Note: isb() is not required after this direct write
157 * because there is no indirect read subsequent to it
158 * (per ARM DDI 0487F.c table D13-1).
159 */
160 write_sysreg_s(0, SYS_TFSR_EL1);
161
162 kasan_report_async();
163 }
164 }
165 #endif
166
mte_update_sctlr_user(struct task_struct * task)167 static void mte_update_sctlr_user(struct task_struct *task)
168 {
169 /*
170 * This must be called with preemption disabled and can only be called
171 * on the current or next task since the CPU must match where the thread
172 * is going to run. The caller is responsible for calling
173 * update_sctlr_el1() later in the same preemption disabled block.
174 */
175 unsigned long sctlr = task->thread.sctlr_user;
176 unsigned long mte_ctrl = task->thread.mte_ctrl;
177 unsigned long pref, resolved_mte_tcf;
178
179 pref = __this_cpu_read(mte_tcf_preferred);
180 resolved_mte_tcf = (mte_ctrl & pref) ? pref : mte_ctrl;
181 sctlr &= ~SCTLR_EL1_TCF0_MASK;
182 if (resolved_mte_tcf & MTE_CTRL_TCF_ASYNC)
183 sctlr |= SCTLR_EL1_TCF0_ASYNC;
184 else if (resolved_mte_tcf & MTE_CTRL_TCF_SYNC)
185 sctlr |= SCTLR_EL1_TCF0_SYNC;
186 task->thread.sctlr_user = sctlr;
187 }
188
mte_update_gcr_excl(struct task_struct * task)189 static void mte_update_gcr_excl(struct task_struct *task)
190 {
191 /*
192 * SYS_GCR_EL1 will be set to current->thread.mte_ctrl value by
193 * mte_set_user_gcr() in kernel_exit, but only if KASAN is enabled.
194 */
195 if (kasan_hw_tags_enabled())
196 return;
197
198 write_sysreg_s(
199 ((task->thread.mte_ctrl >> MTE_CTRL_GCR_USER_EXCL_SHIFT) &
200 SYS_GCR_EL1_EXCL_MASK) | SYS_GCR_EL1_RRND,
201 SYS_GCR_EL1);
202 }
203
kasan_hw_tags_enable(struct alt_instr * alt,__le32 * origptr,__le32 * updptr,int nr_inst)204 void __init kasan_hw_tags_enable(struct alt_instr *alt, __le32 *origptr,
205 __le32 *updptr, int nr_inst)
206 {
207 BUG_ON(nr_inst != 1); /* Branch -> NOP */
208
209 if (kasan_hw_tags_enabled())
210 *updptr = cpu_to_le32(aarch64_insn_gen_nop());
211 }
212
mte_thread_init_user(void)213 void mte_thread_init_user(void)
214 {
215 if (!system_supports_mte())
216 return;
217
218 /* clear any pending asynchronous tag fault */
219 dsb(ish);
220 write_sysreg_s(0, SYS_TFSRE0_EL1);
221 clear_thread_flag(TIF_MTE_ASYNC_FAULT);
222 /* disable tag checking and reset tag generation mask */
223 set_mte_ctrl(current, 0);
224 }
225
mte_thread_switch(struct task_struct * next)226 void mte_thread_switch(struct task_struct *next)
227 {
228 if (!system_supports_mte())
229 return;
230
231 mte_update_sctlr_user(next);
232 mte_update_gcr_excl(next);
233
234 /*
235 * Check if an async tag exception occurred at EL1.
236 *
237 * Note: On the context switch path we rely on the dsb() present
238 * in __switch_to() to guarantee that the indirect writes to TFSR_EL1
239 * are synchronized before this point.
240 */
241 isb();
242 mte_check_tfsr_el1();
243 }
244
mte_cpu_setup(void)245 void mte_cpu_setup(void)
246 {
247 u64 rgsr;
248
249 /*
250 * CnP must be enabled only after the MAIR_EL1 register has been set
251 * up. Inconsistent MAIR_EL1 between CPUs sharing the same TLB may
252 * lead to the wrong memory type being used for a brief window during
253 * CPU power-up.
254 *
255 * CnP is not a boot feature so MTE gets enabled before CnP, but let's
256 * make sure that is the case.
257 */
258 BUG_ON(read_sysreg(ttbr0_el1) & TTBR_CNP_BIT);
259 BUG_ON(read_sysreg(ttbr1_el1) & TTBR_CNP_BIT);
260
261 /* Normal Tagged memory type at the corresponding MAIR index */
262 sysreg_clear_set(mair_el1,
263 MAIR_ATTRIDX(MAIR_ATTR_MASK, MT_NORMAL_TAGGED),
264 MAIR_ATTRIDX(MAIR_ATTR_NORMAL_TAGGED,
265 MT_NORMAL_TAGGED));
266
267 write_sysreg_s(KERNEL_GCR_EL1, SYS_GCR_EL1);
268
269 /*
270 * If GCR_EL1.RRND=1 is implemented the same way as RRND=0, then
271 * RGSR_EL1.SEED must be non-zero for IRG to produce
272 * pseudorandom numbers. As RGSR_EL1 is UNKNOWN out of reset, we
273 * must initialize it.
274 */
275 rgsr = (read_sysreg(CNTVCT_EL0) & SYS_RGSR_EL1_SEED_MASK) <<
276 SYS_RGSR_EL1_SEED_SHIFT;
277 if (rgsr == 0)
278 rgsr = 1 << SYS_RGSR_EL1_SEED_SHIFT;
279 write_sysreg_s(rgsr, SYS_RGSR_EL1);
280
281 /* clear any pending tag check faults in TFSR*_EL1 */
282 write_sysreg_s(0, SYS_TFSR_EL1);
283 write_sysreg_s(0, SYS_TFSRE0_EL1);
284
285 local_flush_tlb_all();
286 }
287
mte_suspend_enter(void)288 void mte_suspend_enter(void)
289 {
290 if (!system_supports_mte())
291 return;
292
293 /*
294 * The barriers are required to guarantee that the indirect writes
295 * to TFSR_EL1 are synchronized before we report the state.
296 */
297 dsb(nsh);
298 isb();
299
300 /* Report SYS_TFSR_EL1 before suspend entry */
301 mte_check_tfsr_el1();
302 }
303
mte_suspend_exit(void)304 void mte_suspend_exit(void)
305 {
306 if (!system_supports_mte())
307 return;
308
309 mte_cpu_setup();
310 }
311
set_mte_ctrl(struct task_struct * task,unsigned long arg)312 long set_mte_ctrl(struct task_struct *task, unsigned long arg)
313 {
314 u64 mte_ctrl = (~((arg & PR_MTE_TAG_MASK) >> PR_MTE_TAG_SHIFT) &
315 SYS_GCR_EL1_EXCL_MASK) << MTE_CTRL_GCR_USER_EXCL_SHIFT;
316
317 if (!system_supports_mte())
318 return 0;
319
320 if (arg & PR_MTE_TCF_ASYNC)
321 mte_ctrl |= MTE_CTRL_TCF_ASYNC;
322 if (arg & PR_MTE_TCF_SYNC)
323 mte_ctrl |= MTE_CTRL_TCF_SYNC;
324
325 task->thread.mte_ctrl = mte_ctrl;
326 if (task == current) {
327 preempt_disable();
328 mte_update_sctlr_user(task);
329 mte_update_gcr_excl(task);
330 update_sctlr_el1(task->thread.sctlr_user);
331 preempt_enable();
332 }
333
334 return 0;
335 }
336
get_mte_ctrl(struct task_struct * task)337 long get_mte_ctrl(struct task_struct *task)
338 {
339 unsigned long ret;
340 u64 mte_ctrl = task->thread.mte_ctrl;
341 u64 incl = (~mte_ctrl >> MTE_CTRL_GCR_USER_EXCL_SHIFT) &
342 SYS_GCR_EL1_EXCL_MASK;
343
344 if (!system_supports_mte())
345 return 0;
346
347 ret = incl << PR_MTE_TAG_SHIFT;
348 if (mte_ctrl & MTE_CTRL_TCF_ASYNC)
349 ret |= PR_MTE_TCF_ASYNC;
350 if (mte_ctrl & MTE_CTRL_TCF_SYNC)
351 ret |= PR_MTE_TCF_SYNC;
352
353 return ret;
354 }
355
356 /*
357 * Access MTE tags in another process' address space as given in mm. Update
358 * the number of tags copied. Return 0 if any tags copied, error otherwise.
359 * Inspired by __access_remote_vm().
360 */
__access_remote_tags(struct mm_struct * mm,unsigned long addr,struct iovec * kiov,unsigned int gup_flags)361 static int __access_remote_tags(struct mm_struct *mm, unsigned long addr,
362 struct iovec *kiov, unsigned int gup_flags)
363 {
364 struct vm_area_struct *vma;
365 void __user *buf = kiov->iov_base;
366 size_t len = kiov->iov_len;
367 int ret;
368 int write = gup_flags & FOLL_WRITE;
369
370 if (!access_ok(buf, len))
371 return -EFAULT;
372
373 if (mmap_read_lock_killable(mm))
374 return -EIO;
375
376 while (len) {
377 unsigned long tags, offset;
378 void *maddr;
379 struct page *page = NULL;
380
381 ret = get_user_pages_remote(mm, addr, 1, gup_flags, &page,
382 &vma, NULL);
383 if (ret <= 0)
384 break;
385
386 /*
387 * Only copy tags if the page has been mapped as PROT_MTE
388 * (PG_mte_tagged set). Otherwise the tags are not valid and
389 * not accessible to user. Moreover, an mprotect(PROT_MTE)
390 * would cause the existing tags to be cleared if the page
391 * was never mapped with PROT_MTE.
392 */
393 if (!(vma->vm_flags & VM_MTE)) {
394 ret = -EOPNOTSUPP;
395 put_page(page);
396 break;
397 }
398 WARN_ON_ONCE(!test_bit(PG_mte_tagged, &page->flags));
399
400 /* limit access to the end of the page */
401 offset = offset_in_page(addr);
402 tags = min(len, (PAGE_SIZE - offset) / MTE_GRANULE_SIZE);
403
404 maddr = page_address(page);
405 if (write) {
406 tags = mte_copy_tags_from_user(maddr + offset, buf, tags);
407 set_page_dirty_lock(page);
408 } else {
409 tags = mte_copy_tags_to_user(buf, maddr + offset, tags);
410 }
411 put_page(page);
412
413 /* error accessing the tracer's buffer */
414 if (!tags)
415 break;
416
417 len -= tags;
418 buf += tags;
419 addr += tags * MTE_GRANULE_SIZE;
420 }
421 mmap_read_unlock(mm);
422
423 /* return an error if no tags copied */
424 kiov->iov_len = buf - kiov->iov_base;
425 if (!kiov->iov_len) {
426 /* check for error accessing the tracee's address space */
427 if (ret <= 0)
428 return -EIO;
429 else
430 return -EFAULT;
431 }
432
433 return 0;
434 }
435
436 /*
437 * Copy MTE tags in another process' address space at 'addr' to/from tracer's
438 * iovec buffer. Return 0 on success. Inspired by ptrace_access_vm().
439 */
access_remote_tags(struct task_struct * tsk,unsigned long addr,struct iovec * kiov,unsigned int gup_flags)440 static int access_remote_tags(struct task_struct *tsk, unsigned long addr,
441 struct iovec *kiov, unsigned int gup_flags)
442 {
443 struct mm_struct *mm;
444 int ret;
445
446 mm = get_task_mm(tsk);
447 if (!mm)
448 return -EPERM;
449
450 if (!tsk->ptrace || (current != tsk->parent) ||
451 ((get_dumpable(mm) != SUID_DUMP_USER) &&
452 !ptracer_capable(tsk, mm->user_ns))) {
453 mmput(mm);
454 return -EPERM;
455 }
456
457 ret = __access_remote_tags(mm, addr, kiov, gup_flags);
458 mmput(mm);
459
460 return ret;
461 }
462
mte_ptrace_copy_tags(struct task_struct * child,long request,unsigned long addr,unsigned long data)463 int mte_ptrace_copy_tags(struct task_struct *child, long request,
464 unsigned long addr, unsigned long data)
465 {
466 int ret;
467 struct iovec kiov;
468 struct iovec __user *uiov = (void __user *)data;
469 unsigned int gup_flags = FOLL_FORCE;
470
471 if (!system_supports_mte())
472 return -EIO;
473
474 if (get_user(kiov.iov_base, &uiov->iov_base) ||
475 get_user(kiov.iov_len, &uiov->iov_len))
476 return -EFAULT;
477
478 if (request == PTRACE_POKEMTETAGS)
479 gup_flags |= FOLL_WRITE;
480
481 /* align addr to the MTE tag granule */
482 addr &= MTE_GRANULE_MASK;
483
484 ret = access_remote_tags(child, addr, &kiov, gup_flags);
485 if (!ret)
486 ret = put_user(kiov.iov_len, &uiov->iov_len);
487
488 return ret;
489 }
490
mte_tcf_preferred_show(struct device * dev,struct device_attribute * attr,char * buf)491 static ssize_t mte_tcf_preferred_show(struct device *dev,
492 struct device_attribute *attr, char *buf)
493 {
494 switch (per_cpu(mte_tcf_preferred, dev->id)) {
495 case MTE_CTRL_TCF_ASYNC:
496 return sysfs_emit(buf, "async\n");
497 case MTE_CTRL_TCF_SYNC:
498 return sysfs_emit(buf, "sync\n");
499 default:
500 return sysfs_emit(buf, "???\n");
501 }
502 }
503
mte_tcf_preferred_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)504 static ssize_t mte_tcf_preferred_store(struct device *dev,
505 struct device_attribute *attr,
506 const char *buf, size_t count)
507 {
508 u64 tcf;
509
510 if (sysfs_streq(buf, "async"))
511 tcf = MTE_CTRL_TCF_ASYNC;
512 else if (sysfs_streq(buf, "sync"))
513 tcf = MTE_CTRL_TCF_SYNC;
514 else
515 return -EINVAL;
516
517 device_lock(dev);
518 per_cpu(mte_tcf_preferred, dev->id) = tcf;
519 device_unlock(dev);
520
521 return count;
522 }
523 static DEVICE_ATTR_RW(mte_tcf_preferred);
524
register_mte_tcf_preferred_sysctl(void)525 static int register_mte_tcf_preferred_sysctl(void)
526 {
527 unsigned int cpu;
528
529 if (!system_supports_mte())
530 return 0;
531
532 for_each_possible_cpu(cpu) {
533 per_cpu(mte_tcf_preferred, cpu) = MTE_CTRL_TCF_ASYNC;
534 device_create_file(get_cpu_device(cpu),
535 &dev_attr_mte_tcf_preferred);
536 }
537
538 return 0;
539 }
540 subsys_initcall(register_mte_tcf_preferred_sysctl);
541