1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * ispresizer.c
4 *
5 * TI OMAP3 ISP - Resizer module
6 *
7 * Copyright (C) 2010 Nokia Corporation
8 * Copyright (C) 2009 Texas Instruments, Inc
9 *
10 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
11 * Sakari Ailus <sakari.ailus@iki.fi>
12 */
13
14 #include <linux/device.h>
15 #include <linux/mm.h>
16 #include <linux/module.h>
17
18 #include "isp.h"
19 #include "ispreg.h"
20 #include "ispresizer.h"
21
22 /*
23 * Resizer Constants
24 */
25 #define MIN_RESIZE_VALUE 64
26 #define MID_RESIZE_VALUE 512
27 #define MAX_RESIZE_VALUE 1024
28
29 #define MIN_IN_WIDTH 32
30 #define MIN_IN_HEIGHT 32
31 #define MAX_IN_WIDTH_MEMORY_MODE 4095
32 #define MAX_IN_WIDTH_ONTHEFLY_MODE_ES1 1280
33 #define MAX_IN_WIDTH_ONTHEFLY_MODE_ES2 4095
34 #define MAX_IN_HEIGHT 4095
35
36 #define MIN_OUT_WIDTH 16
37 #define MIN_OUT_HEIGHT 2
38 #define MAX_OUT_HEIGHT 4095
39
40 /*
41 * Resizer Use Constraints
42 * "TRM ES3.1, table 12-46"
43 */
44 #define MAX_4TAP_OUT_WIDTH_ES1 1280
45 #define MAX_7TAP_OUT_WIDTH_ES1 640
46 #define MAX_4TAP_OUT_WIDTH_ES2 3312
47 #define MAX_7TAP_OUT_WIDTH_ES2 1650
48 #define MAX_4TAP_OUT_WIDTH_3630 4096
49 #define MAX_7TAP_OUT_WIDTH_3630 2048
50
51 /*
52 * Constants for ratio calculation
53 */
54 #define RESIZE_DIVISOR 256
55 #define DEFAULT_PHASE 1
56
57 /*
58 * Default (and only) configuration of filter coefficients.
59 * 7-tap mode is for scale factors 0.25x to 0.5x.
60 * 4-tap mode is for scale factors 0.5x to 4.0x.
61 * There shouldn't be any reason to recalculate these, EVER.
62 */
63 static const struct isprsz_coef filter_coefs = {
64 /* For 8-phase 4-tap horizontal filter: */
65 {
66 0x0000, 0x0100, 0x0000, 0x0000,
67 0x03FA, 0x00F6, 0x0010, 0x0000,
68 0x03F9, 0x00DB, 0x002C, 0x0000,
69 0x03FB, 0x00B3, 0x0053, 0x03FF,
70 0x03FD, 0x0082, 0x0084, 0x03FD,
71 0x03FF, 0x0053, 0x00B3, 0x03FB,
72 0x0000, 0x002C, 0x00DB, 0x03F9,
73 0x0000, 0x0010, 0x00F6, 0x03FA
74 },
75 /* For 8-phase 4-tap vertical filter: */
76 {
77 0x0000, 0x0100, 0x0000, 0x0000,
78 0x03FA, 0x00F6, 0x0010, 0x0000,
79 0x03F9, 0x00DB, 0x002C, 0x0000,
80 0x03FB, 0x00B3, 0x0053, 0x03FF,
81 0x03FD, 0x0082, 0x0084, 0x03FD,
82 0x03FF, 0x0053, 0x00B3, 0x03FB,
83 0x0000, 0x002C, 0x00DB, 0x03F9,
84 0x0000, 0x0010, 0x00F6, 0x03FA
85 },
86 /* For 4-phase 7-tap horizontal filter: */
87 #define DUMMY 0
88 {
89 0x0004, 0x0023, 0x005A, 0x0058, 0x0023, 0x0004, 0x0000, DUMMY,
90 0x0002, 0x0018, 0x004d, 0x0060, 0x0031, 0x0008, 0x0000, DUMMY,
91 0x0001, 0x000f, 0x003f, 0x0062, 0x003f, 0x000f, 0x0001, DUMMY,
92 0x0000, 0x0008, 0x0031, 0x0060, 0x004d, 0x0018, 0x0002, DUMMY
93 },
94 /* For 4-phase 7-tap vertical filter: */
95 {
96 0x0004, 0x0023, 0x005A, 0x0058, 0x0023, 0x0004, 0x0000, DUMMY,
97 0x0002, 0x0018, 0x004d, 0x0060, 0x0031, 0x0008, 0x0000, DUMMY,
98 0x0001, 0x000f, 0x003f, 0x0062, 0x003f, 0x000f, 0x0001, DUMMY,
99 0x0000, 0x0008, 0x0031, 0x0060, 0x004d, 0x0018, 0x0002, DUMMY
100 }
101 /*
102 * The dummy padding is required in 7-tap mode because of how the
103 * registers are arranged physically.
104 */
105 #undef DUMMY
106 };
107
108 /*
109 * __resizer_get_format - helper function for getting resizer format
110 * @res : pointer to resizer private structure
111 * @pad : pad number
112 * @cfg: V4L2 subdev pad configuration
113 * @which : wanted subdev format
114 * return zero
115 */
116 static struct v4l2_mbus_framefmt *
__resizer_get_format(struct isp_res_device * res,struct v4l2_subdev_pad_config * cfg,unsigned int pad,enum v4l2_subdev_format_whence which)117 __resizer_get_format(struct isp_res_device *res, struct v4l2_subdev_pad_config *cfg,
118 unsigned int pad, enum v4l2_subdev_format_whence which)
119 {
120 if (which == V4L2_SUBDEV_FORMAT_TRY)
121 return v4l2_subdev_get_try_format(&res->subdev, cfg, pad);
122 else
123 return &res->formats[pad];
124 }
125
126 /*
127 * __resizer_get_crop - helper function for getting resizer crop rectangle
128 * @res : pointer to resizer private structure
129 * @cfg: V4L2 subdev pad configuration
130 * @which : wanted subdev crop rectangle
131 */
132 static struct v4l2_rect *
__resizer_get_crop(struct isp_res_device * res,struct v4l2_subdev_pad_config * cfg,enum v4l2_subdev_format_whence which)133 __resizer_get_crop(struct isp_res_device *res, struct v4l2_subdev_pad_config *cfg,
134 enum v4l2_subdev_format_whence which)
135 {
136 if (which == V4L2_SUBDEV_FORMAT_TRY)
137 return v4l2_subdev_get_try_crop(&res->subdev, cfg, RESZ_PAD_SINK);
138 else
139 return &res->crop.request;
140 }
141
142 /*
143 * resizer_set_filters - Set resizer filters
144 * @res: Device context.
145 * @h_coeff: horizontal coefficient
146 * @v_coeff: vertical coefficient
147 * Return none
148 */
resizer_set_filters(struct isp_res_device * res,const u16 * h_coeff,const u16 * v_coeff)149 static void resizer_set_filters(struct isp_res_device *res, const u16 *h_coeff,
150 const u16 *v_coeff)
151 {
152 struct isp_device *isp = to_isp_device(res);
153 u32 startaddr_h, startaddr_v, tmp_h, tmp_v;
154 int i;
155
156 startaddr_h = ISPRSZ_HFILT10;
157 startaddr_v = ISPRSZ_VFILT10;
158
159 for (i = 0; i < COEFF_CNT; i += 2) {
160 tmp_h = h_coeff[i] |
161 (h_coeff[i + 1] << ISPRSZ_HFILT_COEF1_SHIFT);
162 tmp_v = v_coeff[i] |
163 (v_coeff[i + 1] << ISPRSZ_VFILT_COEF1_SHIFT);
164 isp_reg_writel(isp, tmp_h, OMAP3_ISP_IOMEM_RESZ, startaddr_h);
165 isp_reg_writel(isp, tmp_v, OMAP3_ISP_IOMEM_RESZ, startaddr_v);
166 startaddr_h += 4;
167 startaddr_v += 4;
168 }
169 }
170
171 /*
172 * resizer_set_bilinear - Chrominance horizontal algorithm select
173 * @res: Device context.
174 * @type: Filtering interpolation type.
175 *
176 * Filtering that is same as luminance processing is
177 * intended only for downsampling, and bilinear interpolation
178 * is intended only for upsampling.
179 */
resizer_set_bilinear(struct isp_res_device * res,enum resizer_chroma_algo type)180 static void resizer_set_bilinear(struct isp_res_device *res,
181 enum resizer_chroma_algo type)
182 {
183 struct isp_device *isp = to_isp_device(res);
184
185 if (type == RSZ_BILINEAR)
186 isp_reg_set(isp, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_CNT,
187 ISPRSZ_CNT_CBILIN);
188 else
189 isp_reg_clr(isp, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_CNT,
190 ISPRSZ_CNT_CBILIN);
191 }
192
193 /*
194 * resizer_set_ycpos - Luminance and chrominance order
195 * @res: Device context.
196 * @pixelcode: pixel code.
197 */
resizer_set_ycpos(struct isp_res_device * res,u32 pixelcode)198 static void resizer_set_ycpos(struct isp_res_device *res, u32 pixelcode)
199 {
200 struct isp_device *isp = to_isp_device(res);
201
202 switch (pixelcode) {
203 case MEDIA_BUS_FMT_YUYV8_1X16:
204 isp_reg_set(isp, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_CNT,
205 ISPRSZ_CNT_YCPOS);
206 break;
207 case MEDIA_BUS_FMT_UYVY8_1X16:
208 isp_reg_clr(isp, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_CNT,
209 ISPRSZ_CNT_YCPOS);
210 break;
211 default:
212 return;
213 }
214 }
215
216 /*
217 * resizer_set_phase - Setup horizontal and vertical starting phase
218 * @res: Device context.
219 * @h_phase: horizontal phase parameters.
220 * @v_phase: vertical phase parameters.
221 *
222 * Horizontal and vertical phase range is 0 to 7
223 */
resizer_set_phase(struct isp_res_device * res,u32 h_phase,u32 v_phase)224 static void resizer_set_phase(struct isp_res_device *res, u32 h_phase,
225 u32 v_phase)
226 {
227 struct isp_device *isp = to_isp_device(res);
228 u32 rgval;
229
230 rgval = isp_reg_readl(isp, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_CNT) &
231 ~(ISPRSZ_CNT_HSTPH_MASK | ISPRSZ_CNT_VSTPH_MASK);
232 rgval |= (h_phase << ISPRSZ_CNT_HSTPH_SHIFT) & ISPRSZ_CNT_HSTPH_MASK;
233 rgval |= (v_phase << ISPRSZ_CNT_VSTPH_SHIFT) & ISPRSZ_CNT_VSTPH_MASK;
234
235 isp_reg_writel(isp, rgval, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_CNT);
236 }
237
238 /*
239 * resizer_set_luma - Setup luminance enhancer parameters
240 * @res: Device context.
241 * @luma: Structure for luminance enhancer parameters.
242 *
243 * Algorithm select:
244 * 0x0: Disable
245 * 0x1: [-1 2 -1]/2 high-pass filter
246 * 0x2: [-1 -2 6 -2 -1]/4 high-pass filter
247 *
248 * Maximum gain:
249 * The data is coded in U4Q4 representation.
250 *
251 * Slope:
252 * The data is coded in U4Q4 representation.
253 *
254 * Coring offset:
255 * The data is coded in U8Q0 representation.
256 *
257 * The new luminance value is computed as:
258 * Y += HPF(Y) x max(GAIN, (HPF(Y) - CORE) x SLOP + 8) >> 4.
259 */
resizer_set_luma(struct isp_res_device * res,struct resizer_luma_yenh * luma)260 static void resizer_set_luma(struct isp_res_device *res,
261 struct resizer_luma_yenh *luma)
262 {
263 struct isp_device *isp = to_isp_device(res);
264 u32 rgval;
265
266 rgval = (luma->algo << ISPRSZ_YENH_ALGO_SHIFT)
267 & ISPRSZ_YENH_ALGO_MASK;
268 rgval |= (luma->gain << ISPRSZ_YENH_GAIN_SHIFT)
269 & ISPRSZ_YENH_GAIN_MASK;
270 rgval |= (luma->slope << ISPRSZ_YENH_SLOP_SHIFT)
271 & ISPRSZ_YENH_SLOP_MASK;
272 rgval |= (luma->core << ISPRSZ_YENH_CORE_SHIFT)
273 & ISPRSZ_YENH_CORE_MASK;
274
275 isp_reg_writel(isp, rgval, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_YENH);
276 }
277
278 /*
279 * resizer_set_source - Input source select
280 * @res: Device context.
281 * @source: Input source type
282 *
283 * If this field is set to RESIZER_INPUT_VP, the resizer input is fed from
284 * Preview/CCDC engine, otherwise from memory.
285 */
resizer_set_source(struct isp_res_device * res,enum resizer_input_entity source)286 static void resizer_set_source(struct isp_res_device *res,
287 enum resizer_input_entity source)
288 {
289 struct isp_device *isp = to_isp_device(res);
290
291 if (source == RESIZER_INPUT_MEMORY)
292 isp_reg_set(isp, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_CNT,
293 ISPRSZ_CNT_INPSRC);
294 else
295 isp_reg_clr(isp, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_CNT,
296 ISPRSZ_CNT_INPSRC);
297 }
298
299 /*
300 * resizer_set_ratio - Setup horizontal and vertical resizing value
301 * @res: Device context.
302 * @ratio: Structure for ratio parameters.
303 *
304 * Resizing range from 64 to 1024
305 */
resizer_set_ratio(struct isp_res_device * res,const struct resizer_ratio * ratio)306 static void resizer_set_ratio(struct isp_res_device *res,
307 const struct resizer_ratio *ratio)
308 {
309 struct isp_device *isp = to_isp_device(res);
310 const u16 *h_filter, *v_filter;
311 u32 rgval;
312
313 rgval = isp_reg_readl(isp, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_CNT) &
314 ~(ISPRSZ_CNT_HRSZ_MASK | ISPRSZ_CNT_VRSZ_MASK);
315 rgval |= ((ratio->horz - 1) << ISPRSZ_CNT_HRSZ_SHIFT)
316 & ISPRSZ_CNT_HRSZ_MASK;
317 rgval |= ((ratio->vert - 1) << ISPRSZ_CNT_VRSZ_SHIFT)
318 & ISPRSZ_CNT_VRSZ_MASK;
319 isp_reg_writel(isp, rgval, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_CNT);
320
321 /* prepare horizontal filter coefficients */
322 if (ratio->horz > MID_RESIZE_VALUE)
323 h_filter = &filter_coefs.h_filter_coef_7tap[0];
324 else
325 h_filter = &filter_coefs.h_filter_coef_4tap[0];
326
327 /* prepare vertical filter coefficients */
328 if (ratio->vert > MID_RESIZE_VALUE)
329 v_filter = &filter_coefs.v_filter_coef_7tap[0];
330 else
331 v_filter = &filter_coefs.v_filter_coef_4tap[0];
332
333 resizer_set_filters(res, h_filter, v_filter);
334 }
335
336 /*
337 * resizer_set_dst_size - Setup the output height and width
338 * @res: Device context.
339 * @width: Output width.
340 * @height: Output height.
341 *
342 * Width :
343 * The value must be EVEN.
344 *
345 * Height:
346 * The number of bytes written to SDRAM must be
347 * a multiple of 16-bytes if the vertical resizing factor
348 * is greater than 1x (upsizing)
349 */
resizer_set_output_size(struct isp_res_device * res,u32 width,u32 height)350 static void resizer_set_output_size(struct isp_res_device *res,
351 u32 width, u32 height)
352 {
353 struct isp_device *isp = to_isp_device(res);
354 u32 rgval;
355
356 rgval = (width << ISPRSZ_OUT_SIZE_HORZ_SHIFT)
357 & ISPRSZ_OUT_SIZE_HORZ_MASK;
358 rgval |= (height << ISPRSZ_OUT_SIZE_VERT_SHIFT)
359 & ISPRSZ_OUT_SIZE_VERT_MASK;
360 isp_reg_writel(isp, rgval, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_OUT_SIZE);
361 }
362
363 /*
364 * resizer_set_output_offset - Setup memory offset for the output lines.
365 * @res: Device context.
366 * @offset: Memory offset.
367 *
368 * The 5 LSBs are forced to be zeros by the hardware to align on a 32-byte
369 * boundary; the 5 LSBs are read-only. For optimal use of SDRAM bandwidth,
370 * the SDRAM line offset must be set on a 256-byte boundary
371 */
resizer_set_output_offset(struct isp_res_device * res,u32 offset)372 static void resizer_set_output_offset(struct isp_res_device *res, u32 offset)
373 {
374 struct isp_device *isp = to_isp_device(res);
375
376 isp_reg_writel(isp, offset, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_SDR_OUTOFF);
377 }
378
379 /*
380 * resizer_set_start - Setup vertical and horizontal start position
381 * @res: Device context.
382 * @left: Horizontal start position.
383 * @top: Vertical start position.
384 *
385 * Vertical start line:
386 * This field makes sense only when the resizer obtains its input
387 * from the preview engine/CCDC
388 *
389 * Horizontal start pixel:
390 * Pixels are coded on 16 bits for YUV and 8 bits for color separate data.
391 * When the resizer gets its input from SDRAM, this field must be set
392 * to <= 15 for YUV 16-bit data and <= 31 for 8-bit color separate data
393 */
resizer_set_start(struct isp_res_device * res,u32 left,u32 top)394 static void resizer_set_start(struct isp_res_device *res, u32 left, u32 top)
395 {
396 struct isp_device *isp = to_isp_device(res);
397 u32 rgval;
398
399 rgval = (left << ISPRSZ_IN_START_HORZ_ST_SHIFT)
400 & ISPRSZ_IN_START_HORZ_ST_MASK;
401 rgval |= (top << ISPRSZ_IN_START_VERT_ST_SHIFT)
402 & ISPRSZ_IN_START_VERT_ST_MASK;
403
404 isp_reg_writel(isp, rgval, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_IN_START);
405 }
406
407 /*
408 * resizer_set_input_size - Setup the input size
409 * @res: Device context.
410 * @width: The range is 0 to 4095 pixels
411 * @height: The range is 0 to 4095 lines
412 */
resizer_set_input_size(struct isp_res_device * res,u32 width,u32 height)413 static void resizer_set_input_size(struct isp_res_device *res,
414 u32 width, u32 height)
415 {
416 struct isp_device *isp = to_isp_device(res);
417 u32 rgval;
418
419 rgval = (width << ISPRSZ_IN_SIZE_HORZ_SHIFT)
420 & ISPRSZ_IN_SIZE_HORZ_MASK;
421 rgval |= (height << ISPRSZ_IN_SIZE_VERT_SHIFT)
422 & ISPRSZ_IN_SIZE_VERT_MASK;
423
424 isp_reg_writel(isp, rgval, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_IN_SIZE);
425 }
426
427 /*
428 * resizer_set_src_offs - Setup the memory offset for the input lines
429 * @res: Device context.
430 * @offset: Memory offset.
431 *
432 * The 5 LSBs are forced to be zeros by the hardware to align on a 32-byte
433 * boundary; the 5 LSBs are read-only. This field must be programmed to be
434 * 0x0 if the resizer input is from preview engine/CCDC.
435 */
resizer_set_input_offset(struct isp_res_device * res,u32 offset)436 static void resizer_set_input_offset(struct isp_res_device *res, u32 offset)
437 {
438 struct isp_device *isp = to_isp_device(res);
439
440 isp_reg_writel(isp, offset, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_SDR_INOFF);
441 }
442
443 /*
444 * resizer_set_intype - Input type select
445 * @res: Device context.
446 * @type: Pixel format type.
447 */
resizer_set_intype(struct isp_res_device * res,enum resizer_colors_type type)448 static void resizer_set_intype(struct isp_res_device *res,
449 enum resizer_colors_type type)
450 {
451 struct isp_device *isp = to_isp_device(res);
452
453 if (type == RSZ_COLOR8)
454 isp_reg_set(isp, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_CNT,
455 ISPRSZ_CNT_INPTYP);
456 else
457 isp_reg_clr(isp, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_CNT,
458 ISPRSZ_CNT_INPTYP);
459 }
460
461 /*
462 * __resizer_set_inaddr - Helper function for set input address
463 * @res : pointer to resizer private data structure
464 * @addr: input address
465 * return none
466 */
__resizer_set_inaddr(struct isp_res_device * res,u32 addr)467 static void __resizer_set_inaddr(struct isp_res_device *res, u32 addr)
468 {
469 struct isp_device *isp = to_isp_device(res);
470
471 isp_reg_writel(isp, addr, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_SDR_INADD);
472 }
473
474 /*
475 * The data rate at the horizontal resizer output must not exceed half the
476 * functional clock or 100 MP/s, whichever is lower. According to the TRM
477 * there's no similar requirement for the vertical resizer output. However
478 * experience showed that vertical upscaling by 4 leads to SBL overflows (with
479 * data rates at the resizer output exceeding 300 MP/s). Limiting the resizer
480 * output data rate to the functional clock or 200 MP/s, whichever is lower,
481 * seems to get rid of SBL overflows.
482 *
483 * The maximum data rate at the output of the horizontal resizer can thus be
484 * computed with
485 *
486 * max intermediate rate <= L3 clock * input height / output height
487 * max intermediate rate <= L3 clock / 2
488 *
489 * The maximum data rate at the resizer input is then
490 *
491 * max input rate <= max intermediate rate * input width / output width
492 *
493 * where the input width and height are the resizer input crop rectangle size.
494 * The TRM doesn't clearly explain if that's a maximum instant data rate or a
495 * maximum average data rate.
496 */
omap3isp_resizer_max_rate(struct isp_res_device * res,unsigned int * max_rate)497 void omap3isp_resizer_max_rate(struct isp_res_device *res,
498 unsigned int *max_rate)
499 {
500 struct isp_pipeline *pipe = to_isp_pipeline(&res->subdev.entity);
501 const struct v4l2_mbus_framefmt *ofmt = &res->formats[RESZ_PAD_SOURCE];
502 unsigned long limit = min(pipe->l3_ick, 200000000UL);
503 unsigned long clock;
504
505 clock = div_u64((u64)limit * res->crop.active.height, ofmt->height);
506 clock = min(clock, limit / 2);
507 *max_rate = div_u64((u64)clock * res->crop.active.width, ofmt->width);
508 }
509
510 /*
511 * When the resizer processes images from memory, the driver must slow down read
512 * requests on the input to at least comply with the internal data rate
513 * requirements. If the application real-time requirements can cope with slower
514 * processing, the resizer can be slowed down even more to put less pressure on
515 * the overall system.
516 *
517 * When the resizer processes images on the fly (either from the CCDC or the
518 * preview module), the same data rate requirements apply but they can't be
519 * enforced at the resizer level. The image input module (sensor, CCP2 or
520 * preview module) must not provide image data faster than the resizer can
521 * process.
522 *
523 * For live image pipelines, the data rate is set by the frame format, size and
524 * rate. The sensor output frame rate must not exceed the maximum resizer data
525 * rate.
526 *
527 * The resizer slows down read requests by inserting wait cycles in the SBL
528 * requests. The maximum number of 256-byte requests per second can be computed
529 * as (the data rate is multiplied by 2 to convert from pixels per second to
530 * bytes per second)
531 *
532 * request per second = data rate * 2 / 256
533 * cycles per request = cycles per second / requests per second
534 *
535 * The number of cycles per second is controlled by the L3 clock, leading to
536 *
537 * cycles per request = L3 frequency / 2 * 256 / data rate
538 */
resizer_adjust_bandwidth(struct isp_res_device * res)539 static void resizer_adjust_bandwidth(struct isp_res_device *res)
540 {
541 struct isp_pipeline *pipe = to_isp_pipeline(&res->subdev.entity);
542 struct isp_device *isp = to_isp_device(res);
543 unsigned long l3_ick = pipe->l3_ick;
544 struct v4l2_fract *timeperframe;
545 unsigned int cycles_per_frame;
546 unsigned int requests_per_frame;
547 unsigned int cycles_per_request;
548 unsigned int granularity;
549 unsigned int minimum;
550 unsigned int maximum;
551 unsigned int value;
552
553 if (res->input != RESIZER_INPUT_MEMORY) {
554 isp_reg_clr(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_SDR_REQ_EXP,
555 ISPSBL_SDR_REQ_RSZ_EXP_MASK);
556 return;
557 }
558
559 switch (isp->revision) {
560 case ISP_REVISION_1_0:
561 case ISP_REVISION_2_0:
562 default:
563 granularity = 1024;
564 break;
565
566 case ISP_REVISION_15_0:
567 granularity = 32;
568 break;
569 }
570
571 /* Compute the minimum number of cycles per request, based on the
572 * pipeline maximum data rate. This is an absolute lower bound if we
573 * don't want SBL overflows, so round the value up.
574 */
575 cycles_per_request = div_u64((u64)l3_ick / 2 * 256 + pipe->max_rate - 1,
576 pipe->max_rate);
577 minimum = DIV_ROUND_UP(cycles_per_request, granularity);
578
579 /* Compute the maximum number of cycles per request, based on the
580 * requested frame rate. This is a soft upper bound to achieve a frame
581 * rate equal or higher than the requested value, so round the value
582 * down.
583 */
584 timeperframe = &pipe->max_timeperframe;
585
586 requests_per_frame = DIV_ROUND_UP(res->crop.active.width * 2, 256)
587 * res->crop.active.height;
588 cycles_per_frame = div_u64((u64)l3_ick * timeperframe->numerator,
589 timeperframe->denominator);
590 cycles_per_request = cycles_per_frame / requests_per_frame;
591
592 maximum = cycles_per_request / granularity;
593
594 value = max(minimum, maximum);
595
596 dev_dbg(isp->dev, "%s: cycles per request = %u\n", __func__, value);
597 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_SDR_REQ_EXP,
598 ISPSBL_SDR_REQ_RSZ_EXP_MASK,
599 value << ISPSBL_SDR_REQ_RSZ_EXP_SHIFT);
600 }
601
602 /*
603 * omap3isp_resizer_busy - Checks if ISP resizer is busy.
604 *
605 * Returns busy field from ISPRSZ_PCR register.
606 */
omap3isp_resizer_busy(struct isp_res_device * res)607 int omap3isp_resizer_busy(struct isp_res_device *res)
608 {
609 struct isp_device *isp = to_isp_device(res);
610
611 return isp_reg_readl(isp, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_PCR) &
612 ISPRSZ_PCR_BUSY;
613 }
614
615 /*
616 * resizer_set_inaddr - Sets the memory address of the input frame.
617 * @addr: 32bit memory address aligned on 32byte boundary.
618 */
resizer_set_inaddr(struct isp_res_device * res,u32 addr)619 static void resizer_set_inaddr(struct isp_res_device *res, u32 addr)
620 {
621 res->addr_base = addr;
622
623 /* This will handle crop settings in stream off state */
624 if (res->crop_offset)
625 addr += res->crop_offset & ~0x1f;
626
627 __resizer_set_inaddr(res, addr);
628 }
629
630 /*
631 * Configures the memory address to which the output frame is written.
632 * @addr: 32bit memory address aligned on 32byte boundary.
633 * Note: For SBL efficiency reasons the address should be on a 256-byte
634 * boundary.
635 */
resizer_set_outaddr(struct isp_res_device * res,u32 addr)636 static void resizer_set_outaddr(struct isp_res_device *res, u32 addr)
637 {
638 struct isp_device *isp = to_isp_device(res);
639
640 /*
641 * Set output address. This needs to be in its own function
642 * because it changes often.
643 */
644 isp_reg_writel(isp, addr << ISPRSZ_SDR_OUTADD_ADDR_SHIFT,
645 OMAP3_ISP_IOMEM_RESZ, ISPRSZ_SDR_OUTADD);
646 }
647
648 /*
649 * resizer_print_status - Prints the values of the resizer module registers.
650 */
651 #define RSZ_PRINT_REGISTER(isp, name)\
652 dev_dbg(isp->dev, "###RSZ " #name "=0x%08x\n", \
653 isp_reg_readl(isp, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_##name))
654
resizer_print_status(struct isp_res_device * res)655 static void resizer_print_status(struct isp_res_device *res)
656 {
657 struct isp_device *isp = to_isp_device(res);
658
659 dev_dbg(isp->dev, "-------------Resizer Register dump----------\n");
660
661 RSZ_PRINT_REGISTER(isp, PCR);
662 RSZ_PRINT_REGISTER(isp, CNT);
663 RSZ_PRINT_REGISTER(isp, OUT_SIZE);
664 RSZ_PRINT_REGISTER(isp, IN_START);
665 RSZ_PRINT_REGISTER(isp, IN_SIZE);
666 RSZ_PRINT_REGISTER(isp, SDR_INADD);
667 RSZ_PRINT_REGISTER(isp, SDR_INOFF);
668 RSZ_PRINT_REGISTER(isp, SDR_OUTADD);
669 RSZ_PRINT_REGISTER(isp, SDR_OUTOFF);
670 RSZ_PRINT_REGISTER(isp, YENH);
671
672 dev_dbg(isp->dev, "--------------------------------------------\n");
673 }
674
675 /*
676 * resizer_calc_ratios - Helper function for calculating resizer ratios
677 * @res: pointer to resizer private data structure
678 * @input: input frame size
679 * @output: output frame size
680 * @ratio : return calculated ratios
681 * return none
682 *
683 * The resizer uses a polyphase sample rate converter. The upsampling filter
684 * has a fixed number of phases that depend on the resizing ratio. As the ratio
685 * computation depends on the number of phases, we need to compute a first
686 * approximation and then refine it.
687 *
688 * The input/output/ratio relationship is given by the OMAP34xx TRM:
689 *
690 * - 8-phase, 4-tap mode (RSZ = 64 ~ 512)
691 * iw = (32 * sph + (ow - 1) * hrsz + 16) >> 8 + 7
692 * ih = (32 * spv + (oh - 1) * vrsz + 16) >> 8 + 4
693 * - 4-phase, 7-tap mode (RSZ = 513 ~ 1024)
694 * iw = (64 * sph + (ow - 1) * hrsz + 32) >> 8 + 7
695 * ih = (64 * spv + (oh - 1) * vrsz + 32) >> 8 + 7
696 *
697 * iw and ih are the input width and height after cropping. Those equations need
698 * to be satisfied exactly for the resizer to work correctly.
699 *
700 * The equations can't be easily reverted, as the >> 8 operation is not linear.
701 * In addition, not all input sizes can be achieved for a given output size. To
702 * get the highest input size lower than or equal to the requested input size,
703 * we need to compute the highest resizing ratio that satisfies the following
704 * inequality (taking the 4-tap mode width equation as an example)
705 *
706 * iw >= (32 * sph + (ow - 1) * hrsz + 16) >> 8 - 7
707 *
708 * (where iw is the requested input width) which can be rewritten as
709 *
710 * iw - 7 >= (32 * sph + (ow - 1) * hrsz + 16) >> 8
711 * (iw - 7) << 8 >= 32 * sph + (ow - 1) * hrsz + 16 - b
712 * ((iw - 7) << 8) + b >= 32 * sph + (ow - 1) * hrsz + 16
713 *
714 * where b is the value of the 8 least significant bits of the right hand side
715 * expression of the last inequality. The highest resizing ratio value will be
716 * achieved when b is equal to its maximum value of 255. That resizing ratio
717 * value will still satisfy the original inequality, as b will disappear when
718 * the expression will be shifted right by 8.
719 *
720 * The reverted equations thus become
721 *
722 * - 8-phase, 4-tap mode
723 * hrsz = ((iw - 7) * 256 + 255 - 16 - 32 * sph) / (ow - 1)
724 * vrsz = ((ih - 4) * 256 + 255 - 16 - 32 * spv) / (oh - 1)
725 * - 4-phase, 7-tap mode
726 * hrsz = ((iw - 7) * 256 + 255 - 32 - 64 * sph) / (ow - 1)
727 * vrsz = ((ih - 7) * 256 + 255 - 32 - 64 * spv) / (oh - 1)
728 *
729 * The ratios are integer values, and are rounded down to ensure that the
730 * cropped input size is not bigger than the uncropped input size.
731 *
732 * As the number of phases/taps, used to select the correct equations to compute
733 * the ratio, depends on the ratio, we start with the 4-tap mode equations to
734 * compute an approximation of the ratio, and switch to the 7-tap mode equations
735 * if the approximation is higher than the ratio threshold.
736 *
737 * As the 7-tap mode equations will return a ratio smaller than or equal to the
738 * 4-tap mode equations, the resulting ratio could become lower than or equal to
739 * the ratio threshold. This 'equations loop' isn't an issue as long as the
740 * correct equations are used to compute the final input size. Starting with the
741 * 4-tap mode equations ensure that, in case of values resulting in a 'ratio
742 * loop', the smallest of the ratio values will be used, never exceeding the
743 * requested input size.
744 *
745 * We first clamp the output size according to the hardware capability to avoid
746 * auto-cropping the input more than required to satisfy the TRM equations. The
747 * minimum output size is achieved with a scaling factor of 1024. It is thus
748 * computed using the 7-tap equations.
749 *
750 * min ow = ((iw - 7) * 256 - 32 - 64 * sph) / 1024 + 1
751 * min oh = ((ih - 7) * 256 - 32 - 64 * spv) / 1024 + 1
752 *
753 * Similarly, the maximum output size is achieved with a scaling factor of 64
754 * and computed using the 4-tap equations.
755 *
756 * max ow = ((iw - 7) * 256 + 255 - 16 - 32 * sph) / 64 + 1
757 * max oh = ((ih - 4) * 256 + 255 - 16 - 32 * spv) / 64 + 1
758 *
759 * The additional +255 term compensates for the round down operation performed
760 * by the TRM equations when shifting the value right by 8 bits.
761 *
762 * We then compute and clamp the ratios (x1/4 ~ x4). Clamping the output size to
763 * the maximum value guarantees that the ratio value will never be smaller than
764 * the minimum, but it could still slightly exceed the maximum. Clamping the
765 * ratio will thus result in a resizing factor slightly larger than the
766 * requested value.
767 *
768 * To accommodate that, and make sure the TRM equations are satisfied exactly, we
769 * compute the input crop rectangle as the last step.
770 *
771 * As if the situation wasn't complex enough, the maximum output width depends
772 * on the vertical resizing ratio. Fortunately, the output height doesn't
773 * depend on the horizontal resizing ratio. We can then start by computing the
774 * output height and the vertical ratio, and then move to computing the output
775 * width and the horizontal ratio.
776 */
resizer_calc_ratios(struct isp_res_device * res,struct v4l2_rect * input,struct v4l2_mbus_framefmt * output,struct resizer_ratio * ratio)777 static void resizer_calc_ratios(struct isp_res_device *res,
778 struct v4l2_rect *input,
779 struct v4l2_mbus_framefmt *output,
780 struct resizer_ratio *ratio)
781 {
782 struct isp_device *isp = to_isp_device(res);
783 const unsigned int spv = DEFAULT_PHASE;
784 const unsigned int sph = DEFAULT_PHASE;
785 unsigned int upscaled_width;
786 unsigned int upscaled_height;
787 unsigned int min_width;
788 unsigned int min_height;
789 unsigned int max_width;
790 unsigned int max_height;
791 unsigned int width_alignment;
792 unsigned int width;
793 unsigned int height;
794
795 /*
796 * Clamp the output height based on the hardware capabilities and
797 * compute the vertical resizing ratio.
798 */
799 min_height = ((input->height - 7) * 256 - 32 - 64 * spv) / 1024 + 1;
800 min_height = max_t(unsigned int, min_height, MIN_OUT_HEIGHT);
801 max_height = ((input->height - 4) * 256 + 255 - 16 - 32 * spv) / 64 + 1;
802 max_height = min_t(unsigned int, max_height, MAX_OUT_HEIGHT);
803 output->height = clamp(output->height, min_height, max_height);
804
805 ratio->vert = ((input->height - 4) * 256 + 255 - 16 - 32 * spv)
806 / (output->height - 1);
807 if (ratio->vert > MID_RESIZE_VALUE)
808 ratio->vert = ((input->height - 7) * 256 + 255 - 32 - 64 * spv)
809 / (output->height - 1);
810 ratio->vert = clamp_t(unsigned int, ratio->vert,
811 MIN_RESIZE_VALUE, MAX_RESIZE_VALUE);
812
813 if (ratio->vert <= MID_RESIZE_VALUE) {
814 upscaled_height = (output->height - 1) * ratio->vert
815 + 32 * spv + 16;
816 height = (upscaled_height >> 8) + 4;
817 } else {
818 upscaled_height = (output->height - 1) * ratio->vert
819 + 64 * spv + 32;
820 height = (upscaled_height >> 8) + 7;
821 }
822
823 /*
824 * Compute the minimum and maximum output widths based on the hardware
825 * capabilities. The maximum depends on the vertical resizing ratio.
826 */
827 min_width = ((input->width - 7) * 256 - 32 - 64 * sph) / 1024 + 1;
828 min_width = max_t(unsigned int, min_width, MIN_OUT_WIDTH);
829
830 if (ratio->vert <= MID_RESIZE_VALUE) {
831 switch (isp->revision) {
832 case ISP_REVISION_1_0:
833 max_width = MAX_4TAP_OUT_WIDTH_ES1;
834 break;
835
836 case ISP_REVISION_2_0:
837 default:
838 max_width = MAX_4TAP_OUT_WIDTH_ES2;
839 break;
840
841 case ISP_REVISION_15_0:
842 max_width = MAX_4TAP_OUT_WIDTH_3630;
843 break;
844 }
845 } else {
846 switch (isp->revision) {
847 case ISP_REVISION_1_0:
848 max_width = MAX_7TAP_OUT_WIDTH_ES1;
849 break;
850
851 case ISP_REVISION_2_0:
852 default:
853 max_width = MAX_7TAP_OUT_WIDTH_ES2;
854 break;
855
856 case ISP_REVISION_15_0:
857 max_width = MAX_7TAP_OUT_WIDTH_3630;
858 break;
859 }
860 }
861 max_width = min(((input->width - 7) * 256 + 255 - 16 - 32 * sph) / 64
862 + 1, max_width);
863
864 /*
865 * The output width must be even, and must be a multiple of 16 bytes
866 * when upscaling vertically. Clamp the output width to the valid range.
867 * Take the alignment into account (the maximum width in 7-tap mode on
868 * ES2 isn't a multiple of 8) and align the result up to make sure it
869 * won't be smaller than the minimum.
870 */
871 width_alignment = ratio->vert < 256 ? 8 : 2;
872 output->width = clamp(output->width, min_width,
873 max_width & ~(width_alignment - 1));
874 output->width = ALIGN(output->width, width_alignment);
875
876 ratio->horz = ((input->width - 7) * 256 + 255 - 16 - 32 * sph)
877 / (output->width - 1);
878 if (ratio->horz > MID_RESIZE_VALUE)
879 ratio->horz = ((input->width - 7) * 256 + 255 - 32 - 64 * sph)
880 / (output->width - 1);
881 ratio->horz = clamp_t(unsigned int, ratio->horz,
882 MIN_RESIZE_VALUE, MAX_RESIZE_VALUE);
883
884 if (ratio->horz <= MID_RESIZE_VALUE) {
885 upscaled_width = (output->width - 1) * ratio->horz
886 + 32 * sph + 16;
887 width = (upscaled_width >> 8) + 7;
888 } else {
889 upscaled_width = (output->width - 1) * ratio->horz
890 + 64 * sph + 32;
891 width = (upscaled_width >> 8) + 7;
892 }
893
894 /* Center the new crop rectangle. */
895 input->left += (input->width - width) / 2;
896 input->top += (input->height - height) / 2;
897 input->width = width;
898 input->height = height;
899 }
900
901 /*
902 * resizer_set_crop_params - Setup hardware with cropping parameters
903 * @res : resizer private structure
904 * @input : format on sink pad
905 * @output : format on source pad
906 * return none
907 */
resizer_set_crop_params(struct isp_res_device * res,const struct v4l2_mbus_framefmt * input,const struct v4l2_mbus_framefmt * output)908 static void resizer_set_crop_params(struct isp_res_device *res,
909 const struct v4l2_mbus_framefmt *input,
910 const struct v4l2_mbus_framefmt *output)
911 {
912 resizer_set_ratio(res, &res->ratio);
913
914 /* Set chrominance horizontal algorithm */
915 if (res->ratio.horz >= RESIZE_DIVISOR)
916 resizer_set_bilinear(res, RSZ_THE_SAME);
917 else
918 resizer_set_bilinear(res, RSZ_BILINEAR);
919
920 resizer_adjust_bandwidth(res);
921
922 if (res->input == RESIZER_INPUT_MEMORY) {
923 /* Calculate additional offset for crop */
924 res->crop_offset = (res->crop.active.top * input->width +
925 res->crop.active.left) * 2;
926 /*
927 * Write lowest 4 bits of horizontal pixel offset (in pixels),
928 * vertical start must be 0.
929 */
930 resizer_set_start(res, (res->crop_offset / 2) & 0xf, 0);
931
932 /*
933 * Set start (read) address for cropping, in bytes.
934 * Lowest 5 bits must be zero.
935 */
936 __resizer_set_inaddr(res,
937 res->addr_base + (res->crop_offset & ~0x1f));
938 } else {
939 /*
940 * Set vertical start line and horizontal starting pixel.
941 * If the input is from CCDC/PREV, horizontal start field is
942 * in bytes (twice number of pixels).
943 */
944 resizer_set_start(res, res->crop.active.left * 2,
945 res->crop.active.top);
946 /* Input address and offset must be 0 for preview/ccdc input */
947 __resizer_set_inaddr(res, 0);
948 resizer_set_input_offset(res, 0);
949 }
950
951 /* Set the input size */
952 resizer_set_input_size(res, res->crop.active.width,
953 res->crop.active.height);
954 }
955
resizer_configure(struct isp_res_device * res)956 static void resizer_configure(struct isp_res_device *res)
957 {
958 struct v4l2_mbus_framefmt *informat, *outformat;
959 struct resizer_luma_yenh luma = {0, 0, 0, 0};
960
961 resizer_set_source(res, res->input);
962
963 informat = &res->formats[RESZ_PAD_SINK];
964 outformat = &res->formats[RESZ_PAD_SOURCE];
965
966 /* RESZ_PAD_SINK */
967 if (res->input == RESIZER_INPUT_VP)
968 resizer_set_input_offset(res, 0);
969 else
970 resizer_set_input_offset(res, ALIGN(informat->width, 0x10) * 2);
971
972 /* YUV422 interleaved, default phase, no luma enhancement */
973 resizer_set_intype(res, RSZ_YUV422);
974 resizer_set_ycpos(res, informat->code);
975 resizer_set_phase(res, DEFAULT_PHASE, DEFAULT_PHASE);
976 resizer_set_luma(res, &luma);
977
978 /* RESZ_PAD_SOURCE */
979 resizer_set_output_offset(res, ALIGN(outformat->width * 2, 32));
980 resizer_set_output_size(res, outformat->width, outformat->height);
981
982 resizer_set_crop_params(res, informat, outformat);
983 }
984
985 /* -----------------------------------------------------------------------------
986 * Interrupt handling
987 */
988
resizer_enable_oneshot(struct isp_res_device * res)989 static void resizer_enable_oneshot(struct isp_res_device *res)
990 {
991 struct isp_device *isp = to_isp_device(res);
992
993 isp_reg_set(isp, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_PCR,
994 ISPRSZ_PCR_ENABLE | ISPRSZ_PCR_ONESHOT);
995 }
996
omap3isp_resizer_isr_frame_sync(struct isp_res_device * res)997 void omap3isp_resizer_isr_frame_sync(struct isp_res_device *res)
998 {
999 /*
1000 * If ISP_VIDEO_DMAQUEUE_QUEUED is set, DMA queue had an underrun
1001 * condition, the module was paused and now we have a buffer queued
1002 * on the output again. Restart the pipeline if running in continuous
1003 * mode.
1004 */
1005 if (res->state == ISP_PIPELINE_STREAM_CONTINUOUS &&
1006 res->video_out.dmaqueue_flags & ISP_VIDEO_DMAQUEUE_QUEUED) {
1007 resizer_enable_oneshot(res);
1008 isp_video_dmaqueue_flags_clr(&res->video_out);
1009 }
1010 }
1011
resizer_isr_buffer(struct isp_res_device * res)1012 static void resizer_isr_buffer(struct isp_res_device *res)
1013 {
1014 struct isp_pipeline *pipe = to_isp_pipeline(&res->subdev.entity);
1015 struct isp_buffer *buffer;
1016 int restart = 0;
1017
1018 if (res->state == ISP_PIPELINE_STREAM_STOPPED)
1019 return;
1020
1021 /* Complete the output buffer and, if reading from memory, the input
1022 * buffer.
1023 */
1024 buffer = omap3isp_video_buffer_next(&res->video_out);
1025 if (buffer != NULL) {
1026 resizer_set_outaddr(res, buffer->dma);
1027 restart = 1;
1028 }
1029
1030 pipe->state |= ISP_PIPELINE_IDLE_OUTPUT;
1031
1032 if (res->input == RESIZER_INPUT_MEMORY) {
1033 buffer = omap3isp_video_buffer_next(&res->video_in);
1034 if (buffer != NULL)
1035 resizer_set_inaddr(res, buffer->dma);
1036 pipe->state |= ISP_PIPELINE_IDLE_INPUT;
1037 }
1038
1039 if (res->state == ISP_PIPELINE_STREAM_SINGLESHOT) {
1040 if (isp_pipeline_ready(pipe))
1041 omap3isp_pipeline_set_stream(pipe,
1042 ISP_PIPELINE_STREAM_SINGLESHOT);
1043 } else {
1044 /* If an underrun occurs, the video queue operation handler will
1045 * restart the resizer. Otherwise restart it immediately.
1046 */
1047 if (restart)
1048 resizer_enable_oneshot(res);
1049 }
1050 }
1051
1052 /*
1053 * omap3isp_resizer_isr - ISP resizer interrupt handler
1054 *
1055 * Manage the resizer video buffers and configure shadowed and busy-locked
1056 * registers.
1057 */
omap3isp_resizer_isr(struct isp_res_device * res)1058 void omap3isp_resizer_isr(struct isp_res_device *res)
1059 {
1060 struct v4l2_mbus_framefmt *informat, *outformat;
1061 unsigned long flags;
1062
1063 if (omap3isp_module_sync_is_stopping(&res->wait, &res->stopping))
1064 return;
1065
1066 spin_lock_irqsave(&res->lock, flags);
1067
1068 if (res->applycrop) {
1069 outformat = __resizer_get_format(res, NULL, RESZ_PAD_SOURCE,
1070 V4L2_SUBDEV_FORMAT_ACTIVE);
1071 informat = __resizer_get_format(res, NULL, RESZ_PAD_SINK,
1072 V4L2_SUBDEV_FORMAT_ACTIVE);
1073 resizer_set_crop_params(res, informat, outformat);
1074 res->applycrop = 0;
1075 }
1076
1077 spin_unlock_irqrestore(&res->lock, flags);
1078
1079 resizer_isr_buffer(res);
1080 }
1081
1082 /* -----------------------------------------------------------------------------
1083 * ISP video operations
1084 */
1085
resizer_video_queue(struct isp_video * video,struct isp_buffer * buffer)1086 static int resizer_video_queue(struct isp_video *video,
1087 struct isp_buffer *buffer)
1088 {
1089 struct isp_res_device *res = &video->isp->isp_res;
1090
1091 if (video->type == V4L2_BUF_TYPE_VIDEO_OUTPUT)
1092 resizer_set_inaddr(res, buffer->dma);
1093
1094 /*
1095 * We now have a buffer queued on the output. Despite what the
1096 * TRM says, the resizer can't be restarted immediately.
1097 * Enabling it in one shot mode in the middle of a frame (or at
1098 * least asynchronously to the frame) results in the output
1099 * being shifted randomly left/right and up/down, as if the
1100 * hardware didn't synchronize itself to the beginning of the
1101 * frame correctly.
1102 *
1103 * Restart the resizer on the next sync interrupt if running in
1104 * continuous mode or when starting the stream.
1105 */
1106 if (video->type == V4L2_BUF_TYPE_VIDEO_CAPTURE)
1107 resizer_set_outaddr(res, buffer->dma);
1108
1109 return 0;
1110 }
1111
1112 static const struct isp_video_operations resizer_video_ops = {
1113 .queue = resizer_video_queue,
1114 };
1115
1116 /* -----------------------------------------------------------------------------
1117 * V4L2 subdev operations
1118 */
1119
1120 /*
1121 * resizer_set_stream - Enable/Disable streaming on resizer subdev
1122 * @sd: ISP resizer V4L2 subdev
1123 * @enable: 1 == Enable, 0 == Disable
1124 *
1125 * The resizer hardware can't be enabled without a memory buffer to write to.
1126 * As the s_stream operation is called in response to a STREAMON call without
1127 * any buffer queued yet, just update the state field and return immediately.
1128 * The resizer will be enabled in resizer_video_queue().
1129 */
resizer_set_stream(struct v4l2_subdev * sd,int enable)1130 static int resizer_set_stream(struct v4l2_subdev *sd, int enable)
1131 {
1132 struct isp_res_device *res = v4l2_get_subdevdata(sd);
1133 struct isp_video *video_out = &res->video_out;
1134 struct isp_device *isp = to_isp_device(res);
1135 struct device *dev = to_device(res);
1136
1137 if (res->state == ISP_PIPELINE_STREAM_STOPPED) {
1138 if (enable == ISP_PIPELINE_STREAM_STOPPED)
1139 return 0;
1140
1141 omap3isp_subclk_enable(isp, OMAP3_ISP_SUBCLK_RESIZER);
1142 resizer_configure(res);
1143 resizer_print_status(res);
1144 }
1145
1146 switch (enable) {
1147 case ISP_PIPELINE_STREAM_CONTINUOUS:
1148 omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_RESIZER_WRITE);
1149 if (video_out->dmaqueue_flags & ISP_VIDEO_DMAQUEUE_QUEUED) {
1150 resizer_enable_oneshot(res);
1151 isp_video_dmaqueue_flags_clr(video_out);
1152 }
1153 break;
1154
1155 case ISP_PIPELINE_STREAM_SINGLESHOT:
1156 if (res->input == RESIZER_INPUT_MEMORY)
1157 omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_RESIZER_READ);
1158 omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_RESIZER_WRITE);
1159
1160 resizer_enable_oneshot(res);
1161 break;
1162
1163 case ISP_PIPELINE_STREAM_STOPPED:
1164 if (omap3isp_module_sync_idle(&sd->entity, &res->wait,
1165 &res->stopping))
1166 dev_dbg(dev, "%s: module stop timeout.\n", sd->name);
1167 omap3isp_sbl_disable(isp, OMAP3_ISP_SBL_RESIZER_READ |
1168 OMAP3_ISP_SBL_RESIZER_WRITE);
1169 omap3isp_subclk_disable(isp, OMAP3_ISP_SUBCLK_RESIZER);
1170 isp_video_dmaqueue_flags_clr(video_out);
1171 break;
1172 }
1173
1174 res->state = enable;
1175 return 0;
1176 }
1177
1178 /*
1179 * resizer_try_crop - mangles crop parameters.
1180 */
resizer_try_crop(const struct v4l2_mbus_framefmt * sink,const struct v4l2_mbus_framefmt * source,struct v4l2_rect * crop)1181 static void resizer_try_crop(const struct v4l2_mbus_framefmt *sink,
1182 const struct v4l2_mbus_framefmt *source,
1183 struct v4l2_rect *crop)
1184 {
1185 const unsigned int spv = DEFAULT_PHASE;
1186 const unsigned int sph = DEFAULT_PHASE;
1187
1188 /* Crop rectangle is constrained by the output size so that zoom ratio
1189 * cannot exceed +/-4.0.
1190 */
1191 unsigned int min_width =
1192 ((32 * sph + (source->width - 1) * 64 + 16) >> 8) + 7;
1193 unsigned int min_height =
1194 ((32 * spv + (source->height - 1) * 64 + 16) >> 8) + 4;
1195 unsigned int max_width =
1196 ((64 * sph + (source->width - 1) * 1024 + 32) >> 8) + 7;
1197 unsigned int max_height =
1198 ((64 * spv + (source->height - 1) * 1024 + 32) >> 8) + 7;
1199
1200 crop->width = clamp_t(u32, crop->width, min_width, max_width);
1201 crop->height = clamp_t(u32, crop->height, min_height, max_height);
1202
1203 /* Crop can not go beyond of the input rectangle */
1204 crop->left = clamp_t(u32, crop->left, 0, sink->width - MIN_IN_WIDTH);
1205 crop->width = clamp_t(u32, crop->width, MIN_IN_WIDTH,
1206 sink->width - crop->left);
1207 crop->top = clamp_t(u32, crop->top, 0, sink->height - MIN_IN_HEIGHT);
1208 crop->height = clamp_t(u32, crop->height, MIN_IN_HEIGHT,
1209 sink->height - crop->top);
1210 }
1211
1212 /*
1213 * resizer_get_selection - Retrieve a selection rectangle on a pad
1214 * @sd: ISP resizer V4L2 subdevice
1215 * @cfg: V4L2 subdev pad configuration
1216 * @sel: Selection rectangle
1217 *
1218 * The only supported rectangles are the crop rectangles on the sink pad.
1219 *
1220 * Return 0 on success or a negative error code otherwise.
1221 */
resizer_get_selection(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_selection * sel)1222 static int resizer_get_selection(struct v4l2_subdev *sd,
1223 struct v4l2_subdev_pad_config *cfg,
1224 struct v4l2_subdev_selection *sel)
1225 {
1226 struct isp_res_device *res = v4l2_get_subdevdata(sd);
1227 struct v4l2_mbus_framefmt *format_source;
1228 struct v4l2_mbus_framefmt *format_sink;
1229 struct resizer_ratio ratio;
1230
1231 if (sel->pad != RESZ_PAD_SINK)
1232 return -EINVAL;
1233
1234 format_sink = __resizer_get_format(res, cfg, RESZ_PAD_SINK,
1235 sel->which);
1236 format_source = __resizer_get_format(res, cfg, RESZ_PAD_SOURCE,
1237 sel->which);
1238
1239 switch (sel->target) {
1240 case V4L2_SEL_TGT_CROP_BOUNDS:
1241 sel->r.left = 0;
1242 sel->r.top = 0;
1243 sel->r.width = INT_MAX;
1244 sel->r.height = INT_MAX;
1245
1246 resizer_try_crop(format_sink, format_source, &sel->r);
1247 resizer_calc_ratios(res, &sel->r, format_source, &ratio);
1248 break;
1249
1250 case V4L2_SEL_TGT_CROP:
1251 sel->r = *__resizer_get_crop(res, cfg, sel->which);
1252 resizer_calc_ratios(res, &sel->r, format_source, &ratio);
1253 break;
1254
1255 default:
1256 return -EINVAL;
1257 }
1258
1259 return 0;
1260 }
1261
1262 /*
1263 * resizer_set_selection - Set a selection rectangle on a pad
1264 * @sd: ISP resizer V4L2 subdevice
1265 * @cfg: V4L2 subdev pad configuration
1266 * @sel: Selection rectangle
1267 *
1268 * The only supported rectangle is the actual crop rectangle on the sink pad.
1269 *
1270 * FIXME: This function currently behaves as if the KEEP_CONFIG selection flag
1271 * was always set.
1272 *
1273 * Return 0 on success or a negative error code otherwise.
1274 */
resizer_set_selection(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_selection * sel)1275 static int resizer_set_selection(struct v4l2_subdev *sd,
1276 struct v4l2_subdev_pad_config *cfg,
1277 struct v4l2_subdev_selection *sel)
1278 {
1279 struct isp_res_device *res = v4l2_get_subdevdata(sd);
1280 struct isp_device *isp = to_isp_device(res);
1281 const struct v4l2_mbus_framefmt *format_sink;
1282 struct v4l2_mbus_framefmt format_source;
1283 struct resizer_ratio ratio;
1284 unsigned long flags;
1285
1286 if (sel->target != V4L2_SEL_TGT_CROP ||
1287 sel->pad != RESZ_PAD_SINK)
1288 return -EINVAL;
1289
1290 format_sink = __resizer_get_format(res, cfg, RESZ_PAD_SINK,
1291 sel->which);
1292 format_source = *__resizer_get_format(res, cfg, RESZ_PAD_SOURCE,
1293 sel->which);
1294
1295 dev_dbg(isp->dev, "%s(%s): req %ux%u -> (%d,%d)/%ux%u -> %ux%u\n",
1296 __func__, sel->which == V4L2_SUBDEV_FORMAT_TRY ? "try" : "act",
1297 format_sink->width, format_sink->height,
1298 sel->r.left, sel->r.top, sel->r.width, sel->r.height,
1299 format_source.width, format_source.height);
1300
1301 /* Clamp the crop rectangle to the bounds, and then mangle it further to
1302 * fulfill the TRM equations. Store the clamped but otherwise unmangled
1303 * rectangle to avoid cropping the input multiple times: when an
1304 * application sets the output format, the current crop rectangle is
1305 * mangled during crop rectangle computation, which would lead to a new,
1306 * smaller input crop rectangle every time the output size is set if we
1307 * stored the mangled rectangle.
1308 */
1309 resizer_try_crop(format_sink, &format_source, &sel->r);
1310 *__resizer_get_crop(res, cfg, sel->which) = sel->r;
1311 resizer_calc_ratios(res, &sel->r, &format_source, &ratio);
1312
1313 dev_dbg(isp->dev, "%s(%s): got %ux%u -> (%d,%d)/%ux%u -> %ux%u\n",
1314 __func__, sel->which == V4L2_SUBDEV_FORMAT_TRY ? "try" : "act",
1315 format_sink->width, format_sink->height,
1316 sel->r.left, sel->r.top, sel->r.width, sel->r.height,
1317 format_source.width, format_source.height);
1318
1319 if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
1320 *__resizer_get_format(res, cfg, RESZ_PAD_SOURCE, sel->which) =
1321 format_source;
1322 return 0;
1323 }
1324
1325 /* Update the source format, resizing ratios and crop rectangle. If
1326 * streaming is on the IRQ handler will reprogram the resizer after the
1327 * current frame. We thus we need to protect against race conditions.
1328 */
1329 spin_lock_irqsave(&res->lock, flags);
1330
1331 *__resizer_get_format(res, cfg, RESZ_PAD_SOURCE, sel->which) =
1332 format_source;
1333
1334 res->ratio = ratio;
1335 res->crop.active = sel->r;
1336
1337 if (res->state != ISP_PIPELINE_STREAM_STOPPED)
1338 res->applycrop = 1;
1339
1340 spin_unlock_irqrestore(&res->lock, flags);
1341
1342 return 0;
1343 }
1344
1345 /* resizer pixel formats */
1346 static const unsigned int resizer_formats[] = {
1347 MEDIA_BUS_FMT_UYVY8_1X16,
1348 MEDIA_BUS_FMT_YUYV8_1X16,
1349 };
1350
resizer_max_in_width(struct isp_res_device * res)1351 static unsigned int resizer_max_in_width(struct isp_res_device *res)
1352 {
1353 struct isp_device *isp = to_isp_device(res);
1354
1355 if (res->input == RESIZER_INPUT_MEMORY) {
1356 return MAX_IN_WIDTH_MEMORY_MODE;
1357 } else {
1358 if (isp->revision == ISP_REVISION_1_0)
1359 return MAX_IN_WIDTH_ONTHEFLY_MODE_ES1;
1360 else
1361 return MAX_IN_WIDTH_ONTHEFLY_MODE_ES2;
1362 }
1363 }
1364
1365 /*
1366 * resizer_try_format - Handle try format by pad subdev method
1367 * @res : ISP resizer device
1368 * @cfg: V4L2 subdev pad configuration
1369 * @pad : pad num
1370 * @fmt : pointer to v4l2 format structure
1371 * @which : wanted subdev format
1372 */
resizer_try_format(struct isp_res_device * res,struct v4l2_subdev_pad_config * cfg,unsigned int pad,struct v4l2_mbus_framefmt * fmt,enum v4l2_subdev_format_whence which)1373 static void resizer_try_format(struct isp_res_device *res,
1374 struct v4l2_subdev_pad_config *cfg, unsigned int pad,
1375 struct v4l2_mbus_framefmt *fmt,
1376 enum v4l2_subdev_format_whence which)
1377 {
1378 struct v4l2_mbus_framefmt *format;
1379 struct resizer_ratio ratio;
1380 struct v4l2_rect crop;
1381
1382 switch (pad) {
1383 case RESZ_PAD_SINK:
1384 if (fmt->code != MEDIA_BUS_FMT_YUYV8_1X16 &&
1385 fmt->code != MEDIA_BUS_FMT_UYVY8_1X16)
1386 fmt->code = MEDIA_BUS_FMT_YUYV8_1X16;
1387
1388 fmt->width = clamp_t(u32, fmt->width, MIN_IN_WIDTH,
1389 resizer_max_in_width(res));
1390 fmt->height = clamp_t(u32, fmt->height, MIN_IN_HEIGHT,
1391 MAX_IN_HEIGHT);
1392 break;
1393
1394 case RESZ_PAD_SOURCE:
1395 format = __resizer_get_format(res, cfg, RESZ_PAD_SINK, which);
1396 fmt->code = format->code;
1397
1398 crop = *__resizer_get_crop(res, cfg, which);
1399 resizer_calc_ratios(res, &crop, fmt, &ratio);
1400 break;
1401 }
1402
1403 fmt->colorspace = V4L2_COLORSPACE_JPEG;
1404 fmt->field = V4L2_FIELD_NONE;
1405 }
1406
1407 /*
1408 * resizer_enum_mbus_code - Handle pixel format enumeration
1409 * @sd : pointer to v4l2 subdev structure
1410 * @cfg: V4L2 subdev pad configuration
1411 * @code : pointer to v4l2_subdev_mbus_code_enum structure
1412 * return -EINVAL or zero on success
1413 */
resizer_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_mbus_code_enum * code)1414 static int resizer_enum_mbus_code(struct v4l2_subdev *sd,
1415 struct v4l2_subdev_pad_config *cfg,
1416 struct v4l2_subdev_mbus_code_enum *code)
1417 {
1418 struct isp_res_device *res = v4l2_get_subdevdata(sd);
1419 struct v4l2_mbus_framefmt *format;
1420
1421 if (code->pad == RESZ_PAD_SINK) {
1422 if (code->index >= ARRAY_SIZE(resizer_formats))
1423 return -EINVAL;
1424
1425 code->code = resizer_formats[code->index];
1426 } else {
1427 if (code->index != 0)
1428 return -EINVAL;
1429
1430 format = __resizer_get_format(res, cfg, RESZ_PAD_SINK,
1431 code->which);
1432 code->code = format->code;
1433 }
1434
1435 return 0;
1436 }
1437
resizer_enum_frame_size(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_size_enum * fse)1438 static int resizer_enum_frame_size(struct v4l2_subdev *sd,
1439 struct v4l2_subdev_pad_config *cfg,
1440 struct v4l2_subdev_frame_size_enum *fse)
1441 {
1442 struct isp_res_device *res = v4l2_get_subdevdata(sd);
1443 struct v4l2_mbus_framefmt format;
1444
1445 if (fse->index != 0)
1446 return -EINVAL;
1447
1448 format.code = fse->code;
1449 format.width = 1;
1450 format.height = 1;
1451 resizer_try_format(res, cfg, fse->pad, &format, fse->which);
1452 fse->min_width = format.width;
1453 fse->min_height = format.height;
1454
1455 if (format.code != fse->code)
1456 return -EINVAL;
1457
1458 format.code = fse->code;
1459 format.width = -1;
1460 format.height = -1;
1461 resizer_try_format(res, cfg, fse->pad, &format, fse->which);
1462 fse->max_width = format.width;
1463 fse->max_height = format.height;
1464
1465 return 0;
1466 }
1467
1468 /*
1469 * resizer_get_format - Handle get format by pads subdev method
1470 * @sd : pointer to v4l2 subdev structure
1471 * @cfg: V4L2 subdev pad configuration
1472 * @fmt : pointer to v4l2 subdev format structure
1473 * return -EINVAL or zero on success
1474 */
resizer_get_format(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)1475 static int resizer_get_format(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg,
1476 struct v4l2_subdev_format *fmt)
1477 {
1478 struct isp_res_device *res = v4l2_get_subdevdata(sd);
1479 struct v4l2_mbus_framefmt *format;
1480
1481 format = __resizer_get_format(res, cfg, fmt->pad, fmt->which);
1482 if (format == NULL)
1483 return -EINVAL;
1484
1485 fmt->format = *format;
1486 return 0;
1487 }
1488
1489 /*
1490 * resizer_set_format - Handle set format by pads subdev method
1491 * @sd : pointer to v4l2 subdev structure
1492 * @cfg: V4L2 subdev pad configuration
1493 * @fmt : pointer to v4l2 subdev format structure
1494 * return -EINVAL or zero on success
1495 */
resizer_set_format(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)1496 static int resizer_set_format(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg,
1497 struct v4l2_subdev_format *fmt)
1498 {
1499 struct isp_res_device *res = v4l2_get_subdevdata(sd);
1500 struct v4l2_mbus_framefmt *format;
1501 struct v4l2_rect *crop;
1502
1503 format = __resizer_get_format(res, cfg, fmt->pad, fmt->which);
1504 if (format == NULL)
1505 return -EINVAL;
1506
1507 resizer_try_format(res, cfg, fmt->pad, &fmt->format, fmt->which);
1508 *format = fmt->format;
1509
1510 if (fmt->pad == RESZ_PAD_SINK) {
1511 /* reset crop rectangle */
1512 crop = __resizer_get_crop(res, cfg, fmt->which);
1513 crop->left = 0;
1514 crop->top = 0;
1515 crop->width = fmt->format.width;
1516 crop->height = fmt->format.height;
1517
1518 /* Propagate the format from sink to source */
1519 format = __resizer_get_format(res, cfg, RESZ_PAD_SOURCE,
1520 fmt->which);
1521 *format = fmt->format;
1522 resizer_try_format(res, cfg, RESZ_PAD_SOURCE, format,
1523 fmt->which);
1524 }
1525
1526 if (fmt->which == V4L2_SUBDEV_FORMAT_ACTIVE) {
1527 /* Compute and store the active crop rectangle and resizer
1528 * ratios. format already points to the source pad active
1529 * format.
1530 */
1531 res->crop.active = res->crop.request;
1532 resizer_calc_ratios(res, &res->crop.active, format,
1533 &res->ratio);
1534 }
1535
1536 return 0;
1537 }
1538
resizer_link_validate(struct v4l2_subdev * sd,struct media_link * link,struct v4l2_subdev_format * source_fmt,struct v4l2_subdev_format * sink_fmt)1539 static int resizer_link_validate(struct v4l2_subdev *sd,
1540 struct media_link *link,
1541 struct v4l2_subdev_format *source_fmt,
1542 struct v4l2_subdev_format *sink_fmt)
1543 {
1544 struct isp_res_device *res = v4l2_get_subdevdata(sd);
1545 struct isp_pipeline *pipe = to_isp_pipeline(&sd->entity);
1546
1547 omap3isp_resizer_max_rate(res, &pipe->max_rate);
1548
1549 return v4l2_subdev_link_validate_default(sd, link,
1550 source_fmt, sink_fmt);
1551 }
1552
1553 /*
1554 * resizer_init_formats - Initialize formats on all pads
1555 * @sd: ISP resizer V4L2 subdevice
1556 * @fh: V4L2 subdev file handle
1557 *
1558 * Initialize all pad formats with default values. If fh is not NULL, try
1559 * formats are initialized on the file handle. Otherwise active formats are
1560 * initialized on the device.
1561 */
resizer_init_formats(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh)1562 static int resizer_init_formats(struct v4l2_subdev *sd,
1563 struct v4l2_subdev_fh *fh)
1564 {
1565 struct v4l2_subdev_format format;
1566
1567 memset(&format, 0, sizeof(format));
1568 format.pad = RESZ_PAD_SINK;
1569 format.which = fh ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE;
1570 format.format.code = MEDIA_BUS_FMT_YUYV8_1X16;
1571 format.format.width = 4096;
1572 format.format.height = 4096;
1573 resizer_set_format(sd, fh ? fh->pad : NULL, &format);
1574
1575 return 0;
1576 }
1577
1578 /* subdev video operations */
1579 static const struct v4l2_subdev_video_ops resizer_v4l2_video_ops = {
1580 .s_stream = resizer_set_stream,
1581 };
1582
1583 /* subdev pad operations */
1584 static const struct v4l2_subdev_pad_ops resizer_v4l2_pad_ops = {
1585 .enum_mbus_code = resizer_enum_mbus_code,
1586 .enum_frame_size = resizer_enum_frame_size,
1587 .get_fmt = resizer_get_format,
1588 .set_fmt = resizer_set_format,
1589 .get_selection = resizer_get_selection,
1590 .set_selection = resizer_set_selection,
1591 .link_validate = resizer_link_validate,
1592 };
1593
1594 /* subdev operations */
1595 static const struct v4l2_subdev_ops resizer_v4l2_ops = {
1596 .video = &resizer_v4l2_video_ops,
1597 .pad = &resizer_v4l2_pad_ops,
1598 };
1599
1600 /* subdev internal operations */
1601 static const struct v4l2_subdev_internal_ops resizer_v4l2_internal_ops = {
1602 .open = resizer_init_formats,
1603 };
1604
1605 /* -----------------------------------------------------------------------------
1606 * Media entity operations
1607 */
1608
1609 /*
1610 * resizer_link_setup - Setup resizer connections.
1611 * @entity : Pointer to media entity structure
1612 * @local : Pointer to local pad array
1613 * @remote : Pointer to remote pad array
1614 * @flags : Link flags
1615 * return -EINVAL or zero on success
1616 */
resizer_link_setup(struct media_entity * entity,const struct media_pad * local,const struct media_pad * remote,u32 flags)1617 static int resizer_link_setup(struct media_entity *entity,
1618 const struct media_pad *local,
1619 const struct media_pad *remote, u32 flags)
1620 {
1621 struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
1622 struct isp_res_device *res = v4l2_get_subdevdata(sd);
1623 unsigned int index = local->index;
1624
1625 /* FIXME: this is actually a hack! */
1626 if (is_media_entity_v4l2_subdev(remote->entity))
1627 index |= 2 << 16;
1628
1629 switch (index) {
1630 case RESZ_PAD_SINK:
1631 /* read from memory */
1632 if (flags & MEDIA_LNK_FL_ENABLED) {
1633 if (res->input == RESIZER_INPUT_VP)
1634 return -EBUSY;
1635 res->input = RESIZER_INPUT_MEMORY;
1636 } else {
1637 if (res->input == RESIZER_INPUT_MEMORY)
1638 res->input = RESIZER_INPUT_NONE;
1639 }
1640 break;
1641
1642 case RESZ_PAD_SINK | 2 << 16:
1643 /* read from ccdc or previewer */
1644 if (flags & MEDIA_LNK_FL_ENABLED) {
1645 if (res->input == RESIZER_INPUT_MEMORY)
1646 return -EBUSY;
1647 res->input = RESIZER_INPUT_VP;
1648 } else {
1649 if (res->input == RESIZER_INPUT_VP)
1650 res->input = RESIZER_INPUT_NONE;
1651 }
1652 break;
1653
1654 case RESZ_PAD_SOURCE:
1655 /* resizer always write to memory */
1656 break;
1657
1658 default:
1659 return -EINVAL;
1660 }
1661
1662 return 0;
1663 }
1664
1665 /* media operations */
1666 static const struct media_entity_operations resizer_media_ops = {
1667 .link_setup = resizer_link_setup,
1668 .link_validate = v4l2_subdev_link_validate,
1669 };
1670
omap3isp_resizer_unregister_entities(struct isp_res_device * res)1671 void omap3isp_resizer_unregister_entities(struct isp_res_device *res)
1672 {
1673 v4l2_device_unregister_subdev(&res->subdev);
1674 omap3isp_video_unregister(&res->video_in);
1675 omap3isp_video_unregister(&res->video_out);
1676 }
1677
omap3isp_resizer_register_entities(struct isp_res_device * res,struct v4l2_device * vdev)1678 int omap3isp_resizer_register_entities(struct isp_res_device *res,
1679 struct v4l2_device *vdev)
1680 {
1681 int ret;
1682
1683 /* Register the subdev and video nodes. */
1684 res->subdev.dev = vdev->mdev->dev;
1685 ret = v4l2_device_register_subdev(vdev, &res->subdev);
1686 if (ret < 0)
1687 goto error;
1688
1689 ret = omap3isp_video_register(&res->video_in, vdev);
1690 if (ret < 0)
1691 goto error;
1692
1693 ret = omap3isp_video_register(&res->video_out, vdev);
1694 if (ret < 0)
1695 goto error;
1696
1697 return 0;
1698
1699 error:
1700 omap3isp_resizer_unregister_entities(res);
1701 return ret;
1702 }
1703
1704 /* -----------------------------------------------------------------------------
1705 * ISP resizer initialization and cleanup
1706 */
1707
1708 /*
1709 * resizer_init_entities - Initialize resizer subdev and media entity.
1710 * @res : Pointer to resizer device structure
1711 * return -ENOMEM or zero on success
1712 */
resizer_init_entities(struct isp_res_device * res)1713 static int resizer_init_entities(struct isp_res_device *res)
1714 {
1715 struct v4l2_subdev *sd = &res->subdev;
1716 struct media_pad *pads = res->pads;
1717 struct media_entity *me = &sd->entity;
1718 int ret;
1719
1720 res->input = RESIZER_INPUT_NONE;
1721
1722 v4l2_subdev_init(sd, &resizer_v4l2_ops);
1723 sd->internal_ops = &resizer_v4l2_internal_ops;
1724 strscpy(sd->name, "OMAP3 ISP resizer", sizeof(sd->name));
1725 sd->grp_id = 1 << 16; /* group ID for isp subdevs */
1726 v4l2_set_subdevdata(sd, res);
1727 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1728
1729 pads[RESZ_PAD_SINK].flags = MEDIA_PAD_FL_SINK
1730 | MEDIA_PAD_FL_MUST_CONNECT;
1731 pads[RESZ_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE;
1732
1733 me->ops = &resizer_media_ops;
1734 ret = media_entity_pads_init(me, RESZ_PADS_NUM, pads);
1735 if (ret < 0)
1736 return ret;
1737
1738 resizer_init_formats(sd, NULL);
1739
1740 res->video_in.type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
1741 res->video_in.ops = &resizer_video_ops;
1742 res->video_in.isp = to_isp_device(res);
1743 res->video_in.capture_mem = PAGE_ALIGN(4096 * 4096) * 2 * 3;
1744 res->video_in.bpl_alignment = 32;
1745 res->video_out.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1746 res->video_out.ops = &resizer_video_ops;
1747 res->video_out.isp = to_isp_device(res);
1748 res->video_out.capture_mem = PAGE_ALIGN(4096 * 4096) * 2 * 3;
1749 res->video_out.bpl_alignment = 32;
1750
1751 ret = omap3isp_video_init(&res->video_in, "resizer");
1752 if (ret < 0)
1753 goto error_video_in;
1754
1755 ret = omap3isp_video_init(&res->video_out, "resizer");
1756 if (ret < 0)
1757 goto error_video_out;
1758
1759 res->video_out.video.entity.flags |= MEDIA_ENT_FL_DEFAULT;
1760
1761 return 0;
1762
1763 error_video_out:
1764 omap3isp_video_cleanup(&res->video_in);
1765 error_video_in:
1766 media_entity_cleanup(&res->subdev.entity);
1767 return ret;
1768 }
1769
1770 /*
1771 * isp_resizer_init - Resizer initialization.
1772 * @isp : Pointer to ISP device
1773 * return -ENOMEM or zero on success
1774 */
omap3isp_resizer_init(struct isp_device * isp)1775 int omap3isp_resizer_init(struct isp_device *isp)
1776 {
1777 struct isp_res_device *res = &isp->isp_res;
1778
1779 init_waitqueue_head(&res->wait);
1780 atomic_set(&res->stopping, 0);
1781 spin_lock_init(&res->lock);
1782
1783 return resizer_init_entities(res);
1784 }
1785
omap3isp_resizer_cleanup(struct isp_device * isp)1786 void omap3isp_resizer_cleanup(struct isp_device *isp)
1787 {
1788 struct isp_res_device *res = &isp->isp_res;
1789
1790 omap3isp_video_cleanup(&res->video_in);
1791 omap3isp_video_cleanup(&res->video_out);
1792 media_entity_cleanup(&res->subdev.entity);
1793 }
1794