| /drivers/clk/imx/ |
| D | clk.h | 120 #define imx_clk_mux(name, reg, shift, width, parents, num_parents) \ argument
265 u8 shift, u8 width, const char * const *parents, in imx_clk_hw_mux_ldb()
440 u8 shift, u8 width, const char * const *parents, in imx_clk_hw_mux()
450 u8 width, const char * const *parents, int num_parents) in imx_dev_clk_hw_mux()
458 u8 shift, u8 width, const char * const *parents, in imx_clk_mux2()
468 const char * const *parents, in imx_clk_hw_mux2()
479 const char * const *parents, int num_parents, in imx_clk_mux_flags()
489 const char * const *parents, in imx_clk_hw_mux2_flags()
499 const char * const *parents, in imx_clk_mux2_flags()
510 const char * const *parents, in imx_clk_hw_mux_flags()
[all …]
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| D | clk-scu.h | 23 static inline struct clk_hw *imx_clk_scu2(const char *name, const char * const *parents, in imx_clk_scu2()
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| D | clk-fixup-mux.c | 68 u8 shift, u8 width, const char * const *parents, in imx_clk_hw_fixup_mux()
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| /drivers/clk/st/ |
| D | clkgen-mux.c | 21 const char **parents; in clkgen_mux_get_parents() local
57 const char **parents; in st_of_clkgen_mux_setup() local
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| D | clk-flexgen.c | 273 const char **parents; in flexgen_get_parents() local
315 const char **parents; in st_of_flexgen_setup() local
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| /drivers/clk/zynqmp/ |
| D | clkc.c | 98 u32 parents[CLK_GET_PARENTS_RESP_WORDS]; member
286 const char * const *parents, in zynqmp_clk_register_fixed_factor()
448 static int __zynqmp_clock_get_parents(struct clock_parent *parents, in __zynqmp_clock_get_parents()
484 static int zynqmp_clock_get_parents(u32 clk_id, struct clock_parent *parents, in zynqmp_clock_get_parents()
523 struct clock_parent *parents; in zynqmp_get_parent_list() local
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| D | clk-mux-zynqmp.c | 105 const char * const *parents, in zynqmp_clk_register_mux()
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| D | clk-gate-zynqmp.c | 108 const char * const *parents, in zynqmp_clk_register_gate()
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| /drivers/clk/nxp/ |
| D | clk-lpc18xx-cgu.c | 539 const char *parents[CLK_SRC_MAX]; in lpc18xx_cgu_register_div() local
559 const char *parents[CLK_SRC_MAX]; in lpc18xx_register_base_clk() local
586 const char *parents[CLK_SRC_MAX]; in lpc18xx_cgu_register_pll() local
603 const char *parents[CLK_SRC_MAX]; in lpc18xx_cgu_register_source_clks() local
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| /drivers/clk/sunxi/ |
| D | clk-sun4i-display.c | 19 u8 parents; member
104 const char *parents[4]; in sun4i_a10_display_init() local
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| D | clk-a20-gmac.c | 58 const char *parents[SUN7I_A20_GMAC_PARENTS]; in sun7i_a20_gmac_clk_setup() local
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| D | clk-a10-mod1.c | 26 const char *parents[4]; in sun4i_mod1_clk_setup() local
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| D | clk-sun8i-mbus.c | 27 const char **parents; in sun8i_a23_mbus_setup() local
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| D | clk-sun8i-bus-gates.c | 24 const char *parents[PARENT_MAX]; in sun8i_h3_bus_gates_init() local
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| /drivers/clk/pxa/ |
| D | clk-pxa25x.c | 136 #define PXA25X_CKEN(dev_id, con_id, parents, mult, div, \ argument
150 #define PXA25X_CKEN_1RATE(dev_id, con_id, bit, parents, delay) \ argument
153 #define PXA25X_CKEN_1RATE_AO(dev_id, con_id, bit, parents, delay) \ argument
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| D | clk-pxa.h | 119 #define PXA_CKEN(_dev_id, _con_id, _name, parents, _mult_lp, _div_lp, \ argument
129 #define PXA_CKEN_1RATE(dev_id, con_id, name, parents, cken_reg, \ argument
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| D | clk-pxa27x.c | 132 #define PXA27X_CKEN(dev_id, con_id, parents, mult_hp, div_hp, \ argument
146 #define PXA27X_CKEN_1RATE(dev_id, con_id, bit, parents, delay) \ argument
149 #define PXA27X_CKEN_1RATE_AO(dev_id, con_id, bit, parents, delay) \ argument
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| D | clk-pxa3xx.c | 127 #define PXA3XX_CKEN(dev_id, con_id, parents, mult_lp, div_lp, mult_hp, \ argument
136 #define PXA3XX_CKEN_1RATE(dev_id, con_id, bit, parents) \ argument
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| /drivers/clk/tegra/ |
| D | clk-bpmp.c | 23 unsigned int parents[MRQ_CLK_MAX_PARENTS]; member
35 unsigned int *parents; member
472 const char **parents; in tegra_bpmp_clk_register() local
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| /drivers/clk/zynq/ |
| D | clkc.c | 104 const char **parents, int enable) in zynq_clk_register_fclk()
177 const char **parents, unsigned int two_gates) in zynq_clk_register_periph_clk()
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| /drivers/mmc/host/ |
| D | meson-mx-sdhc-clkc.c | 51 const struct clk_parent_data *parents, in meson_mx_sdhc_clk_hw_register()
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| /drivers/clk/samsung/ |
| D | clk-exynos-clkout.c | 57 struct clk *parents[EXYNOS_CLKOUT_PARENTS]; in exynos_clkout_init() local
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| /drivers/gpu/drm/sun4i/ |
| D | sun8i_hdmi_phy_clk.c | 148 const char *parents[2]; in sun8i_phy_clk_create() local
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| D | sun4i_hdmi_tmds_clk.c | 207 const char *parents[2]; in sun4i_tmds_create() local
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| /drivers/clk/ti/ |
| D | clock.h | 118 const char * const *parents; member
178 const char * const *parents; member
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