1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Cadence USBSS DRD Header File. 4 * 5 * Copyright (C) 2017-2018 NXP 6 * Copyright (C) 2018-2019 Cadence. 7 * 8 * Authors: Peter Chen <peter.chen@nxp.com> 9 * Pawel Laszczak <pawell@cadence.com> 10 */ 11 #include <linux/usb/otg.h> 12 #include <linux/usb/role.h> 13 14 #ifndef __LINUX_CDNS3_CORE_H 15 #define __LINUX_CDNS3_CORE_H 16 17 struct cdns3; 18 19 /** 20 * struct cdns3_role_driver - host/gadget role driver 21 * @start: start this role 22 * @stop: stop this role 23 * @suspend: suspend callback for this role 24 * @resume: resume callback for this role 25 * @irq: irq handler for this role 26 * @name: role name string (host/gadget) 27 * @state: current state 28 */ 29 struct cdns3_role_driver { 30 int (*start)(struct cdns3 *cdns); 31 void (*stop)(struct cdns3 *cdns); 32 int (*suspend)(struct cdns3 *cdns, bool do_wakeup); 33 int (*resume)(struct cdns3 *cdns, bool hibernated); 34 const char *name; 35 #define CDNS3_ROLE_STATE_INACTIVE 0 36 #define CDNS3_ROLE_STATE_ACTIVE 1 37 int state; 38 }; 39 40 #define CDNS3_XHCI_RESOURCES_NUM 2 41 42 struct cdns3_platform_data { 43 int (*platform_suspend)(struct device *dev, 44 bool suspend, bool wakeup); 45 unsigned long quirks; 46 #define CDNS3_DEFAULT_PM_RUNTIME_ALLOW BIT(0) 47 }; 48 49 /** 50 * struct cdns3 - Representation of Cadence USB3 DRD controller. 51 * @dev: pointer to Cadence device struct 52 * @xhci_regs: pointer to base of xhci registers 53 * @xhci_res: the resource for xhci 54 * @dev_regs: pointer to base of dev registers 55 * @otg_res: the resource for otg 56 * @otg_v0_regs: pointer to base of v0 otg registers 57 * @otg_v1_regs: pointer to base of v1 otg registers 58 * @otg_cdnsp_regs: pointer to base of CDNSP otg registers 59 * @otg_regs: pointer to base of otg registers 60 * @otg_irq_regs: pointer to interrupt registers 61 * @otg_irq: irq number for otg controller 62 * @dev_irq: irq number for device controller 63 * @wakeup_irq: irq number for wakeup event, it is optional 64 * @roles: array of supported roles for this controller 65 * @role: current role 66 * @host_dev: the child host device pointer for cdns3 core 67 * @gadget_dev: the child gadget device pointer for cdns3 core 68 * @usb2_phy: pointer to USB2 PHY 69 * @usb3_phy: pointer to USB3 PHY 70 * @mutex: the mutex for concurrent code at driver 71 * @dr_mode: supported mode of operation it can be only Host, only Device 72 * or OTG mode that allow to switch between Device and Host mode. 73 * This field based on firmware setting, kernel configuration 74 * and hardware configuration. 75 * @role_sw: pointer to role switch object. 76 * @in_lpm: indicate the controller is in low power mode 77 * @wakeup_pending: wakeup interrupt pending 78 * @pdata: platform data from glue layer 79 * @lock: spinlock structure 80 * @xhci_plat_data: xhci private data structure pointer 81 */ 82 struct cdns3 { 83 struct device *dev; 84 void __iomem *xhci_regs; 85 struct resource xhci_res[CDNS3_XHCI_RESOURCES_NUM]; 86 struct cdns3_usb_regs __iomem *dev_regs; 87 88 struct resource otg_res; 89 struct cdns3_otg_legacy_regs *otg_v0_regs; 90 struct cdns3_otg_regs *otg_v1_regs; 91 struct cdnsp_otg_regs *otg_cdnsp_regs; 92 struct cdns3_otg_common_regs *otg_regs; 93 struct cdns3_otg_irq_regs *otg_irq_regs; 94 #define CDNS3_CONTROLLER_V0 0 95 #define CDNS3_CONTROLLER_V1 1 96 #define CDNSP_CONTROLLER_V2 2 97 u32 version; 98 bool phyrst_a_enable; 99 100 int otg_irq; 101 int dev_irq; 102 int wakeup_irq; 103 struct cdns3_role_driver *roles[USB_ROLE_DEVICE + 1]; 104 enum usb_role role; 105 struct platform_device *host_dev; 106 struct cdns3_device *gadget_dev; 107 struct phy *usb2_phy; 108 struct phy *usb3_phy; 109 /* mutext used in workqueue*/ 110 struct mutex mutex; 111 enum usb_dr_mode dr_mode; 112 struct usb_role_switch *role_sw; 113 bool in_lpm; 114 bool wakeup_pending; 115 struct cdns3_platform_data *pdata; 116 spinlock_t lock; 117 struct xhci_plat_priv *xhci_plat_data; 118 }; 119 120 int cdns3_hw_role_switch(struct cdns3 *cdns); 121 122 #endif /* __LINUX_CDNS3_CORE_H */ 123