1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * QLogic Fibre Channel HBA Driver
4 * Copyright (c) 2003-2014 QLogic Corporation
5 */
6 #include "qla_def.h"
7 #include "qla_target.h"
8
9 #include <linux/delay.h>
10 #include <linux/slab.h>
11 #include <linux/cpu.h>
12 #include <linux/t10-pi.h>
13 #include <scsi/scsi_tcq.h>
14 #include <scsi/scsi_bsg_fc.h>
15 #include <scsi/scsi_eh.h>
16 #include <scsi/fc/fc_fs.h>
17 #include <linux/nvme-fc-driver.h>
18
19 static void qla2x00_mbx_completion(scsi_qla_host_t *, uint16_t);
20 static void qla2x00_status_entry(scsi_qla_host_t *, struct rsp_que *, void *);
21 static void qla2x00_status_cont_entry(struct rsp_que *, sts_cont_entry_t *);
22 static int qla2x00_error_entry(scsi_qla_host_t *, struct rsp_que *,
23 sts_entry_t *);
24 static void qla27xx_process_purex_fpin(struct scsi_qla_host *vha,
25 struct purex_item *item);
26 static struct purex_item *qla24xx_alloc_purex_item(scsi_qla_host_t *vha,
27 uint16_t size);
28 static struct purex_item *qla24xx_copy_std_pkt(struct scsi_qla_host *vha,
29 void *pkt);
30 static struct purex_item *qla27xx_copy_fpin_pkt(struct scsi_qla_host *vha,
31 void **pkt, struct rsp_que **rsp);
32
33 static void
qla27xx_process_purex_fpin(struct scsi_qla_host * vha,struct purex_item * item)34 qla27xx_process_purex_fpin(struct scsi_qla_host *vha, struct purex_item *item)
35 {
36 void *pkt = &item->iocb;
37 uint16_t pkt_size = item->size;
38
39 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x508d,
40 "%s: Enter\n", __func__);
41
42 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x508e,
43 "-------- ELS REQ -------\n");
44 ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha, 0x508f,
45 pkt, pkt_size);
46
47 fc_host_fpin_rcv(vha->host, pkt_size, (char *)pkt);
48 }
49
50 const char *const port_state_str[] = {
51 "Unknown",
52 "UNCONFIGURED",
53 "DEAD",
54 "LOST",
55 "ONLINE"
56 };
57
58 static void
qla24xx_process_abts(struct scsi_qla_host * vha,struct purex_item * pkt)59 qla24xx_process_abts(struct scsi_qla_host *vha, struct purex_item *pkt)
60 {
61 struct abts_entry_24xx *abts =
62 (struct abts_entry_24xx *)&pkt->iocb;
63 struct qla_hw_data *ha = vha->hw;
64 struct els_entry_24xx *rsp_els;
65 struct abts_entry_24xx *abts_rsp;
66 dma_addr_t dma;
67 uint32_t fctl;
68 int rval;
69
70 ql_dbg(ql_dbg_init, vha, 0x0286, "%s: entered.\n", __func__);
71
72 ql_log(ql_log_warn, vha, 0x0287,
73 "Processing ABTS xchg=%#x oxid=%#x rxid=%#x seqid=%#x seqcnt=%#x\n",
74 abts->rx_xch_addr_to_abort, abts->ox_id, abts->rx_id,
75 abts->seq_id, abts->seq_cnt);
76 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x0287,
77 "-------- ABTS RCV -------\n");
78 ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha, 0x0287,
79 (uint8_t *)abts, sizeof(*abts));
80
81 rsp_els = dma_alloc_coherent(&ha->pdev->dev, sizeof(*rsp_els), &dma,
82 GFP_KERNEL);
83 if (!rsp_els) {
84 ql_log(ql_log_warn, vha, 0x0287,
85 "Failed allocate dma buffer ABTS/ELS RSP.\n");
86 return;
87 }
88
89 /* terminate exchange */
90 rsp_els->entry_type = ELS_IOCB_TYPE;
91 rsp_els->entry_count = 1;
92 rsp_els->nport_handle = cpu_to_le16(~0);
93 rsp_els->rx_xchg_address = abts->rx_xch_addr_to_abort;
94 rsp_els->control_flags = cpu_to_le16(EPD_RX_XCHG);
95 ql_dbg(ql_dbg_init, vha, 0x0283,
96 "Sending ELS Response to terminate exchange %#x...\n",
97 abts->rx_xch_addr_to_abort);
98 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x0283,
99 "-------- ELS RSP -------\n");
100 ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha, 0x0283,
101 (uint8_t *)rsp_els, sizeof(*rsp_els));
102 rval = qla2x00_issue_iocb(vha, rsp_els, dma, 0);
103 if (rval) {
104 ql_log(ql_log_warn, vha, 0x0288,
105 "%s: iocb failed to execute -> %x\n", __func__, rval);
106 } else if (rsp_els->comp_status) {
107 ql_log(ql_log_warn, vha, 0x0289,
108 "%s: iocb failed to complete -> completion=%#x subcode=(%#x,%#x)\n",
109 __func__, rsp_els->comp_status,
110 rsp_els->error_subcode_1, rsp_els->error_subcode_2);
111 } else {
112 ql_dbg(ql_dbg_init, vha, 0x028a,
113 "%s: abort exchange done.\n", __func__);
114 }
115
116 /* send ABTS response */
117 abts_rsp = (void *)rsp_els;
118 memset(abts_rsp, 0, sizeof(*abts_rsp));
119 abts_rsp->entry_type = ABTS_RSP_TYPE;
120 abts_rsp->entry_count = 1;
121 abts_rsp->nport_handle = abts->nport_handle;
122 abts_rsp->vp_idx = abts->vp_idx;
123 abts_rsp->sof_type = abts->sof_type & 0xf0;
124 abts_rsp->rx_xch_addr = abts->rx_xch_addr;
125 abts_rsp->d_id[0] = abts->s_id[0];
126 abts_rsp->d_id[1] = abts->s_id[1];
127 abts_rsp->d_id[2] = abts->s_id[2];
128 abts_rsp->r_ctl = FC_ROUTING_BLD | FC_R_CTL_BLD_BA_ACC;
129 abts_rsp->s_id[0] = abts->d_id[0];
130 abts_rsp->s_id[1] = abts->d_id[1];
131 abts_rsp->s_id[2] = abts->d_id[2];
132 abts_rsp->cs_ctl = abts->cs_ctl;
133 /* include flipping bit23 in fctl */
134 fctl = ~(abts->f_ctl[2] | 0x7F) << 16 |
135 FC_F_CTL_LAST_SEQ | FC_F_CTL_END_SEQ | FC_F_CTL_SEQ_INIT;
136 abts_rsp->f_ctl[0] = fctl >> 0 & 0xff;
137 abts_rsp->f_ctl[1] = fctl >> 8 & 0xff;
138 abts_rsp->f_ctl[2] = fctl >> 16 & 0xff;
139 abts_rsp->type = FC_TYPE_BLD;
140 abts_rsp->rx_id = abts->rx_id;
141 abts_rsp->ox_id = abts->ox_id;
142 abts_rsp->payload.ba_acc.aborted_rx_id = abts->rx_id;
143 abts_rsp->payload.ba_acc.aborted_ox_id = abts->ox_id;
144 abts_rsp->payload.ba_acc.high_seq_cnt = cpu_to_le16(~0);
145 abts_rsp->rx_xch_addr_to_abort = abts->rx_xch_addr_to_abort;
146 ql_dbg(ql_dbg_init, vha, 0x028b,
147 "Sending BA ACC response to ABTS %#x...\n",
148 abts->rx_xch_addr_to_abort);
149 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x028b,
150 "-------- ELS RSP -------\n");
151 ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha, 0x028b,
152 (uint8_t *)abts_rsp, sizeof(*abts_rsp));
153 rval = qla2x00_issue_iocb(vha, abts_rsp, dma, 0);
154 if (rval) {
155 ql_log(ql_log_warn, vha, 0x028c,
156 "%s: iocb failed to execute -> %x\n", __func__, rval);
157 } else if (abts_rsp->comp_status) {
158 ql_log(ql_log_warn, vha, 0x028d,
159 "%s: iocb failed to complete -> completion=%#x subcode=(%#x,%#x)\n",
160 __func__, abts_rsp->comp_status,
161 abts_rsp->payload.error.subcode1,
162 abts_rsp->payload.error.subcode2);
163 } else {
164 ql_dbg(ql_dbg_init, vha, 0x028ea,
165 "%s: done.\n", __func__);
166 }
167
168 dma_free_coherent(&ha->pdev->dev, sizeof(*rsp_els), rsp_els, dma);
169 }
170
171 /**
172 * qla2100_intr_handler() - Process interrupts for the ISP2100 and ISP2200.
173 * @irq: interrupt number
174 * @dev_id: SCSI driver HA context
175 *
176 * Called by system whenever the host adapter generates an interrupt.
177 *
178 * Returns handled flag.
179 */
180 irqreturn_t
qla2100_intr_handler(int irq,void * dev_id)181 qla2100_intr_handler(int irq, void *dev_id)
182 {
183 scsi_qla_host_t *vha;
184 struct qla_hw_data *ha;
185 struct device_reg_2xxx __iomem *reg;
186 int status;
187 unsigned long iter;
188 uint16_t hccr;
189 uint16_t mb[8];
190 struct rsp_que *rsp;
191 unsigned long flags;
192
193 rsp = (struct rsp_que *) dev_id;
194 if (!rsp) {
195 ql_log(ql_log_info, NULL, 0x505d,
196 "%s: NULL response queue pointer.\n", __func__);
197 return (IRQ_NONE);
198 }
199
200 ha = rsp->hw;
201 reg = &ha->iobase->isp;
202 status = 0;
203
204 spin_lock_irqsave(&ha->hardware_lock, flags);
205 vha = pci_get_drvdata(ha->pdev);
206 for (iter = 50; iter--; ) {
207 hccr = rd_reg_word(®->hccr);
208 if (qla2x00_check_reg16_for_disconnect(vha, hccr))
209 break;
210 if (hccr & HCCR_RISC_PAUSE) {
211 if (pci_channel_offline(ha->pdev))
212 break;
213
214 /*
215 * Issue a "HARD" reset in order for the RISC interrupt
216 * bit to be cleared. Schedule a big hammer to get
217 * out of the RISC PAUSED state.
218 */
219 wrt_reg_word(®->hccr, HCCR_RESET_RISC);
220 rd_reg_word(®->hccr);
221
222 ha->isp_ops->fw_dump(vha);
223 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
224 break;
225 } else if ((rd_reg_word(®->istatus) & ISR_RISC_INT) == 0)
226 break;
227
228 if (rd_reg_word(®->semaphore) & BIT_0) {
229 wrt_reg_word(®->hccr, HCCR_CLR_RISC_INT);
230 rd_reg_word(®->hccr);
231
232 /* Get mailbox data. */
233 mb[0] = RD_MAILBOX_REG(ha, reg, 0);
234 if (mb[0] > 0x3fff && mb[0] < 0x8000) {
235 qla2x00_mbx_completion(vha, mb[0]);
236 status |= MBX_INTERRUPT;
237 } else if (mb[0] > 0x7fff && mb[0] < 0xc000) {
238 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
239 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
240 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
241 qla2x00_async_event(vha, rsp, mb);
242 } else {
243 /*EMPTY*/
244 ql_dbg(ql_dbg_async, vha, 0x5025,
245 "Unrecognized interrupt type (%d).\n",
246 mb[0]);
247 }
248 /* Release mailbox registers. */
249 wrt_reg_word(®->semaphore, 0);
250 rd_reg_word(®->semaphore);
251 } else {
252 qla2x00_process_response_queue(rsp);
253
254 wrt_reg_word(®->hccr, HCCR_CLR_RISC_INT);
255 rd_reg_word(®->hccr);
256 }
257 }
258 qla2x00_handle_mbx_completion(ha, status);
259 spin_unlock_irqrestore(&ha->hardware_lock, flags);
260
261 return (IRQ_HANDLED);
262 }
263
264 bool
qla2x00_check_reg32_for_disconnect(scsi_qla_host_t * vha,uint32_t reg)265 qla2x00_check_reg32_for_disconnect(scsi_qla_host_t *vha, uint32_t reg)
266 {
267 /* Check for PCI disconnection */
268 if (reg == 0xffffffff && !pci_channel_offline(vha->hw->pdev)) {
269 if (!test_and_set_bit(PFLG_DISCONNECTED, &vha->pci_flags) &&
270 !test_bit(PFLG_DRIVER_REMOVING, &vha->pci_flags) &&
271 !test_bit(PFLG_DRIVER_PROBING, &vha->pci_flags)) {
272 qla_schedule_eeh_work(vha);
273 }
274 return true;
275 } else
276 return false;
277 }
278
279 bool
qla2x00_check_reg16_for_disconnect(scsi_qla_host_t * vha,uint16_t reg)280 qla2x00_check_reg16_for_disconnect(scsi_qla_host_t *vha, uint16_t reg)
281 {
282 return qla2x00_check_reg32_for_disconnect(vha, 0xffff0000 | reg);
283 }
284
285 /**
286 * qla2300_intr_handler() - Process interrupts for the ISP23xx and ISP63xx.
287 * @irq: interrupt number
288 * @dev_id: SCSI driver HA context
289 *
290 * Called by system whenever the host adapter generates an interrupt.
291 *
292 * Returns handled flag.
293 */
294 irqreturn_t
qla2300_intr_handler(int irq,void * dev_id)295 qla2300_intr_handler(int irq, void *dev_id)
296 {
297 scsi_qla_host_t *vha;
298 struct device_reg_2xxx __iomem *reg;
299 int status;
300 unsigned long iter;
301 uint32_t stat;
302 uint16_t hccr;
303 uint16_t mb[8];
304 struct rsp_que *rsp;
305 struct qla_hw_data *ha;
306 unsigned long flags;
307
308 rsp = (struct rsp_que *) dev_id;
309 if (!rsp) {
310 ql_log(ql_log_info, NULL, 0x5058,
311 "%s: NULL response queue pointer.\n", __func__);
312 return (IRQ_NONE);
313 }
314
315 ha = rsp->hw;
316 reg = &ha->iobase->isp;
317 status = 0;
318
319 spin_lock_irqsave(&ha->hardware_lock, flags);
320 vha = pci_get_drvdata(ha->pdev);
321 for (iter = 50; iter--; ) {
322 stat = rd_reg_dword(®->u.isp2300.host_status);
323 if (qla2x00_check_reg32_for_disconnect(vha, stat))
324 break;
325 if (stat & HSR_RISC_PAUSED) {
326 if (unlikely(pci_channel_offline(ha->pdev)))
327 break;
328
329 hccr = rd_reg_word(®->hccr);
330
331 if (hccr & (BIT_15 | BIT_13 | BIT_11 | BIT_8))
332 ql_log(ql_log_warn, vha, 0x5026,
333 "Parity error -- HCCR=%x, Dumping "
334 "firmware.\n", hccr);
335 else
336 ql_log(ql_log_warn, vha, 0x5027,
337 "RISC paused -- HCCR=%x, Dumping "
338 "firmware.\n", hccr);
339
340 /*
341 * Issue a "HARD" reset in order for the RISC
342 * interrupt bit to be cleared. Schedule a big
343 * hammer to get out of the RISC PAUSED state.
344 */
345 wrt_reg_word(®->hccr, HCCR_RESET_RISC);
346 rd_reg_word(®->hccr);
347
348 ha->isp_ops->fw_dump(vha);
349 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
350 break;
351 } else if ((stat & HSR_RISC_INT) == 0)
352 break;
353
354 switch (stat & 0xff) {
355 case 0x1:
356 case 0x2:
357 case 0x10:
358 case 0x11:
359 qla2x00_mbx_completion(vha, MSW(stat));
360 status |= MBX_INTERRUPT;
361
362 /* Release mailbox registers. */
363 wrt_reg_word(®->semaphore, 0);
364 break;
365 case 0x12:
366 mb[0] = MSW(stat);
367 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
368 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
369 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
370 qla2x00_async_event(vha, rsp, mb);
371 break;
372 case 0x13:
373 qla2x00_process_response_queue(rsp);
374 break;
375 case 0x15:
376 mb[0] = MBA_CMPLT_1_16BIT;
377 mb[1] = MSW(stat);
378 qla2x00_async_event(vha, rsp, mb);
379 break;
380 case 0x16:
381 mb[0] = MBA_SCSI_COMPLETION;
382 mb[1] = MSW(stat);
383 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
384 qla2x00_async_event(vha, rsp, mb);
385 break;
386 default:
387 ql_dbg(ql_dbg_async, vha, 0x5028,
388 "Unrecognized interrupt type (%d).\n", stat & 0xff);
389 break;
390 }
391 wrt_reg_word(®->hccr, HCCR_CLR_RISC_INT);
392 rd_reg_word_relaxed(®->hccr);
393 }
394 qla2x00_handle_mbx_completion(ha, status);
395 spin_unlock_irqrestore(&ha->hardware_lock, flags);
396
397 return (IRQ_HANDLED);
398 }
399
400 /**
401 * qla2x00_mbx_completion() - Process mailbox command completions.
402 * @vha: SCSI driver HA context
403 * @mb0: Mailbox0 register
404 */
405 static void
qla2x00_mbx_completion(scsi_qla_host_t * vha,uint16_t mb0)406 qla2x00_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0)
407 {
408 uint16_t cnt;
409 uint32_t mboxes;
410 __le16 __iomem *wptr;
411 struct qla_hw_data *ha = vha->hw;
412 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
413
414 /* Read all mbox registers? */
415 WARN_ON_ONCE(ha->mbx_count > 32);
416 mboxes = (1ULL << ha->mbx_count) - 1;
417 if (!ha->mcp)
418 ql_dbg(ql_dbg_async, vha, 0x5001, "MBX pointer ERROR.\n");
419 else
420 mboxes = ha->mcp->in_mb;
421
422 /* Load return mailbox registers. */
423 ha->flags.mbox_int = 1;
424 ha->mailbox_out[0] = mb0;
425 mboxes >>= 1;
426 wptr = MAILBOX_REG(ha, reg, 1);
427
428 for (cnt = 1; cnt < ha->mbx_count; cnt++) {
429 if (IS_QLA2200(ha) && cnt == 8)
430 wptr = MAILBOX_REG(ha, reg, 8);
431 if ((cnt == 4 || cnt == 5) && (mboxes & BIT_0))
432 ha->mailbox_out[cnt] = qla2x00_debounce_register(wptr);
433 else if (mboxes & BIT_0)
434 ha->mailbox_out[cnt] = rd_reg_word(wptr);
435
436 wptr++;
437 mboxes >>= 1;
438 }
439 }
440
441 static void
qla81xx_idc_event(scsi_qla_host_t * vha,uint16_t aen,uint16_t descr)442 qla81xx_idc_event(scsi_qla_host_t *vha, uint16_t aen, uint16_t descr)
443 {
444 static char *event[] =
445 { "Complete", "Request Notification", "Time Extension" };
446 int rval;
447 struct device_reg_24xx __iomem *reg24 = &vha->hw->iobase->isp24;
448 struct device_reg_82xx __iomem *reg82 = &vha->hw->iobase->isp82;
449 __le16 __iomem *wptr;
450 uint16_t cnt, timeout, mb[QLA_IDC_ACK_REGS];
451
452 /* Seed data -- mailbox1 -> mailbox7. */
453 if (IS_QLA81XX(vha->hw) || IS_QLA83XX(vha->hw))
454 wptr = ®24->mailbox1;
455 else if (IS_QLA8044(vha->hw))
456 wptr = ®82->mailbox_out[1];
457 else
458 return;
459
460 for (cnt = 0; cnt < QLA_IDC_ACK_REGS; cnt++, wptr++)
461 mb[cnt] = rd_reg_word(wptr);
462
463 ql_dbg(ql_dbg_async, vha, 0x5021,
464 "Inter-Driver Communication %s -- "
465 "%04x %04x %04x %04x %04x %04x %04x.\n",
466 event[aen & 0xff], mb[0], mb[1], mb[2], mb[3],
467 mb[4], mb[5], mb[6]);
468 switch (aen) {
469 /* Handle IDC Error completion case. */
470 case MBA_IDC_COMPLETE:
471 if (mb[1] >> 15) {
472 vha->hw->flags.idc_compl_status = 1;
473 if (vha->hw->notify_dcbx_comp && !vha->vp_idx)
474 complete(&vha->hw->dcbx_comp);
475 }
476 break;
477
478 case MBA_IDC_NOTIFY:
479 /* Acknowledgement needed? [Notify && non-zero timeout]. */
480 timeout = (descr >> 8) & 0xf;
481 ql_dbg(ql_dbg_async, vha, 0x5022,
482 "%lu Inter-Driver Communication %s -- ACK timeout=%d.\n",
483 vha->host_no, event[aen & 0xff], timeout);
484
485 if (!timeout)
486 return;
487 rval = qla2x00_post_idc_ack_work(vha, mb);
488 if (rval != QLA_SUCCESS)
489 ql_log(ql_log_warn, vha, 0x5023,
490 "IDC failed to post ACK.\n");
491 break;
492 case MBA_IDC_TIME_EXT:
493 vha->hw->idc_extend_tmo = descr;
494 ql_dbg(ql_dbg_async, vha, 0x5087,
495 "%lu Inter-Driver Communication %s -- "
496 "Extend timeout by=%d.\n",
497 vha->host_no, event[aen & 0xff], vha->hw->idc_extend_tmo);
498 break;
499 }
500 }
501
502 #define LS_UNKNOWN 2
503 const char *
qla2x00_get_link_speed_str(struct qla_hw_data * ha,uint16_t speed)504 qla2x00_get_link_speed_str(struct qla_hw_data *ha, uint16_t speed)
505 {
506 static const char *const link_speeds[] = {
507 "1", "2", "?", "4", "8", "16", "32", "10"
508 };
509 #define QLA_LAST_SPEED (ARRAY_SIZE(link_speeds) - 1)
510
511 if (IS_QLA2100(ha) || IS_QLA2200(ha))
512 return link_speeds[0];
513 else if (speed == 0x13)
514 return link_speeds[QLA_LAST_SPEED];
515 else if (speed < QLA_LAST_SPEED)
516 return link_speeds[speed];
517 else
518 return link_speeds[LS_UNKNOWN];
519 }
520
521 static void
qla83xx_handle_8200_aen(scsi_qla_host_t * vha,uint16_t * mb)522 qla83xx_handle_8200_aen(scsi_qla_host_t *vha, uint16_t *mb)
523 {
524 struct qla_hw_data *ha = vha->hw;
525
526 /*
527 * 8200 AEN Interpretation:
528 * mb[0] = AEN code
529 * mb[1] = AEN Reason code
530 * mb[2] = LSW of Peg-Halt Status-1 Register
531 * mb[6] = MSW of Peg-Halt Status-1 Register
532 * mb[3] = LSW of Peg-Halt Status-2 register
533 * mb[7] = MSW of Peg-Halt Status-2 register
534 * mb[4] = IDC Device-State Register value
535 * mb[5] = IDC Driver-Presence Register value
536 */
537 ql_dbg(ql_dbg_async, vha, 0x506b, "AEN Code: mb[0] = 0x%x AEN reason: "
538 "mb[1] = 0x%x PH-status1: mb[2] = 0x%x PH-status1: mb[6] = 0x%x.\n",
539 mb[0], mb[1], mb[2], mb[6]);
540 ql_dbg(ql_dbg_async, vha, 0x506c, "PH-status2: mb[3] = 0x%x "
541 "PH-status2: mb[7] = 0x%x Device-State: mb[4] = 0x%x "
542 "Drv-Presence: mb[5] = 0x%x.\n", mb[3], mb[7], mb[4], mb[5]);
543
544 if (mb[1] & (IDC_PEG_HALT_STATUS_CHANGE | IDC_NIC_FW_REPORTED_FAILURE |
545 IDC_HEARTBEAT_FAILURE)) {
546 ha->flags.nic_core_hung = 1;
547 ql_log(ql_log_warn, vha, 0x5060,
548 "83XX: F/W Error Reported: Check if reset required.\n");
549
550 if (mb[1] & IDC_PEG_HALT_STATUS_CHANGE) {
551 uint32_t protocol_engine_id, fw_err_code, err_level;
552
553 /*
554 * IDC_PEG_HALT_STATUS_CHANGE interpretation:
555 * - PEG-Halt Status-1 Register:
556 * (LSW = mb[2], MSW = mb[6])
557 * Bits 0-7 = protocol-engine ID
558 * Bits 8-28 = f/w error code
559 * Bits 29-31 = Error-level
560 * Error-level 0x1 = Non-Fatal error
561 * Error-level 0x2 = Recoverable Fatal error
562 * Error-level 0x4 = UnRecoverable Fatal error
563 * - PEG-Halt Status-2 Register:
564 * (LSW = mb[3], MSW = mb[7])
565 */
566 protocol_engine_id = (mb[2] & 0xff);
567 fw_err_code = (((mb[2] & 0xff00) >> 8) |
568 ((mb[6] & 0x1fff) << 8));
569 err_level = ((mb[6] & 0xe000) >> 13);
570 ql_log(ql_log_warn, vha, 0x5061, "PegHalt Status-1 "
571 "Register: protocol_engine_id=0x%x "
572 "fw_err_code=0x%x err_level=0x%x.\n",
573 protocol_engine_id, fw_err_code, err_level);
574 ql_log(ql_log_warn, vha, 0x5062, "PegHalt Status-2 "
575 "Register: 0x%x%x.\n", mb[7], mb[3]);
576 if (err_level == ERR_LEVEL_NON_FATAL) {
577 ql_log(ql_log_warn, vha, 0x5063,
578 "Not a fatal error, f/w has recovered itself.\n");
579 } else if (err_level == ERR_LEVEL_RECOVERABLE_FATAL) {
580 ql_log(ql_log_fatal, vha, 0x5064,
581 "Recoverable Fatal error: Chip reset "
582 "required.\n");
583 qla83xx_schedule_work(vha,
584 QLA83XX_NIC_CORE_RESET);
585 } else if (err_level == ERR_LEVEL_UNRECOVERABLE_FATAL) {
586 ql_log(ql_log_fatal, vha, 0x5065,
587 "Unrecoverable Fatal error: Set FAILED "
588 "state, reboot required.\n");
589 qla83xx_schedule_work(vha,
590 QLA83XX_NIC_CORE_UNRECOVERABLE);
591 }
592 }
593
594 if (mb[1] & IDC_NIC_FW_REPORTED_FAILURE) {
595 uint16_t peg_fw_state, nw_interface_link_up;
596 uint16_t nw_interface_signal_detect, sfp_status;
597 uint16_t htbt_counter, htbt_monitor_enable;
598 uint16_t sfp_additional_info, sfp_multirate;
599 uint16_t sfp_tx_fault, link_speed, dcbx_status;
600
601 /*
602 * IDC_NIC_FW_REPORTED_FAILURE interpretation:
603 * - PEG-to-FC Status Register:
604 * (LSW = mb[2], MSW = mb[6])
605 * Bits 0-7 = Peg-Firmware state
606 * Bit 8 = N/W Interface Link-up
607 * Bit 9 = N/W Interface signal detected
608 * Bits 10-11 = SFP Status
609 * SFP Status 0x0 = SFP+ transceiver not expected
610 * SFP Status 0x1 = SFP+ transceiver not present
611 * SFP Status 0x2 = SFP+ transceiver invalid
612 * SFP Status 0x3 = SFP+ transceiver present and
613 * valid
614 * Bits 12-14 = Heartbeat Counter
615 * Bit 15 = Heartbeat Monitor Enable
616 * Bits 16-17 = SFP Additional Info
617 * SFP info 0x0 = Unregocnized transceiver for
618 * Ethernet
619 * SFP info 0x1 = SFP+ brand validation failed
620 * SFP info 0x2 = SFP+ speed validation failed
621 * SFP info 0x3 = SFP+ access error
622 * Bit 18 = SFP Multirate
623 * Bit 19 = SFP Tx Fault
624 * Bits 20-22 = Link Speed
625 * Bits 23-27 = Reserved
626 * Bits 28-30 = DCBX Status
627 * DCBX Status 0x0 = DCBX Disabled
628 * DCBX Status 0x1 = DCBX Enabled
629 * DCBX Status 0x2 = DCBX Exchange error
630 * Bit 31 = Reserved
631 */
632 peg_fw_state = (mb[2] & 0x00ff);
633 nw_interface_link_up = ((mb[2] & 0x0100) >> 8);
634 nw_interface_signal_detect = ((mb[2] & 0x0200) >> 9);
635 sfp_status = ((mb[2] & 0x0c00) >> 10);
636 htbt_counter = ((mb[2] & 0x7000) >> 12);
637 htbt_monitor_enable = ((mb[2] & 0x8000) >> 15);
638 sfp_additional_info = (mb[6] & 0x0003);
639 sfp_multirate = ((mb[6] & 0x0004) >> 2);
640 sfp_tx_fault = ((mb[6] & 0x0008) >> 3);
641 link_speed = ((mb[6] & 0x0070) >> 4);
642 dcbx_status = ((mb[6] & 0x7000) >> 12);
643
644 ql_log(ql_log_warn, vha, 0x5066,
645 "Peg-to-Fc Status Register:\n"
646 "peg_fw_state=0x%x, nw_interface_link_up=0x%x, "
647 "nw_interface_signal_detect=0x%x"
648 "\nsfp_statis=0x%x.\n ", peg_fw_state,
649 nw_interface_link_up, nw_interface_signal_detect,
650 sfp_status);
651 ql_log(ql_log_warn, vha, 0x5067,
652 "htbt_counter=0x%x, htbt_monitor_enable=0x%x, "
653 "sfp_additional_info=0x%x, sfp_multirate=0x%x.\n ",
654 htbt_counter, htbt_monitor_enable,
655 sfp_additional_info, sfp_multirate);
656 ql_log(ql_log_warn, vha, 0x5068,
657 "sfp_tx_fault=0x%x, link_state=0x%x, "
658 "dcbx_status=0x%x.\n", sfp_tx_fault, link_speed,
659 dcbx_status);
660
661 qla83xx_schedule_work(vha, QLA83XX_NIC_CORE_RESET);
662 }
663
664 if (mb[1] & IDC_HEARTBEAT_FAILURE) {
665 ql_log(ql_log_warn, vha, 0x5069,
666 "Heartbeat Failure encountered, chip reset "
667 "required.\n");
668
669 qla83xx_schedule_work(vha, QLA83XX_NIC_CORE_RESET);
670 }
671 }
672
673 if (mb[1] & IDC_DEVICE_STATE_CHANGE) {
674 ql_log(ql_log_info, vha, 0x506a,
675 "IDC Device-State changed = 0x%x.\n", mb[4]);
676 if (ha->flags.nic_core_reset_owner)
677 return;
678 qla83xx_schedule_work(vha, MBA_IDC_AEN);
679 }
680 }
681
682 int
qla2x00_is_a_vp_did(scsi_qla_host_t * vha,uint32_t rscn_entry)683 qla2x00_is_a_vp_did(scsi_qla_host_t *vha, uint32_t rscn_entry)
684 {
685 struct qla_hw_data *ha = vha->hw;
686 scsi_qla_host_t *vp;
687 uint32_t vp_did;
688 unsigned long flags;
689 int ret = 0;
690
691 if (!ha->num_vhosts)
692 return ret;
693
694 spin_lock_irqsave(&ha->vport_slock, flags);
695 list_for_each_entry(vp, &ha->vp_list, list) {
696 vp_did = vp->d_id.b24;
697 if (vp_did == rscn_entry) {
698 ret = 1;
699 break;
700 }
701 }
702 spin_unlock_irqrestore(&ha->vport_slock, flags);
703
704 return ret;
705 }
706
707 fc_port_t *
qla2x00_find_fcport_by_loopid(scsi_qla_host_t * vha,uint16_t loop_id)708 qla2x00_find_fcport_by_loopid(scsi_qla_host_t *vha, uint16_t loop_id)
709 {
710 fc_port_t *f, *tf;
711
712 f = tf = NULL;
713 list_for_each_entry_safe(f, tf, &vha->vp_fcports, list)
714 if (f->loop_id == loop_id)
715 return f;
716 return NULL;
717 }
718
719 fc_port_t *
qla2x00_find_fcport_by_wwpn(scsi_qla_host_t * vha,u8 * wwpn,u8 incl_deleted)720 qla2x00_find_fcport_by_wwpn(scsi_qla_host_t *vha, u8 *wwpn, u8 incl_deleted)
721 {
722 fc_port_t *f, *tf;
723
724 f = tf = NULL;
725 list_for_each_entry_safe(f, tf, &vha->vp_fcports, list) {
726 if (memcmp(f->port_name, wwpn, WWN_SIZE) == 0) {
727 if (incl_deleted)
728 return f;
729 else if (f->deleted == 0)
730 return f;
731 }
732 }
733 return NULL;
734 }
735
736 fc_port_t *
qla2x00_find_fcport_by_nportid(scsi_qla_host_t * vha,port_id_t * id,u8 incl_deleted)737 qla2x00_find_fcport_by_nportid(scsi_qla_host_t *vha, port_id_t *id,
738 u8 incl_deleted)
739 {
740 fc_port_t *f, *tf;
741
742 f = tf = NULL;
743 list_for_each_entry_safe(f, tf, &vha->vp_fcports, list) {
744 if (f->d_id.b24 == id->b24) {
745 if (incl_deleted)
746 return f;
747 else if (f->deleted == 0)
748 return f;
749 }
750 }
751 return NULL;
752 }
753
754 /* Shall be called only on supported adapters. */
755 static void
qla27xx_handle_8200_aen(scsi_qla_host_t * vha,uint16_t * mb)756 qla27xx_handle_8200_aen(scsi_qla_host_t *vha, uint16_t *mb)
757 {
758 struct qla_hw_data *ha = vha->hw;
759 bool reset_isp_needed = 0;
760
761 ql_log(ql_log_warn, vha, 0x02f0,
762 "MPI Heartbeat stop. MPI reset is%s needed. "
763 "MB0[%xh] MB1[%xh] MB2[%xh] MB3[%xh]\n",
764 mb[1] & BIT_8 ? "" : " not",
765 mb[0], mb[1], mb[2], mb[3]);
766
767 if ((mb[1] & BIT_8) == 0)
768 return;
769
770 ql_log(ql_log_warn, vha, 0x02f1,
771 "MPI Heartbeat stop. FW dump needed\n");
772
773 if (ql2xfulldump_on_mpifail) {
774 ha->isp_ops->fw_dump(vha);
775 reset_isp_needed = 1;
776 }
777
778 ha->isp_ops->mpi_fw_dump(vha, 1);
779
780 if (reset_isp_needed) {
781 vha->hw->flags.fw_init_done = 0;
782 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
783 qla2xxx_wake_dpc(vha);
784 }
785 }
786
787 static struct purex_item *
qla24xx_alloc_purex_item(scsi_qla_host_t * vha,uint16_t size)788 qla24xx_alloc_purex_item(scsi_qla_host_t *vha, uint16_t size)
789 {
790 struct purex_item *item = NULL;
791 uint8_t item_hdr_size = sizeof(*item);
792
793 if (size > QLA_DEFAULT_PAYLOAD_SIZE) {
794 item = kzalloc(item_hdr_size +
795 (size - QLA_DEFAULT_PAYLOAD_SIZE), GFP_ATOMIC);
796 } else {
797 if (atomic_inc_return(&vha->default_item.in_use) == 1) {
798 item = &vha->default_item;
799 goto initialize_purex_header;
800 } else {
801 item = kzalloc(item_hdr_size, GFP_ATOMIC);
802 }
803 }
804 if (!item) {
805 ql_log(ql_log_warn, vha, 0x5092,
806 ">> Failed allocate purex list item.\n");
807
808 return NULL;
809 }
810
811 initialize_purex_header:
812 item->vha = vha;
813 item->size = size;
814 return item;
815 }
816
817 static void
qla24xx_queue_purex_item(scsi_qla_host_t * vha,struct purex_item * pkt,void (* process_item)(struct scsi_qla_host * vha,struct purex_item * pkt))818 qla24xx_queue_purex_item(scsi_qla_host_t *vha, struct purex_item *pkt,
819 void (*process_item)(struct scsi_qla_host *vha,
820 struct purex_item *pkt))
821 {
822 struct purex_list *list = &vha->purex_list;
823 ulong flags;
824
825 pkt->process_item = process_item;
826
827 spin_lock_irqsave(&list->lock, flags);
828 list_add_tail(&pkt->list, &list->head);
829 spin_unlock_irqrestore(&list->lock, flags);
830
831 set_bit(PROCESS_PUREX_IOCB, &vha->dpc_flags);
832 }
833
834 /**
835 * qla24xx_copy_std_pkt() - Copy over purex ELS which is
836 * contained in a single IOCB.
837 * purex packet.
838 * @vha: SCSI driver HA context
839 * @pkt: ELS packet
840 */
841 static struct purex_item
qla24xx_copy_std_pkt(struct scsi_qla_host * vha,void * pkt)842 *qla24xx_copy_std_pkt(struct scsi_qla_host *vha, void *pkt)
843 {
844 struct purex_item *item;
845
846 item = qla24xx_alloc_purex_item(vha,
847 QLA_DEFAULT_PAYLOAD_SIZE);
848 if (!item)
849 return item;
850
851 memcpy(&item->iocb, pkt, sizeof(item->iocb));
852 return item;
853 }
854
855 /**
856 * qla27xx_copy_fpin_pkt() - Copy over fpin packets that can
857 * span over multiple IOCBs.
858 * @vha: SCSI driver HA context
859 * @pkt: ELS packet
860 * @rsp: Response queue
861 */
862 static struct purex_item *
qla27xx_copy_fpin_pkt(struct scsi_qla_host * vha,void ** pkt,struct rsp_que ** rsp)863 qla27xx_copy_fpin_pkt(struct scsi_qla_host *vha, void **pkt,
864 struct rsp_que **rsp)
865 {
866 struct purex_entry_24xx *purex = *pkt;
867 struct rsp_que *rsp_q = *rsp;
868 sts_cont_entry_t *new_pkt;
869 uint16_t no_bytes = 0, total_bytes = 0, pending_bytes = 0;
870 uint16_t buffer_copy_offset = 0;
871 uint16_t entry_count, entry_count_remaining;
872 struct purex_item *item;
873 void *fpin_pkt = NULL;
874
875 total_bytes = (le16_to_cpu(purex->frame_size) & 0x0FFF)
876 - PURX_ELS_HEADER_SIZE;
877 pending_bytes = total_bytes;
878 entry_count = entry_count_remaining = purex->entry_count;
879 no_bytes = (pending_bytes > sizeof(purex->els_frame_payload)) ?
880 sizeof(purex->els_frame_payload) : pending_bytes;
881 ql_log(ql_log_info, vha, 0x509a,
882 "FPIN ELS, frame_size 0x%x, entry count %d\n",
883 total_bytes, entry_count);
884
885 item = qla24xx_alloc_purex_item(vha, total_bytes);
886 if (!item)
887 return item;
888
889 fpin_pkt = &item->iocb;
890
891 memcpy(fpin_pkt, &purex->els_frame_payload[0], no_bytes);
892 buffer_copy_offset += no_bytes;
893 pending_bytes -= no_bytes;
894 --entry_count_remaining;
895
896 ((response_t *)purex)->signature = RESPONSE_PROCESSED;
897 wmb();
898
899 do {
900 while ((total_bytes > 0) && (entry_count_remaining > 0)) {
901 if (rsp_q->ring_ptr->signature == RESPONSE_PROCESSED) {
902 ql_dbg(ql_dbg_async, vha, 0x5084,
903 "Ran out of IOCBs, partial data 0x%x\n",
904 buffer_copy_offset);
905 cpu_relax();
906 continue;
907 }
908
909 new_pkt = (sts_cont_entry_t *)rsp_q->ring_ptr;
910 *pkt = new_pkt;
911
912 if (new_pkt->entry_type != STATUS_CONT_TYPE) {
913 ql_log(ql_log_warn, vha, 0x507a,
914 "Unexpected IOCB type, partial data 0x%x\n",
915 buffer_copy_offset);
916 break;
917 }
918
919 rsp_q->ring_index++;
920 if (rsp_q->ring_index == rsp_q->length) {
921 rsp_q->ring_index = 0;
922 rsp_q->ring_ptr = rsp_q->ring;
923 } else {
924 rsp_q->ring_ptr++;
925 }
926 no_bytes = (pending_bytes > sizeof(new_pkt->data)) ?
927 sizeof(new_pkt->data) : pending_bytes;
928 if ((buffer_copy_offset + no_bytes) <= total_bytes) {
929 memcpy(((uint8_t *)fpin_pkt +
930 buffer_copy_offset), new_pkt->data,
931 no_bytes);
932 buffer_copy_offset += no_bytes;
933 pending_bytes -= no_bytes;
934 --entry_count_remaining;
935 } else {
936 ql_log(ql_log_warn, vha, 0x5044,
937 "Attempt to copy more that we got, optimizing..%x\n",
938 buffer_copy_offset);
939 memcpy(((uint8_t *)fpin_pkt +
940 buffer_copy_offset), new_pkt->data,
941 total_bytes - buffer_copy_offset);
942 }
943
944 ((response_t *)new_pkt)->signature = RESPONSE_PROCESSED;
945 wmb();
946 }
947
948 if (pending_bytes != 0 || entry_count_remaining != 0) {
949 ql_log(ql_log_fatal, vha, 0x508b,
950 "Dropping partial FPIN, underrun bytes = 0x%x, entry cnts 0x%x\n",
951 total_bytes, entry_count_remaining);
952 qla24xx_free_purex_item(item);
953 return NULL;
954 }
955 } while (entry_count_remaining > 0);
956 host_to_fcp_swap((uint8_t *)&item->iocb, total_bytes);
957 return item;
958 }
959
960 /**
961 * qla2x00_async_event() - Process aynchronous events.
962 * @vha: SCSI driver HA context
963 * @rsp: response queue
964 * @mb: Mailbox registers (0 - 3)
965 */
966 void
qla2x00_async_event(scsi_qla_host_t * vha,struct rsp_que * rsp,uint16_t * mb)967 qla2x00_async_event(scsi_qla_host_t *vha, struct rsp_que *rsp, uint16_t *mb)
968 {
969 uint16_t handle_cnt;
970 uint16_t cnt, mbx;
971 uint32_t handles[5];
972 struct qla_hw_data *ha = vha->hw;
973 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
974 struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
975 struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82;
976 uint32_t rscn_entry, host_pid;
977 unsigned long flags;
978 fc_port_t *fcport = NULL;
979
980 if (!vha->hw->flags.fw_started) {
981 ql_log(ql_log_warn, vha, 0x50ff,
982 "Dropping AEN - %04x %04x %04x %04x.\n",
983 mb[0], mb[1], mb[2], mb[3]);
984 return;
985 }
986
987 /* Setup to process RIO completion. */
988 handle_cnt = 0;
989 if (IS_CNA_CAPABLE(ha))
990 goto skip_rio;
991 switch (mb[0]) {
992 case MBA_SCSI_COMPLETION:
993 handles[0] = make_handle(mb[2], mb[1]);
994 handle_cnt = 1;
995 break;
996 case MBA_CMPLT_1_16BIT:
997 handles[0] = mb[1];
998 handle_cnt = 1;
999 mb[0] = MBA_SCSI_COMPLETION;
1000 break;
1001 case MBA_CMPLT_2_16BIT:
1002 handles[0] = mb[1];
1003 handles[1] = mb[2];
1004 handle_cnt = 2;
1005 mb[0] = MBA_SCSI_COMPLETION;
1006 break;
1007 case MBA_CMPLT_3_16BIT:
1008 handles[0] = mb[1];
1009 handles[1] = mb[2];
1010 handles[2] = mb[3];
1011 handle_cnt = 3;
1012 mb[0] = MBA_SCSI_COMPLETION;
1013 break;
1014 case MBA_CMPLT_4_16BIT:
1015 handles[0] = mb[1];
1016 handles[1] = mb[2];
1017 handles[2] = mb[3];
1018 handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6);
1019 handle_cnt = 4;
1020 mb[0] = MBA_SCSI_COMPLETION;
1021 break;
1022 case MBA_CMPLT_5_16BIT:
1023 handles[0] = mb[1];
1024 handles[1] = mb[2];
1025 handles[2] = mb[3];
1026 handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6);
1027 handles[4] = (uint32_t)RD_MAILBOX_REG(ha, reg, 7);
1028 handle_cnt = 5;
1029 mb[0] = MBA_SCSI_COMPLETION;
1030 break;
1031 case MBA_CMPLT_2_32BIT:
1032 handles[0] = make_handle(mb[2], mb[1]);
1033 handles[1] = make_handle(RD_MAILBOX_REG(ha, reg, 7),
1034 RD_MAILBOX_REG(ha, reg, 6));
1035 handle_cnt = 2;
1036 mb[0] = MBA_SCSI_COMPLETION;
1037 break;
1038 default:
1039 break;
1040 }
1041 skip_rio:
1042 switch (mb[0]) {
1043 case MBA_SCSI_COMPLETION: /* Fast Post */
1044 if (!vha->flags.online)
1045 break;
1046
1047 for (cnt = 0; cnt < handle_cnt; cnt++)
1048 qla2x00_process_completed_request(vha, rsp->req,
1049 handles[cnt]);
1050 break;
1051
1052 case MBA_RESET: /* Reset */
1053 ql_dbg(ql_dbg_async, vha, 0x5002,
1054 "Asynchronous RESET.\n");
1055
1056 set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
1057 break;
1058
1059 case MBA_SYSTEM_ERR: /* System Error */
1060 mbx = 0;
1061 if (IS_QLA81XX(ha) || IS_QLA83XX(ha) ||
1062 IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
1063 u16 m[4];
1064
1065 m[0] = rd_reg_word(®24->mailbox4);
1066 m[1] = rd_reg_word(®24->mailbox5);
1067 m[2] = rd_reg_word(®24->mailbox6);
1068 mbx = m[3] = rd_reg_word(®24->mailbox7);
1069
1070 ql_log(ql_log_warn, vha, 0x5003,
1071 "ISP System Error - mbx1=%xh mbx2=%xh mbx3=%xh mbx4=%xh mbx5=%xh mbx6=%xh mbx7=%xh.\n",
1072 mb[1], mb[2], mb[3], m[0], m[1], m[2], m[3]);
1073 } else
1074 ql_log(ql_log_warn, vha, 0x5003,
1075 "ISP System Error - mbx1=%xh mbx2=%xh mbx3=%xh.\n ",
1076 mb[1], mb[2], mb[3]);
1077
1078 if ((IS_QLA27XX(ha) || IS_QLA28XX(ha)) &&
1079 rd_reg_word(®24->mailbox7) & BIT_8)
1080 ha->isp_ops->mpi_fw_dump(vha, 1);
1081 ha->isp_ops->fw_dump(vha);
1082 ha->flags.fw_init_done = 0;
1083 QLA_FW_STOPPED(ha);
1084
1085 if (IS_FWI2_CAPABLE(ha)) {
1086 if (mb[1] == 0 && mb[2] == 0) {
1087 ql_log(ql_log_fatal, vha, 0x5004,
1088 "Unrecoverable Hardware Error: adapter "
1089 "marked OFFLINE!\n");
1090 vha->flags.online = 0;
1091 vha->device_flags |= DFLG_DEV_FAILED;
1092 } else {
1093 /* Check to see if MPI timeout occurred */
1094 if ((mbx & MBX_3) && (ha->port_no == 0))
1095 set_bit(MPI_RESET_NEEDED,
1096 &vha->dpc_flags);
1097
1098 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1099 }
1100 } else if (mb[1] == 0) {
1101 ql_log(ql_log_fatal, vha, 0x5005,
1102 "Unrecoverable Hardware Error: adapter marked "
1103 "OFFLINE!\n");
1104 vha->flags.online = 0;
1105 vha->device_flags |= DFLG_DEV_FAILED;
1106 } else
1107 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1108 break;
1109
1110 case MBA_REQ_TRANSFER_ERR: /* Request Transfer Error */
1111 ql_log(ql_log_warn, vha, 0x5006,
1112 "ISP Request Transfer Error (%x).\n", mb[1]);
1113
1114 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1115 break;
1116
1117 case MBA_RSP_TRANSFER_ERR: /* Response Transfer Error */
1118 ql_log(ql_log_warn, vha, 0x5007,
1119 "ISP Response Transfer Error (%x).\n", mb[1]);
1120
1121 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1122 break;
1123
1124 case MBA_WAKEUP_THRES: /* Request Queue Wake-up */
1125 ql_dbg(ql_dbg_async, vha, 0x5008,
1126 "Asynchronous WAKEUP_THRES (%x).\n", mb[1]);
1127 break;
1128
1129 case MBA_LOOP_INIT_ERR:
1130 ql_log(ql_log_warn, vha, 0x5090,
1131 "LOOP INIT ERROR (%x).\n", mb[1]);
1132 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1133 break;
1134
1135 case MBA_LIP_OCCURRED: /* Loop Initialization Procedure */
1136 ha->flags.lip_ae = 1;
1137
1138 ql_dbg(ql_dbg_async, vha, 0x5009,
1139 "LIP occurred (%x).\n", mb[1]);
1140
1141 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
1142 atomic_set(&vha->loop_state, LOOP_DOWN);
1143 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1144 qla2x00_mark_all_devices_lost(vha);
1145 }
1146
1147 if (vha->vp_idx) {
1148 atomic_set(&vha->vp_state, VP_FAILED);
1149 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
1150 }
1151
1152 set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags);
1153 set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
1154
1155 vha->flags.management_server_logged_in = 0;
1156 qla2x00_post_aen_work(vha, FCH_EVT_LIP, mb[1]);
1157 break;
1158
1159 case MBA_LOOP_UP: /* Loop Up Event */
1160 if (IS_QLA2100(ha) || IS_QLA2200(ha))
1161 ha->link_data_rate = PORT_SPEED_1GB;
1162 else
1163 ha->link_data_rate = mb[1];
1164
1165 ql_log(ql_log_info, vha, 0x500a,
1166 "LOOP UP detected (%s Gbps).\n",
1167 qla2x00_get_link_speed_str(ha, ha->link_data_rate));
1168
1169 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
1170 if (mb[2] & BIT_0)
1171 ql_log(ql_log_info, vha, 0x11a0,
1172 "FEC=enabled (link up).\n");
1173 }
1174
1175 vha->flags.management_server_logged_in = 0;
1176 qla2x00_post_aen_work(vha, FCH_EVT_LINKUP, ha->link_data_rate);
1177
1178 break;
1179
1180 case MBA_LOOP_DOWN: /* Loop Down Event */
1181 SAVE_TOPO(ha);
1182 ha->flags.lip_ae = 0;
1183 ha->current_topology = 0;
1184
1185 mbx = (IS_QLA81XX(ha) || IS_QLA8031(ha))
1186 ? rd_reg_word(®24->mailbox4) : 0;
1187 mbx = (IS_P3P_TYPE(ha)) ? rd_reg_word(®82->mailbox_out[4])
1188 : mbx;
1189 ql_log(ql_log_info, vha, 0x500b,
1190 "LOOP DOWN detected (%x %x %x %x).\n",
1191 mb[1], mb[2], mb[3], mbx);
1192
1193 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
1194 atomic_set(&vha->loop_state, LOOP_DOWN);
1195 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1196 /*
1197 * In case of loop down, restore WWPN from
1198 * NVRAM in case of FA-WWPN capable ISP
1199 * Restore for Physical Port only
1200 */
1201 if (!vha->vp_idx) {
1202 if (ha->flags.fawwpn_enabled &&
1203 (ha->current_topology == ISP_CFG_F)) {
1204 memcpy(vha->port_name, ha->port_name, WWN_SIZE);
1205 fc_host_port_name(vha->host) =
1206 wwn_to_u64(vha->port_name);
1207 ql_dbg(ql_dbg_init + ql_dbg_verbose,
1208 vha, 0x00d8, "LOOP DOWN detected,"
1209 "restore WWPN %016llx\n",
1210 wwn_to_u64(vha->port_name));
1211 }
1212
1213 clear_bit(VP_CONFIG_OK, &vha->vp_flags);
1214 }
1215
1216 vha->device_flags |= DFLG_NO_CABLE;
1217 qla2x00_mark_all_devices_lost(vha);
1218 }
1219
1220 if (vha->vp_idx) {
1221 atomic_set(&vha->vp_state, VP_FAILED);
1222 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
1223 }
1224
1225 vha->flags.management_server_logged_in = 0;
1226 ha->link_data_rate = PORT_SPEED_UNKNOWN;
1227 qla2x00_post_aen_work(vha, FCH_EVT_LINKDOWN, 0);
1228 break;
1229
1230 case MBA_LIP_RESET: /* LIP reset occurred */
1231 ql_dbg(ql_dbg_async, vha, 0x500c,
1232 "LIP reset occurred (%x).\n", mb[1]);
1233
1234 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
1235 atomic_set(&vha->loop_state, LOOP_DOWN);
1236 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1237 qla2x00_mark_all_devices_lost(vha);
1238 }
1239
1240 if (vha->vp_idx) {
1241 atomic_set(&vha->vp_state, VP_FAILED);
1242 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
1243 }
1244
1245 set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
1246
1247 ha->operating_mode = LOOP;
1248 vha->flags.management_server_logged_in = 0;
1249 qla2x00_post_aen_work(vha, FCH_EVT_LIPRESET, mb[1]);
1250 break;
1251
1252 /* case MBA_DCBX_COMPLETE: */
1253 case MBA_POINT_TO_POINT: /* Point-to-Point */
1254 ha->flags.lip_ae = 0;
1255
1256 if (IS_QLA2100(ha))
1257 break;
1258
1259 if (IS_CNA_CAPABLE(ha)) {
1260 ql_dbg(ql_dbg_async, vha, 0x500d,
1261 "DCBX Completed -- %04x %04x %04x.\n",
1262 mb[1], mb[2], mb[3]);
1263 if (ha->notify_dcbx_comp && !vha->vp_idx)
1264 complete(&ha->dcbx_comp);
1265
1266 } else
1267 ql_dbg(ql_dbg_async, vha, 0x500e,
1268 "Asynchronous P2P MODE received.\n");
1269
1270 /*
1271 * Until there's a transition from loop down to loop up, treat
1272 * this as loop down only.
1273 */
1274 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
1275 atomic_set(&vha->loop_state, LOOP_DOWN);
1276 if (!atomic_read(&vha->loop_down_timer))
1277 atomic_set(&vha->loop_down_timer,
1278 LOOP_DOWN_TIME);
1279 if (!N2N_TOPO(ha))
1280 qla2x00_mark_all_devices_lost(vha);
1281 }
1282
1283 if (vha->vp_idx) {
1284 atomic_set(&vha->vp_state, VP_FAILED);
1285 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
1286 }
1287
1288 if (!(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)))
1289 set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
1290
1291 set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags);
1292 set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
1293
1294 vha->flags.management_server_logged_in = 0;
1295 break;
1296
1297 case MBA_CHG_IN_CONNECTION: /* Change in connection mode */
1298 if (IS_QLA2100(ha))
1299 break;
1300
1301 ql_dbg(ql_dbg_async, vha, 0x500f,
1302 "Configuration change detected: value=%x.\n", mb[1]);
1303
1304 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
1305 atomic_set(&vha->loop_state, LOOP_DOWN);
1306 if (!atomic_read(&vha->loop_down_timer))
1307 atomic_set(&vha->loop_down_timer,
1308 LOOP_DOWN_TIME);
1309 qla2x00_mark_all_devices_lost(vha);
1310 }
1311
1312 if (vha->vp_idx) {
1313 atomic_set(&vha->vp_state, VP_FAILED);
1314 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
1315 }
1316
1317 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1318 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1319 break;
1320
1321 case MBA_PORT_UPDATE: /* Port database update */
1322 /*
1323 * Handle only global and vn-port update events
1324 *
1325 * Relevant inputs:
1326 * mb[1] = N_Port handle of changed port
1327 * OR 0xffff for global event
1328 * mb[2] = New login state
1329 * 7 = Port logged out
1330 * mb[3] = LSB is vp_idx, 0xff = all vps
1331 *
1332 * Skip processing if:
1333 * Event is global, vp_idx is NOT all vps,
1334 * vp_idx does not match
1335 * Event is not global, vp_idx does not match
1336 */
1337 if (IS_QLA2XXX_MIDTYPE(ha) &&
1338 ((mb[1] == 0xffff && (mb[3] & 0xff) != 0xff) ||
1339 (mb[1] != 0xffff)) && vha->vp_idx != (mb[3] & 0xff))
1340 break;
1341
1342 if (mb[2] == 0x7) {
1343 ql_dbg(ql_dbg_async, vha, 0x5010,
1344 "Port %s %04x %04x %04x.\n",
1345 mb[1] == 0xffff ? "unavailable" : "logout",
1346 mb[1], mb[2], mb[3]);
1347
1348 if (mb[1] == 0xffff)
1349 goto global_port_update;
1350
1351 if (mb[1] == NPH_SNS_LID(ha)) {
1352 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1353 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1354 break;
1355 }
1356
1357 /* use handle_cnt for loop id/nport handle */
1358 if (IS_FWI2_CAPABLE(ha))
1359 handle_cnt = NPH_SNS;
1360 else
1361 handle_cnt = SIMPLE_NAME_SERVER;
1362 if (mb[1] == handle_cnt) {
1363 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1364 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1365 break;
1366 }
1367
1368 /* Port logout */
1369 fcport = qla2x00_find_fcport_by_loopid(vha, mb[1]);
1370 if (!fcport)
1371 break;
1372 if (atomic_read(&fcport->state) != FCS_ONLINE)
1373 break;
1374 ql_dbg(ql_dbg_async, vha, 0x508a,
1375 "Marking port lost loopid=%04x portid=%06x.\n",
1376 fcport->loop_id, fcport->d_id.b24);
1377 if (qla_ini_mode_enabled(vha)) {
1378 fcport->logout_on_delete = 0;
1379 qlt_schedule_sess_for_deletion(fcport);
1380 }
1381 break;
1382
1383 global_port_update:
1384 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
1385 atomic_set(&vha->loop_state, LOOP_DOWN);
1386 atomic_set(&vha->loop_down_timer,
1387 LOOP_DOWN_TIME);
1388 vha->device_flags |= DFLG_NO_CABLE;
1389 qla2x00_mark_all_devices_lost(vha);
1390 }
1391
1392 if (vha->vp_idx) {
1393 atomic_set(&vha->vp_state, VP_FAILED);
1394 fc_vport_set_state(vha->fc_vport,
1395 FC_VPORT_FAILED);
1396 qla2x00_mark_all_devices_lost(vha);
1397 }
1398
1399 vha->flags.management_server_logged_in = 0;
1400 ha->link_data_rate = PORT_SPEED_UNKNOWN;
1401 break;
1402 }
1403
1404 /*
1405 * If PORT UPDATE is global (received LIP_OCCURRED/LIP_RESET
1406 * event etc. earlier indicating loop is down) then process
1407 * it. Otherwise ignore it and Wait for RSCN to come in.
1408 */
1409 atomic_set(&vha->loop_down_timer, 0);
1410 if (atomic_read(&vha->loop_state) != LOOP_DOWN &&
1411 !ha->flags.n2n_ae &&
1412 atomic_read(&vha->loop_state) != LOOP_DEAD) {
1413 ql_dbg(ql_dbg_async, vha, 0x5011,
1414 "Asynchronous PORT UPDATE ignored %04x/%04x/%04x.\n",
1415 mb[1], mb[2], mb[3]);
1416 break;
1417 }
1418
1419 ql_dbg(ql_dbg_async, vha, 0x5012,
1420 "Port database changed %04x %04x %04x.\n",
1421 mb[1], mb[2], mb[3]);
1422
1423 /*
1424 * Mark all devices as missing so we will login again.
1425 */
1426 atomic_set(&vha->loop_state, LOOP_UP);
1427 vha->scan.scan_retry = 0;
1428
1429 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1430 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1431 set_bit(VP_CONFIG_OK, &vha->vp_flags);
1432 break;
1433
1434 case MBA_RSCN_UPDATE: /* State Change Registration */
1435 /* Check if the Vport has issued a SCR */
1436 if (vha->vp_idx && test_bit(VP_SCR_NEEDED, &vha->vp_flags))
1437 break;
1438 /* Only handle SCNs for our Vport index. */
1439 if (ha->flags.npiv_supported && vha->vp_idx != (mb[3] & 0xff))
1440 break;
1441
1442 ql_dbg(ql_dbg_async, vha, 0x5013,
1443 "RSCN database changed -- %04x %04x %04x.\n",
1444 mb[1], mb[2], mb[3]);
1445
1446 rscn_entry = ((mb[1] & 0xff) << 16) | mb[2];
1447 host_pid = (vha->d_id.b.domain << 16) | (vha->d_id.b.area << 8)
1448 | vha->d_id.b.al_pa;
1449 if (rscn_entry == host_pid) {
1450 ql_dbg(ql_dbg_async, vha, 0x5014,
1451 "Ignoring RSCN update to local host "
1452 "port ID (%06x).\n", host_pid);
1453 break;
1454 }
1455
1456 /* Ignore reserved bits from RSCN-payload. */
1457 rscn_entry = ((mb[1] & 0x3ff) << 16) | mb[2];
1458
1459 /* Skip RSCNs for virtual ports on the same physical port */
1460 if (qla2x00_is_a_vp_did(vha, rscn_entry))
1461 break;
1462
1463 atomic_set(&vha->loop_down_timer, 0);
1464 vha->flags.management_server_logged_in = 0;
1465 {
1466 struct event_arg ea;
1467
1468 memset(&ea, 0, sizeof(ea));
1469 ea.id.b24 = rscn_entry;
1470 ea.id.b.rsvd_1 = rscn_entry >> 24;
1471 qla2x00_handle_rscn(vha, &ea);
1472 qla2x00_post_aen_work(vha, FCH_EVT_RSCN, rscn_entry);
1473 }
1474 break;
1475 case MBA_CONGN_NOTI_RECV:
1476 if (!ha->flags.scm_enabled ||
1477 mb[1] != QLA_CON_PRIMITIVE_RECEIVED)
1478 break;
1479
1480 if (mb[2] == QLA_CONGESTION_ARB_WARNING) {
1481 ql_dbg(ql_dbg_async, vha, 0x509b,
1482 "Congestion Warning %04x %04x.\n", mb[1], mb[2]);
1483 } else if (mb[2] == QLA_CONGESTION_ARB_ALARM) {
1484 ql_log(ql_log_warn, vha, 0x509b,
1485 "Congestion Alarm %04x %04x.\n", mb[1], mb[2]);
1486 }
1487 break;
1488 /* case MBA_RIO_RESPONSE: */
1489 case MBA_ZIO_RESPONSE:
1490 ql_dbg(ql_dbg_async, vha, 0x5015,
1491 "[R|Z]IO update completion.\n");
1492
1493 if (IS_FWI2_CAPABLE(ha))
1494 qla24xx_process_response_queue(vha, rsp);
1495 else
1496 qla2x00_process_response_queue(rsp);
1497 break;
1498
1499 case MBA_DISCARD_RND_FRAME:
1500 ql_dbg(ql_dbg_async, vha, 0x5016,
1501 "Discard RND Frame -- %04x %04x %04x.\n",
1502 mb[1], mb[2], mb[3]);
1503 break;
1504
1505 case MBA_TRACE_NOTIFICATION:
1506 ql_dbg(ql_dbg_async, vha, 0x5017,
1507 "Trace Notification -- %04x %04x.\n", mb[1], mb[2]);
1508 break;
1509
1510 case MBA_ISP84XX_ALERT:
1511 ql_dbg(ql_dbg_async, vha, 0x5018,
1512 "ISP84XX Alert Notification -- %04x %04x %04x.\n",
1513 mb[1], mb[2], mb[3]);
1514
1515 spin_lock_irqsave(&ha->cs84xx->access_lock, flags);
1516 switch (mb[1]) {
1517 case A84_PANIC_RECOVERY:
1518 ql_log(ql_log_info, vha, 0x5019,
1519 "Alert 84XX: panic recovery %04x %04x.\n",
1520 mb[2], mb[3]);
1521 break;
1522 case A84_OP_LOGIN_COMPLETE:
1523 ha->cs84xx->op_fw_version = mb[3] << 16 | mb[2];
1524 ql_log(ql_log_info, vha, 0x501a,
1525 "Alert 84XX: firmware version %x.\n",
1526 ha->cs84xx->op_fw_version);
1527 break;
1528 case A84_DIAG_LOGIN_COMPLETE:
1529 ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2];
1530 ql_log(ql_log_info, vha, 0x501b,
1531 "Alert 84XX: diagnostic firmware version %x.\n",
1532 ha->cs84xx->diag_fw_version);
1533 break;
1534 case A84_GOLD_LOGIN_COMPLETE:
1535 ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2];
1536 ha->cs84xx->fw_update = 1;
1537 ql_log(ql_log_info, vha, 0x501c,
1538 "Alert 84XX: gold firmware version %x.\n",
1539 ha->cs84xx->gold_fw_version);
1540 break;
1541 default:
1542 ql_log(ql_log_warn, vha, 0x501d,
1543 "Alert 84xx: Invalid Alert %04x %04x %04x.\n",
1544 mb[1], mb[2], mb[3]);
1545 }
1546 spin_unlock_irqrestore(&ha->cs84xx->access_lock, flags);
1547 break;
1548 case MBA_DCBX_START:
1549 ql_dbg(ql_dbg_async, vha, 0x501e,
1550 "DCBX Started -- %04x %04x %04x.\n",
1551 mb[1], mb[2], mb[3]);
1552 break;
1553 case MBA_DCBX_PARAM_UPDATE:
1554 ql_dbg(ql_dbg_async, vha, 0x501f,
1555 "DCBX Parameters Updated -- %04x %04x %04x.\n",
1556 mb[1], mb[2], mb[3]);
1557 break;
1558 case MBA_FCF_CONF_ERR:
1559 ql_dbg(ql_dbg_async, vha, 0x5020,
1560 "FCF Configuration Error -- %04x %04x %04x.\n",
1561 mb[1], mb[2], mb[3]);
1562 break;
1563 case MBA_IDC_NOTIFY:
1564 if (IS_QLA8031(vha->hw) || IS_QLA8044(ha)) {
1565 mb[4] = rd_reg_word(®24->mailbox4);
1566 if (((mb[2] & 0x7fff) == MBC_PORT_RESET ||
1567 (mb[2] & 0x7fff) == MBC_SET_PORT_CONFIG) &&
1568 (mb[4] & INTERNAL_LOOPBACK_MASK) != 0) {
1569 set_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags);
1570 /*
1571 * Extend loop down timer since port is active.
1572 */
1573 if (atomic_read(&vha->loop_state) == LOOP_DOWN)
1574 atomic_set(&vha->loop_down_timer,
1575 LOOP_DOWN_TIME);
1576 qla2xxx_wake_dpc(vha);
1577 }
1578 }
1579 fallthrough;
1580 case MBA_IDC_COMPLETE:
1581 if (ha->notify_lb_portup_comp && !vha->vp_idx)
1582 complete(&ha->lb_portup_comp);
1583 fallthrough;
1584 case MBA_IDC_TIME_EXT:
1585 if (IS_QLA81XX(vha->hw) || IS_QLA8031(vha->hw) ||
1586 IS_QLA8044(ha))
1587 qla81xx_idc_event(vha, mb[0], mb[1]);
1588 break;
1589
1590 case MBA_IDC_AEN:
1591 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
1592 qla27xx_handle_8200_aen(vha, mb);
1593 } else if (IS_QLA83XX(ha)) {
1594 mb[4] = rd_reg_word(®24->mailbox4);
1595 mb[5] = rd_reg_word(®24->mailbox5);
1596 mb[6] = rd_reg_word(®24->mailbox6);
1597 mb[7] = rd_reg_word(®24->mailbox7);
1598 qla83xx_handle_8200_aen(vha, mb);
1599 } else {
1600 ql_dbg(ql_dbg_async, vha, 0x5052,
1601 "skip Heartbeat processing mb0-3=[0x%04x] [0x%04x] [0x%04x] [0x%04x]\n",
1602 mb[0], mb[1], mb[2], mb[3]);
1603 }
1604 break;
1605
1606 case MBA_DPORT_DIAGNOSTICS:
1607 ql_dbg(ql_dbg_async, vha, 0x5052,
1608 "D-Port Diagnostics: %04x %04x %04x %04x\n",
1609 mb[0], mb[1], mb[2], mb[3]);
1610 memcpy(vha->dport_data, mb, sizeof(vha->dport_data));
1611 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
1612 static char *results[] = {
1613 "start", "done(pass)", "done(error)", "undefined" };
1614 static char *types[] = {
1615 "none", "dynamic", "static", "other" };
1616 uint result = mb[1] >> 0 & 0x3;
1617 uint type = mb[1] >> 6 & 0x3;
1618 uint sw = mb[1] >> 15 & 0x1;
1619 ql_dbg(ql_dbg_async, vha, 0x5052,
1620 "D-Port Diagnostics: result=%s type=%s [sw=%u]\n",
1621 results[result], types[type], sw);
1622 if (result == 2) {
1623 static char *reasons[] = {
1624 "reserved", "unexpected reject",
1625 "unexpected phase", "retry exceeded",
1626 "timed out", "not supported",
1627 "user stopped" };
1628 uint reason = mb[2] >> 0 & 0xf;
1629 uint phase = mb[2] >> 12 & 0xf;
1630 ql_dbg(ql_dbg_async, vha, 0x5052,
1631 "D-Port Diagnostics: reason=%s phase=%u \n",
1632 reason < 7 ? reasons[reason] : "other",
1633 phase >> 1);
1634 }
1635 }
1636 break;
1637
1638 case MBA_TEMPERATURE_ALERT:
1639 ql_dbg(ql_dbg_async, vha, 0x505e,
1640 "TEMPERATURE ALERT: %04x %04x %04x\n", mb[1], mb[2], mb[3]);
1641 break;
1642
1643 case MBA_TRANS_INSERT:
1644 ql_dbg(ql_dbg_async, vha, 0x5091,
1645 "Transceiver Insertion: %04x\n", mb[1]);
1646 set_bit(DETECT_SFP_CHANGE, &vha->dpc_flags);
1647 break;
1648
1649 case MBA_TRANS_REMOVE:
1650 ql_dbg(ql_dbg_async, vha, 0x5091, "Transceiver Removal\n");
1651 break;
1652
1653 default:
1654 ql_dbg(ql_dbg_async, vha, 0x5057,
1655 "Unknown AEN:%04x %04x %04x %04x\n",
1656 mb[0], mb[1], mb[2], mb[3]);
1657 }
1658
1659 qlt_async_event(mb[0], vha, mb);
1660
1661 if (!vha->vp_idx && ha->num_vhosts)
1662 qla2x00_alert_all_vps(rsp, mb);
1663 }
1664
1665 /**
1666 * qla2x00_process_completed_request() - Process a Fast Post response.
1667 * @vha: SCSI driver HA context
1668 * @req: request queue
1669 * @index: SRB index
1670 */
1671 void
qla2x00_process_completed_request(struct scsi_qla_host * vha,struct req_que * req,uint32_t index)1672 qla2x00_process_completed_request(struct scsi_qla_host *vha,
1673 struct req_que *req, uint32_t index)
1674 {
1675 srb_t *sp;
1676 struct qla_hw_data *ha = vha->hw;
1677
1678 /* Validate handle. */
1679 if (index >= req->num_outstanding_cmds) {
1680 ql_log(ql_log_warn, vha, 0x3014,
1681 "Invalid SCSI command index (%x).\n", index);
1682
1683 if (IS_P3P_TYPE(ha))
1684 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
1685 else
1686 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1687 return;
1688 }
1689
1690 sp = req->outstanding_cmds[index];
1691 if (sp) {
1692 /* Free outstanding command slot. */
1693 req->outstanding_cmds[index] = NULL;
1694
1695 /* Save ISP completion status */
1696 sp->done(sp, DID_OK << 16);
1697 } else {
1698 ql_log(ql_log_warn, vha, 0x3016, "Invalid SCSI SRB.\n");
1699
1700 if (IS_P3P_TYPE(ha))
1701 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
1702 else
1703 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1704 }
1705 }
1706
1707 srb_t *
qla2x00_get_sp_from_handle(scsi_qla_host_t * vha,const char * func,struct req_que * req,void * iocb)1708 qla2x00_get_sp_from_handle(scsi_qla_host_t *vha, const char *func,
1709 struct req_que *req, void *iocb)
1710 {
1711 struct qla_hw_data *ha = vha->hw;
1712 sts_entry_t *pkt = iocb;
1713 srb_t *sp;
1714 uint16_t index;
1715
1716 index = LSW(pkt->handle);
1717 if (index >= req->num_outstanding_cmds) {
1718 ql_log(ql_log_warn, vha, 0x5031,
1719 "%s: Invalid command index (%x) type %8ph.\n",
1720 func, index, iocb);
1721 if (IS_P3P_TYPE(ha))
1722 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
1723 else
1724 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1725 return NULL;
1726 }
1727 sp = req->outstanding_cmds[index];
1728 if (!sp) {
1729 ql_log(ql_log_warn, vha, 0x5032,
1730 "%s: Invalid completion handle (%x) -- timed-out.\n",
1731 func, index);
1732 return NULL;
1733 }
1734 if (sp->handle != index) {
1735 ql_log(ql_log_warn, vha, 0x5033,
1736 "%s: SRB handle (%x) mismatch %x.\n", func,
1737 sp->handle, index);
1738 return NULL;
1739 }
1740
1741 req->outstanding_cmds[index] = NULL;
1742 return sp;
1743 }
1744
1745 static void
qla2x00_mbx_iocb_entry(scsi_qla_host_t * vha,struct req_que * req,struct mbx_entry * mbx)1746 qla2x00_mbx_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
1747 struct mbx_entry *mbx)
1748 {
1749 const char func[] = "MBX-IOCB";
1750 const char *type;
1751 fc_port_t *fcport;
1752 srb_t *sp;
1753 struct srb_iocb *lio;
1754 uint16_t *data;
1755 uint16_t status;
1756
1757 sp = qla2x00_get_sp_from_handle(vha, func, req, mbx);
1758 if (!sp)
1759 return;
1760
1761 lio = &sp->u.iocb_cmd;
1762 type = sp->name;
1763 fcport = sp->fcport;
1764 data = lio->u.logio.data;
1765
1766 data[0] = MBS_COMMAND_ERROR;
1767 data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
1768 QLA_LOGIO_LOGIN_RETRIED : 0;
1769 if (mbx->entry_status) {
1770 ql_dbg(ql_dbg_async, vha, 0x5043,
1771 "Async-%s error entry - hdl=%x portid=%02x%02x%02x "
1772 "entry-status=%x status=%x state-flag=%x "
1773 "status-flags=%x.\n", type, sp->handle,
1774 fcport->d_id.b.domain, fcport->d_id.b.area,
1775 fcport->d_id.b.al_pa, mbx->entry_status,
1776 le16_to_cpu(mbx->status), le16_to_cpu(mbx->state_flags),
1777 le16_to_cpu(mbx->status_flags));
1778
1779 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5029,
1780 mbx, sizeof(*mbx));
1781
1782 goto logio_done;
1783 }
1784
1785 status = le16_to_cpu(mbx->status);
1786 if (status == 0x30 && sp->type == SRB_LOGIN_CMD &&
1787 le16_to_cpu(mbx->mb0) == MBS_COMMAND_COMPLETE)
1788 status = 0;
1789 if (!status && le16_to_cpu(mbx->mb0) == MBS_COMMAND_COMPLETE) {
1790 ql_dbg(ql_dbg_async, vha, 0x5045,
1791 "Async-%s complete - hdl=%x portid=%02x%02x%02x mbx1=%x.\n",
1792 type, sp->handle, fcport->d_id.b.domain,
1793 fcport->d_id.b.area, fcport->d_id.b.al_pa,
1794 le16_to_cpu(mbx->mb1));
1795
1796 data[0] = MBS_COMMAND_COMPLETE;
1797 if (sp->type == SRB_LOGIN_CMD) {
1798 fcport->port_type = FCT_TARGET;
1799 if (le16_to_cpu(mbx->mb1) & BIT_0)
1800 fcport->port_type = FCT_INITIATOR;
1801 else if (le16_to_cpu(mbx->mb1) & BIT_1)
1802 fcport->flags |= FCF_FCP2_DEVICE;
1803 }
1804 goto logio_done;
1805 }
1806
1807 data[0] = le16_to_cpu(mbx->mb0);
1808 switch (data[0]) {
1809 case MBS_PORT_ID_USED:
1810 data[1] = le16_to_cpu(mbx->mb1);
1811 break;
1812 case MBS_LOOP_ID_USED:
1813 break;
1814 default:
1815 data[0] = MBS_COMMAND_ERROR;
1816 break;
1817 }
1818
1819 ql_log(ql_log_warn, vha, 0x5046,
1820 "Async-%s failed - hdl=%x portid=%02x%02x%02x status=%x "
1821 "mb0=%x mb1=%x mb2=%x mb6=%x mb7=%x.\n", type, sp->handle,
1822 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
1823 status, le16_to_cpu(mbx->mb0), le16_to_cpu(mbx->mb1),
1824 le16_to_cpu(mbx->mb2), le16_to_cpu(mbx->mb6),
1825 le16_to_cpu(mbx->mb7));
1826
1827 logio_done:
1828 sp->done(sp, 0);
1829 }
1830
1831 static void
qla24xx_mbx_iocb_entry(scsi_qla_host_t * vha,struct req_que * req,struct mbx_24xx_entry * pkt)1832 qla24xx_mbx_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
1833 struct mbx_24xx_entry *pkt)
1834 {
1835 const char func[] = "MBX-IOCB2";
1836 struct qla_hw_data *ha = vha->hw;
1837 srb_t *sp;
1838 struct srb_iocb *si;
1839 u16 sz, i;
1840 int res;
1841
1842 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
1843 if (!sp)
1844 return;
1845
1846 if (sp->type == SRB_SCSI_CMD ||
1847 sp->type == SRB_NVME_CMD ||
1848 sp->type == SRB_TM_CMD) {
1849 ql_log(ql_log_warn, vha, 0x509d,
1850 "Inconsistent event entry type %d\n", sp->type);
1851 if (IS_P3P_TYPE(ha))
1852 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
1853 else
1854 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1855 return;
1856 }
1857
1858 si = &sp->u.iocb_cmd;
1859 sz = min(ARRAY_SIZE(pkt->mb), ARRAY_SIZE(sp->u.iocb_cmd.u.mbx.in_mb));
1860
1861 for (i = 0; i < sz; i++)
1862 si->u.mbx.in_mb[i] = pkt->mb[i];
1863
1864 res = (si->u.mbx.in_mb[0] & MBS_MASK);
1865
1866 sp->done(sp, res);
1867 }
1868
1869 static void
qla24xxx_nack_iocb_entry(scsi_qla_host_t * vha,struct req_que * req,struct nack_to_isp * pkt)1870 qla24xxx_nack_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
1871 struct nack_to_isp *pkt)
1872 {
1873 const char func[] = "nack";
1874 srb_t *sp;
1875 int res = 0;
1876
1877 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
1878 if (!sp)
1879 return;
1880
1881 if (pkt->u.isp2x.status != cpu_to_le16(NOTIFY_ACK_SUCCESS))
1882 res = QLA_FUNCTION_FAILED;
1883
1884 sp->done(sp, res);
1885 }
1886
1887 static void
qla2x00_ct_entry(scsi_qla_host_t * vha,struct req_que * req,sts_entry_t * pkt,int iocb_type)1888 qla2x00_ct_entry(scsi_qla_host_t *vha, struct req_que *req,
1889 sts_entry_t *pkt, int iocb_type)
1890 {
1891 const char func[] = "CT_IOCB";
1892 const char *type;
1893 srb_t *sp;
1894 struct bsg_job *bsg_job;
1895 struct fc_bsg_reply *bsg_reply;
1896 uint16_t comp_status;
1897 int res = 0;
1898
1899 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
1900 if (!sp)
1901 return;
1902
1903 switch (sp->type) {
1904 case SRB_CT_CMD:
1905 bsg_job = sp->u.bsg_job;
1906 bsg_reply = bsg_job->reply;
1907
1908 type = "ct pass-through";
1909
1910 comp_status = le16_to_cpu(pkt->comp_status);
1911
1912 /*
1913 * return FC_CTELS_STATUS_OK and leave the decoding of the ELS/CT
1914 * fc payload to the caller
1915 */
1916 bsg_reply->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK;
1917 bsg_job->reply_len = sizeof(struct fc_bsg_reply);
1918
1919 if (comp_status != CS_COMPLETE) {
1920 if (comp_status == CS_DATA_UNDERRUN) {
1921 res = DID_OK << 16;
1922 bsg_reply->reply_payload_rcv_len =
1923 le16_to_cpu(pkt->rsp_info_len);
1924
1925 ql_log(ql_log_warn, vha, 0x5048,
1926 "CT pass-through-%s error comp_status=0x%x total_byte=0x%x.\n",
1927 type, comp_status,
1928 bsg_reply->reply_payload_rcv_len);
1929 } else {
1930 ql_log(ql_log_warn, vha, 0x5049,
1931 "CT pass-through-%s error comp_status=0x%x.\n",
1932 type, comp_status);
1933 res = DID_ERROR << 16;
1934 bsg_reply->reply_payload_rcv_len = 0;
1935 }
1936 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5035,
1937 pkt, sizeof(*pkt));
1938 } else {
1939 res = DID_OK << 16;
1940 bsg_reply->reply_payload_rcv_len =
1941 bsg_job->reply_payload.payload_len;
1942 bsg_job->reply_len = 0;
1943 }
1944 break;
1945 case SRB_CT_PTHRU_CMD:
1946 /*
1947 * borrowing sts_entry_24xx.comp_status.
1948 * same location as ct_entry_24xx.comp_status
1949 */
1950 res = qla2x00_chk_ms_status(vha, (ms_iocb_entry_t *)pkt,
1951 (struct ct_sns_rsp *)sp->u.iocb_cmd.u.ctarg.rsp,
1952 sp->name);
1953 break;
1954 }
1955
1956 sp->done(sp, res);
1957 }
1958
1959 static void
qla24xx_els_ct_entry(scsi_qla_host_t * vha,struct req_que * req,struct sts_entry_24xx * pkt,int iocb_type)1960 qla24xx_els_ct_entry(scsi_qla_host_t *vha, struct req_que *req,
1961 struct sts_entry_24xx *pkt, int iocb_type)
1962 {
1963 struct els_sts_entry_24xx *ese = (struct els_sts_entry_24xx *)pkt;
1964 const char func[] = "ELS_CT_IOCB";
1965 const char *type;
1966 srb_t *sp;
1967 struct bsg_job *bsg_job;
1968 struct fc_bsg_reply *bsg_reply;
1969 uint16_t comp_status;
1970 uint32_t fw_status[3];
1971 int res;
1972 struct srb_iocb *els;
1973
1974 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
1975 if (!sp)
1976 return;
1977
1978 type = NULL;
1979 switch (sp->type) {
1980 case SRB_ELS_CMD_RPT:
1981 case SRB_ELS_CMD_HST:
1982 type = "els";
1983 break;
1984 case SRB_CT_CMD:
1985 type = "ct pass-through";
1986 break;
1987 case SRB_ELS_DCMD:
1988 type = "Driver ELS logo";
1989 if (iocb_type != ELS_IOCB_TYPE) {
1990 ql_dbg(ql_dbg_user, vha, 0x5047,
1991 "Completing %s: (%p) type=%d.\n",
1992 type, sp, sp->type);
1993 sp->done(sp, 0);
1994 return;
1995 }
1996 break;
1997 case SRB_CT_PTHRU_CMD:
1998 /* borrowing sts_entry_24xx.comp_status.
1999 same location as ct_entry_24xx.comp_status
2000 */
2001 res = qla2x00_chk_ms_status(sp->vha, (ms_iocb_entry_t *)pkt,
2002 (struct ct_sns_rsp *)sp->u.iocb_cmd.u.ctarg.rsp,
2003 sp->name);
2004 sp->done(sp, res);
2005 return;
2006 default:
2007 ql_dbg(ql_dbg_user, vha, 0x503e,
2008 "Unrecognized SRB: (%p) type=%d.\n", sp, sp->type);
2009 return;
2010 }
2011
2012 comp_status = fw_status[0] = le16_to_cpu(pkt->comp_status);
2013 fw_status[1] = le32_to_cpu(ese->error_subcode_1);
2014 fw_status[2] = le32_to_cpu(ese->error_subcode_2);
2015
2016 if (iocb_type == ELS_IOCB_TYPE) {
2017 els = &sp->u.iocb_cmd;
2018 els->u.els_plogi.fw_status[0] = cpu_to_le32(fw_status[0]);
2019 els->u.els_plogi.fw_status[1] = cpu_to_le32(fw_status[1]);
2020 els->u.els_plogi.fw_status[2] = cpu_to_le32(fw_status[2]);
2021 els->u.els_plogi.comp_status = cpu_to_le16(fw_status[0]);
2022 if (comp_status == CS_COMPLETE) {
2023 res = DID_OK << 16;
2024 } else {
2025 if (comp_status == CS_DATA_UNDERRUN) {
2026 res = DID_OK << 16;
2027 els->u.els_plogi.len = cpu_to_le16(le32_to_cpu(
2028 ese->total_byte_count));
2029 } else {
2030 els->u.els_plogi.len = 0;
2031 res = DID_ERROR << 16;
2032 }
2033 }
2034 ql_dbg(ql_dbg_disc, vha, 0x503f,
2035 "ELS IOCB Done -%s hdl=%x comp_status=0x%x error subcode 1=0x%x error subcode 2=0x%x total_byte=0x%x\n",
2036 type, sp->handle, comp_status, fw_status[1], fw_status[2],
2037 le32_to_cpu(ese->total_byte_count));
2038 goto els_ct_done;
2039 }
2040
2041 /* return FC_CTELS_STATUS_OK and leave the decoding of the ELS/CT
2042 * fc payload to the caller
2043 */
2044 bsg_job = sp->u.bsg_job;
2045 bsg_reply = bsg_job->reply;
2046 bsg_reply->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK;
2047 bsg_job->reply_len = sizeof(struct fc_bsg_reply) + sizeof(fw_status);
2048
2049 if (comp_status != CS_COMPLETE) {
2050 if (comp_status == CS_DATA_UNDERRUN) {
2051 res = DID_OK << 16;
2052 bsg_reply->reply_payload_rcv_len =
2053 le32_to_cpu(ese->total_byte_count);
2054
2055 ql_dbg(ql_dbg_user, vha, 0x503f,
2056 "ELS-CT pass-through-%s error hdl=%x comp_status-status=0x%x "
2057 "error subcode 1=0x%x error subcode 2=0x%x total_byte = 0x%x.\n",
2058 type, sp->handle, comp_status, fw_status[1], fw_status[2],
2059 le32_to_cpu(ese->total_byte_count));
2060 } else {
2061 ql_dbg(ql_dbg_user, vha, 0x5040,
2062 "ELS-CT pass-through-%s error hdl=%x comp_status-status=0x%x "
2063 "error subcode 1=0x%x error subcode 2=0x%x.\n",
2064 type, sp->handle, comp_status,
2065 le32_to_cpu(ese->error_subcode_1),
2066 le32_to_cpu(ese->error_subcode_2));
2067 res = DID_ERROR << 16;
2068 bsg_reply->reply_payload_rcv_len = 0;
2069 }
2070 memcpy(bsg_job->reply + sizeof(struct fc_bsg_reply),
2071 fw_status, sizeof(fw_status));
2072 ql_dump_buffer(ql_dbg_user + ql_dbg_buffer, vha, 0x5056,
2073 pkt, sizeof(*pkt));
2074 }
2075 else {
2076 res = DID_OK << 16;
2077 bsg_reply->reply_payload_rcv_len = bsg_job->reply_payload.payload_len;
2078 bsg_job->reply_len = 0;
2079 }
2080 els_ct_done:
2081
2082 sp->done(sp, res);
2083 }
2084
2085 static void
qla24xx_logio_entry(scsi_qla_host_t * vha,struct req_que * req,struct logio_entry_24xx * logio)2086 qla24xx_logio_entry(scsi_qla_host_t *vha, struct req_que *req,
2087 struct logio_entry_24xx *logio)
2088 {
2089 const char func[] = "LOGIO-IOCB";
2090 const char *type;
2091 fc_port_t *fcport;
2092 srb_t *sp;
2093 struct srb_iocb *lio;
2094 uint16_t *data;
2095 uint32_t iop[2];
2096
2097 sp = qla2x00_get_sp_from_handle(vha, func, req, logio);
2098 if (!sp)
2099 return;
2100
2101 lio = &sp->u.iocb_cmd;
2102 type = sp->name;
2103 fcport = sp->fcport;
2104 data = lio->u.logio.data;
2105
2106 data[0] = MBS_COMMAND_ERROR;
2107 data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
2108 QLA_LOGIO_LOGIN_RETRIED : 0;
2109 if (logio->entry_status) {
2110 ql_log(ql_log_warn, fcport->vha, 0x5034,
2111 "Async-%s error entry - %8phC hdl=%x"
2112 "portid=%02x%02x%02x entry-status=%x.\n",
2113 type, fcport->port_name, sp->handle, fcport->d_id.b.domain,
2114 fcport->d_id.b.area, fcport->d_id.b.al_pa,
2115 logio->entry_status);
2116 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x504d,
2117 logio, sizeof(*logio));
2118
2119 goto logio_done;
2120 }
2121
2122 if (le16_to_cpu(logio->comp_status) == CS_COMPLETE) {
2123 ql_dbg(ql_dbg_async, sp->vha, 0x5036,
2124 "Async-%s complete: handle=%x pid=%06x wwpn=%8phC iop0=%x\n",
2125 type, sp->handle, fcport->d_id.b24, fcport->port_name,
2126 le32_to_cpu(logio->io_parameter[0]));
2127
2128 vha->hw->exch_starvation = 0;
2129 data[0] = MBS_COMMAND_COMPLETE;
2130
2131 if (sp->type == SRB_PRLI_CMD) {
2132 lio->u.logio.iop[0] =
2133 le32_to_cpu(logio->io_parameter[0]);
2134 lio->u.logio.iop[1] =
2135 le32_to_cpu(logio->io_parameter[1]);
2136 goto logio_done;
2137 }
2138
2139 if (sp->type != SRB_LOGIN_CMD)
2140 goto logio_done;
2141
2142 iop[0] = le32_to_cpu(logio->io_parameter[0]);
2143 if (iop[0] & BIT_4) {
2144 fcport->port_type = FCT_TARGET;
2145 if (iop[0] & BIT_8)
2146 fcport->flags |= FCF_FCP2_DEVICE;
2147 } else if (iop[0] & BIT_5)
2148 fcport->port_type = FCT_INITIATOR;
2149
2150 if (iop[0] & BIT_7)
2151 fcport->flags |= FCF_CONF_COMP_SUPPORTED;
2152
2153 if (logio->io_parameter[7] || logio->io_parameter[8])
2154 fcport->supported_classes |= FC_COS_CLASS2;
2155 if (logio->io_parameter[9] || logio->io_parameter[10])
2156 fcport->supported_classes |= FC_COS_CLASS3;
2157
2158 goto logio_done;
2159 }
2160
2161 iop[0] = le32_to_cpu(logio->io_parameter[0]);
2162 iop[1] = le32_to_cpu(logio->io_parameter[1]);
2163 lio->u.logio.iop[0] = iop[0];
2164 lio->u.logio.iop[1] = iop[1];
2165 switch (iop[0]) {
2166 case LSC_SCODE_PORTID_USED:
2167 data[0] = MBS_PORT_ID_USED;
2168 data[1] = LSW(iop[1]);
2169 break;
2170 case LSC_SCODE_NPORT_USED:
2171 data[0] = MBS_LOOP_ID_USED;
2172 break;
2173 case LSC_SCODE_CMD_FAILED:
2174 if (iop[1] == 0x0606) {
2175 /*
2176 * PLOGI/PRLI Completed. We must have Recv PLOGI/PRLI,
2177 * Target side acked.
2178 */
2179 data[0] = MBS_COMMAND_COMPLETE;
2180 goto logio_done;
2181 }
2182 data[0] = MBS_COMMAND_ERROR;
2183 break;
2184 case LSC_SCODE_NOXCB:
2185 vha->hw->exch_starvation++;
2186 if (vha->hw->exch_starvation > 5) {
2187 ql_log(ql_log_warn, vha, 0xd046,
2188 "Exchange starvation. Resetting RISC\n");
2189
2190 vha->hw->exch_starvation = 0;
2191
2192 if (IS_P3P_TYPE(vha->hw))
2193 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
2194 else
2195 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2196 qla2xxx_wake_dpc(vha);
2197 }
2198 fallthrough;
2199 default:
2200 data[0] = MBS_COMMAND_ERROR;
2201 break;
2202 }
2203
2204 ql_dbg(ql_dbg_async, sp->vha, 0x5037,
2205 "Async-%s failed: handle=%x pid=%06x wwpn=%8phC comp_status=%x iop0=%x iop1=%x\n",
2206 type, sp->handle, fcport->d_id.b24, fcport->port_name,
2207 le16_to_cpu(logio->comp_status),
2208 le32_to_cpu(logio->io_parameter[0]),
2209 le32_to_cpu(logio->io_parameter[1]));
2210
2211 logio_done:
2212 sp->done(sp, 0);
2213 }
2214
2215 static void
qla24xx_tm_iocb_entry(scsi_qla_host_t * vha,struct req_que * req,void * tsk)2216 qla24xx_tm_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, void *tsk)
2217 {
2218 const char func[] = "TMF-IOCB";
2219 const char *type;
2220 fc_port_t *fcport;
2221 srb_t *sp;
2222 struct srb_iocb *iocb;
2223 struct sts_entry_24xx *sts = (struct sts_entry_24xx *)tsk;
2224
2225 sp = qla2x00_get_sp_from_handle(vha, func, req, tsk);
2226 if (!sp)
2227 return;
2228
2229 iocb = &sp->u.iocb_cmd;
2230 type = sp->name;
2231 fcport = sp->fcport;
2232 iocb->u.tmf.data = QLA_SUCCESS;
2233
2234 if (sts->entry_status) {
2235 ql_log(ql_log_warn, fcport->vha, 0x5038,
2236 "Async-%s error - hdl=%x entry-status(%x).\n",
2237 type, sp->handle, sts->entry_status);
2238 iocb->u.tmf.data = QLA_FUNCTION_FAILED;
2239 } else if (sts->comp_status != cpu_to_le16(CS_COMPLETE)) {
2240 ql_log(ql_log_warn, fcport->vha, 0x5039,
2241 "Async-%s error - hdl=%x completion status(%x).\n",
2242 type, sp->handle, sts->comp_status);
2243 iocb->u.tmf.data = QLA_FUNCTION_FAILED;
2244 } else if ((le16_to_cpu(sts->scsi_status) &
2245 SS_RESPONSE_INFO_LEN_VALID)) {
2246 host_to_fcp_swap(sts->data, sizeof(sts->data));
2247 if (le32_to_cpu(sts->rsp_data_len) < 4) {
2248 ql_log(ql_log_warn, fcport->vha, 0x503b,
2249 "Async-%s error - hdl=%x not enough response(%d).\n",
2250 type, sp->handle, sts->rsp_data_len);
2251 } else if (sts->data[3]) {
2252 ql_log(ql_log_warn, fcport->vha, 0x503c,
2253 "Async-%s error - hdl=%x response(%x).\n",
2254 type, sp->handle, sts->data[3]);
2255 iocb->u.tmf.data = QLA_FUNCTION_FAILED;
2256 }
2257 }
2258
2259 if (iocb->u.tmf.data != QLA_SUCCESS)
2260 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, sp->vha, 0x5055,
2261 sts, sizeof(*sts));
2262
2263 sp->done(sp, 0);
2264 }
2265
qla24xx_nvme_iocb_entry(scsi_qla_host_t * vha,struct req_que * req,void * tsk,srb_t * sp)2266 static void qla24xx_nvme_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
2267 void *tsk, srb_t *sp)
2268 {
2269 fc_port_t *fcport;
2270 struct srb_iocb *iocb;
2271 struct sts_entry_24xx *sts = (struct sts_entry_24xx *)tsk;
2272 uint16_t state_flags;
2273 struct nvmefc_fcp_req *fd;
2274 uint16_t ret = QLA_SUCCESS;
2275 __le16 comp_status = sts->comp_status;
2276 int logit = 0;
2277
2278 iocb = &sp->u.iocb_cmd;
2279 fcport = sp->fcport;
2280 iocb->u.nvme.comp_status = comp_status;
2281 state_flags = le16_to_cpu(sts->state_flags);
2282 fd = iocb->u.nvme.desc;
2283
2284 if (unlikely(iocb->u.nvme.aen_op))
2285 atomic_dec(&sp->vha->hw->nvme_active_aen_cnt);
2286
2287 if (unlikely(comp_status != CS_COMPLETE))
2288 logit = 1;
2289
2290 fd->transferred_length = fd->payload_length -
2291 le32_to_cpu(sts->residual_len);
2292
2293 /*
2294 * State flags: Bit 6 and 0.
2295 * If 0 is set, we don't care about 6.
2296 * both cases resp was dma'd to host buffer
2297 * if both are 0, that is good path case.
2298 * if six is set and 0 is clear, we need to
2299 * copy resp data from status iocb to resp buffer.
2300 */
2301 if (!(state_flags & (SF_FCP_RSP_DMA | SF_NVME_ERSP))) {
2302 iocb->u.nvme.rsp_pyld_len = 0;
2303 } else if ((state_flags & (SF_FCP_RSP_DMA | SF_NVME_ERSP)) ==
2304 (SF_FCP_RSP_DMA | SF_NVME_ERSP)) {
2305 /* Response already DMA'd to fd->rspaddr. */
2306 iocb->u.nvme.rsp_pyld_len = sts->nvme_rsp_pyld_len;
2307 } else if ((state_flags & SF_FCP_RSP_DMA)) {
2308 /*
2309 * Non-zero value in first 12 bytes of NVMe_RSP IU, treat this
2310 * as an error.
2311 */
2312 iocb->u.nvme.rsp_pyld_len = 0;
2313 fd->transferred_length = 0;
2314 ql_dbg(ql_dbg_io, fcport->vha, 0x307a,
2315 "Unexpected values in NVMe_RSP IU.\n");
2316 logit = 1;
2317 } else if (state_flags & SF_NVME_ERSP) {
2318 uint32_t *inbuf, *outbuf;
2319 uint16_t iter;
2320
2321 inbuf = (uint32_t *)&sts->nvme_ersp_data;
2322 outbuf = (uint32_t *)fd->rspaddr;
2323 iocb->u.nvme.rsp_pyld_len = sts->nvme_rsp_pyld_len;
2324 if (unlikely(le16_to_cpu(iocb->u.nvme.rsp_pyld_len) >
2325 sizeof(struct nvme_fc_ersp_iu))) {
2326 if (ql_mask_match(ql_dbg_io)) {
2327 WARN_ONCE(1, "Unexpected response payload length %u.\n",
2328 iocb->u.nvme.rsp_pyld_len);
2329 ql_log(ql_log_warn, fcport->vha, 0x5100,
2330 "Unexpected response payload length %u.\n",
2331 iocb->u.nvme.rsp_pyld_len);
2332 }
2333 iocb->u.nvme.rsp_pyld_len =
2334 cpu_to_le16(sizeof(struct nvme_fc_ersp_iu));
2335 }
2336 iter = le16_to_cpu(iocb->u.nvme.rsp_pyld_len) >> 2;
2337 for (; iter; iter--)
2338 *outbuf++ = swab32(*inbuf++);
2339 }
2340
2341 if (state_flags & SF_NVME_ERSP) {
2342 struct nvme_fc_ersp_iu *rsp_iu = fd->rspaddr;
2343 u32 tgt_xfer_len;
2344
2345 tgt_xfer_len = be32_to_cpu(rsp_iu->xfrd_len);
2346 if (fd->transferred_length != tgt_xfer_len) {
2347 ql_dbg(ql_dbg_io, fcport->vha, 0x3079,
2348 "Dropped frame(s) detected (sent/rcvd=%u/%u).\n",
2349 tgt_xfer_len, fd->transferred_length);
2350 logit = 1;
2351 } else if (le16_to_cpu(comp_status) == CS_DATA_UNDERRUN) {
2352 /*
2353 * Do not log if this is just an underflow and there
2354 * is no data loss.
2355 */
2356 logit = 0;
2357 }
2358 }
2359
2360 if (unlikely(logit))
2361 ql_log(ql_log_warn, fcport->vha, 0x5060,
2362 "NVME-%s ERR Handling - hdl=%x status(%x) tr_len:%x resid=%x ox_id=%x\n",
2363 sp->name, sp->handle, comp_status,
2364 fd->transferred_length, le32_to_cpu(sts->residual_len),
2365 sts->ox_id);
2366
2367 /*
2368 * If transport error then Failure (HBA rejects request)
2369 * otherwise transport will handle.
2370 */
2371 switch (le16_to_cpu(comp_status)) {
2372 case CS_COMPLETE:
2373 break;
2374
2375 case CS_RESET:
2376 case CS_PORT_UNAVAILABLE:
2377 case CS_PORT_LOGGED_OUT:
2378 fcport->nvme_flag |= NVME_FLAG_RESETTING;
2379 fallthrough;
2380 case CS_ABORTED:
2381 case CS_PORT_BUSY:
2382 fd->transferred_length = 0;
2383 iocb->u.nvme.rsp_pyld_len = 0;
2384 ret = QLA_ABORTED;
2385 break;
2386 case CS_DATA_UNDERRUN:
2387 break;
2388 default:
2389 ret = QLA_FUNCTION_FAILED;
2390 break;
2391 }
2392 sp->done(sp, ret);
2393 }
2394
qla_ctrlvp_completed(scsi_qla_host_t * vha,struct req_que * req,struct vp_ctrl_entry_24xx * vce)2395 static void qla_ctrlvp_completed(scsi_qla_host_t *vha, struct req_que *req,
2396 struct vp_ctrl_entry_24xx *vce)
2397 {
2398 const char func[] = "CTRLVP-IOCB";
2399 srb_t *sp;
2400 int rval = QLA_SUCCESS;
2401
2402 sp = qla2x00_get_sp_from_handle(vha, func, req, vce);
2403 if (!sp)
2404 return;
2405
2406 if (vce->entry_status != 0) {
2407 ql_dbg(ql_dbg_vport, vha, 0x10c4,
2408 "%s: Failed to complete IOCB -- error status (%x)\n",
2409 sp->name, vce->entry_status);
2410 rval = QLA_FUNCTION_FAILED;
2411 } else if (vce->comp_status != cpu_to_le16(CS_COMPLETE)) {
2412 ql_dbg(ql_dbg_vport, vha, 0x10c5,
2413 "%s: Failed to complete IOCB -- completion status (%x) vpidx %x\n",
2414 sp->name, le16_to_cpu(vce->comp_status),
2415 le16_to_cpu(vce->vp_idx_failed));
2416 rval = QLA_FUNCTION_FAILED;
2417 } else {
2418 ql_dbg(ql_dbg_vport, vha, 0x10c6,
2419 "Done %s.\n", __func__);
2420 }
2421
2422 sp->rc = rval;
2423 sp->done(sp, rval);
2424 }
2425
2426 /* Process a single response queue entry. */
qla2x00_process_response_entry(struct scsi_qla_host * vha,struct rsp_que * rsp,sts_entry_t * pkt)2427 static void qla2x00_process_response_entry(struct scsi_qla_host *vha,
2428 struct rsp_que *rsp,
2429 sts_entry_t *pkt)
2430 {
2431 sts21_entry_t *sts21_entry;
2432 sts22_entry_t *sts22_entry;
2433 uint16_t handle_cnt;
2434 uint16_t cnt;
2435
2436 switch (pkt->entry_type) {
2437 case STATUS_TYPE:
2438 qla2x00_status_entry(vha, rsp, pkt);
2439 break;
2440 case STATUS_TYPE_21:
2441 sts21_entry = (sts21_entry_t *)pkt;
2442 handle_cnt = sts21_entry->handle_count;
2443 for (cnt = 0; cnt < handle_cnt; cnt++)
2444 qla2x00_process_completed_request(vha, rsp->req,
2445 sts21_entry->handle[cnt]);
2446 break;
2447 case STATUS_TYPE_22:
2448 sts22_entry = (sts22_entry_t *)pkt;
2449 handle_cnt = sts22_entry->handle_count;
2450 for (cnt = 0; cnt < handle_cnt; cnt++)
2451 qla2x00_process_completed_request(vha, rsp->req,
2452 sts22_entry->handle[cnt]);
2453 break;
2454 case STATUS_CONT_TYPE:
2455 qla2x00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt);
2456 break;
2457 case MBX_IOCB_TYPE:
2458 qla2x00_mbx_iocb_entry(vha, rsp->req, (struct mbx_entry *)pkt);
2459 break;
2460 case CT_IOCB_TYPE:
2461 qla2x00_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE);
2462 break;
2463 default:
2464 /* Type Not Supported. */
2465 ql_log(ql_log_warn, vha, 0x504a,
2466 "Received unknown response pkt type %x entry status=%x.\n",
2467 pkt->entry_type, pkt->entry_status);
2468 break;
2469 }
2470 }
2471
2472 /**
2473 * qla2x00_process_response_queue() - Process response queue entries.
2474 * @rsp: response queue
2475 */
2476 void
qla2x00_process_response_queue(struct rsp_que * rsp)2477 qla2x00_process_response_queue(struct rsp_que *rsp)
2478 {
2479 struct scsi_qla_host *vha;
2480 struct qla_hw_data *ha = rsp->hw;
2481 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2482 sts_entry_t *pkt;
2483
2484 vha = pci_get_drvdata(ha->pdev);
2485
2486 if (!vha->flags.online)
2487 return;
2488
2489 while (rsp->ring_ptr->signature != RESPONSE_PROCESSED) {
2490 pkt = (sts_entry_t *)rsp->ring_ptr;
2491
2492 rsp->ring_index++;
2493 if (rsp->ring_index == rsp->length) {
2494 rsp->ring_index = 0;
2495 rsp->ring_ptr = rsp->ring;
2496 } else {
2497 rsp->ring_ptr++;
2498 }
2499
2500 if (pkt->entry_status != 0) {
2501 qla2x00_error_entry(vha, rsp, pkt);
2502 ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
2503 wmb();
2504 continue;
2505 }
2506
2507 qla2x00_process_response_entry(vha, rsp, pkt);
2508 ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
2509 wmb();
2510 }
2511
2512 /* Adjust ring index */
2513 wrt_reg_word(ISP_RSP_Q_OUT(ha, reg), rsp->ring_index);
2514 }
2515
2516 static inline void
qla2x00_handle_sense(srb_t * sp,uint8_t * sense_data,uint32_t par_sense_len,uint32_t sense_len,struct rsp_que * rsp,int res)2517 qla2x00_handle_sense(srb_t *sp, uint8_t *sense_data, uint32_t par_sense_len,
2518 uint32_t sense_len, struct rsp_que *rsp, int res)
2519 {
2520 struct scsi_qla_host *vha = sp->vha;
2521 struct scsi_cmnd *cp = GET_CMD_SP(sp);
2522 uint32_t track_sense_len;
2523
2524 if (sense_len >= SCSI_SENSE_BUFFERSIZE)
2525 sense_len = SCSI_SENSE_BUFFERSIZE;
2526
2527 SET_CMD_SENSE_LEN(sp, sense_len);
2528 SET_CMD_SENSE_PTR(sp, cp->sense_buffer);
2529 track_sense_len = sense_len;
2530
2531 if (sense_len > par_sense_len)
2532 sense_len = par_sense_len;
2533
2534 memcpy(cp->sense_buffer, sense_data, sense_len);
2535
2536 SET_CMD_SENSE_PTR(sp, cp->sense_buffer + sense_len);
2537 track_sense_len -= sense_len;
2538 SET_CMD_SENSE_LEN(sp, track_sense_len);
2539
2540 if (track_sense_len != 0) {
2541 rsp->status_srb = sp;
2542 cp->result = res;
2543 }
2544
2545 if (sense_len) {
2546 ql_dbg(ql_dbg_io + ql_dbg_buffer, vha, 0x301c,
2547 "Check condition Sense data, nexus%ld:%d:%llu cmd=%p.\n",
2548 sp->vha->host_no, cp->device->id, cp->device->lun,
2549 cp);
2550 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302b,
2551 cp->sense_buffer, sense_len);
2552 }
2553 }
2554
2555 struct scsi_dif_tuple {
2556 __be16 guard; /* Checksum */
2557 __be16 app_tag; /* APPL identifier */
2558 __be32 ref_tag; /* Target LBA or indirect LBA */
2559 };
2560
2561 /*
2562 * Checks the guard or meta-data for the type of error
2563 * detected by the HBA. In case of errors, we set the
2564 * ASC/ASCQ fields in the sense buffer with ILLEGAL_REQUEST
2565 * to indicate to the kernel that the HBA detected error.
2566 */
2567 static inline int
qla2x00_handle_dif_error(srb_t * sp,struct sts_entry_24xx * sts24)2568 qla2x00_handle_dif_error(srb_t *sp, struct sts_entry_24xx *sts24)
2569 {
2570 struct scsi_qla_host *vha = sp->vha;
2571 struct scsi_cmnd *cmd = GET_CMD_SP(sp);
2572 uint8_t *ap = &sts24->data[12];
2573 uint8_t *ep = &sts24->data[20];
2574 uint32_t e_ref_tag, a_ref_tag;
2575 uint16_t e_app_tag, a_app_tag;
2576 uint16_t e_guard, a_guard;
2577
2578 /*
2579 * swab32 of the "data" field in the beginning of qla2x00_status_entry()
2580 * would make guard field appear at offset 2
2581 */
2582 a_guard = get_unaligned_le16(ap + 2);
2583 a_app_tag = get_unaligned_le16(ap + 0);
2584 a_ref_tag = get_unaligned_le32(ap + 4);
2585 e_guard = get_unaligned_le16(ep + 2);
2586 e_app_tag = get_unaligned_le16(ep + 0);
2587 e_ref_tag = get_unaligned_le32(ep + 4);
2588
2589 ql_dbg(ql_dbg_io, vha, 0x3023,
2590 "iocb(s) %p Returned STATUS.\n", sts24);
2591
2592 ql_dbg(ql_dbg_io, vha, 0x3024,
2593 "DIF ERROR in cmd 0x%x lba 0x%llx act ref"
2594 " tag=0x%x, exp ref_tag=0x%x, act app tag=0x%x, exp app"
2595 " tag=0x%x, act guard=0x%x, exp guard=0x%x.\n",
2596 cmd->cmnd[0], (u64)scsi_get_lba(cmd), a_ref_tag, e_ref_tag,
2597 a_app_tag, e_app_tag, a_guard, e_guard);
2598
2599 /*
2600 * Ignore sector if:
2601 * For type 3: ref & app tag is all 'f's
2602 * For type 0,1,2: app tag is all 'f's
2603 */
2604 if (a_app_tag == be16_to_cpu(T10_PI_APP_ESCAPE) &&
2605 (scsi_get_prot_type(cmd) != SCSI_PROT_DIF_TYPE3 ||
2606 a_ref_tag == be32_to_cpu(T10_PI_REF_ESCAPE))) {
2607 uint32_t blocks_done, resid;
2608 sector_t lba_s = scsi_get_lba(cmd);
2609
2610 /* 2TB boundary case covered automatically with this */
2611 blocks_done = e_ref_tag - (uint32_t)lba_s + 1;
2612
2613 resid = scsi_bufflen(cmd) - (blocks_done *
2614 cmd->device->sector_size);
2615
2616 scsi_set_resid(cmd, resid);
2617 cmd->result = DID_OK << 16;
2618
2619 /* Update protection tag */
2620 if (scsi_prot_sg_count(cmd)) {
2621 uint32_t i, j = 0, k = 0, num_ent;
2622 struct scatterlist *sg;
2623 struct t10_pi_tuple *spt;
2624
2625 /* Patch the corresponding protection tags */
2626 scsi_for_each_prot_sg(cmd, sg,
2627 scsi_prot_sg_count(cmd), i) {
2628 num_ent = sg_dma_len(sg) / 8;
2629 if (k + num_ent < blocks_done) {
2630 k += num_ent;
2631 continue;
2632 }
2633 j = blocks_done - k - 1;
2634 k = blocks_done;
2635 break;
2636 }
2637
2638 if (k != blocks_done) {
2639 ql_log(ql_log_warn, vha, 0x302f,
2640 "unexpected tag values tag:lba=%x:%llx)\n",
2641 e_ref_tag, (unsigned long long)lba_s);
2642 return 1;
2643 }
2644
2645 spt = page_address(sg_page(sg)) + sg->offset;
2646 spt += j;
2647
2648 spt->app_tag = T10_PI_APP_ESCAPE;
2649 if (scsi_get_prot_type(cmd) == SCSI_PROT_DIF_TYPE3)
2650 spt->ref_tag = T10_PI_REF_ESCAPE;
2651 }
2652
2653 return 0;
2654 }
2655
2656 /* check guard */
2657 if (e_guard != a_guard) {
2658 scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
2659 0x10, 0x1);
2660 set_driver_byte(cmd, DRIVER_SENSE);
2661 set_host_byte(cmd, DID_ABORT);
2662 cmd->result |= SAM_STAT_CHECK_CONDITION;
2663 return 1;
2664 }
2665
2666 /* check ref tag */
2667 if (e_ref_tag != a_ref_tag) {
2668 scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
2669 0x10, 0x3);
2670 set_driver_byte(cmd, DRIVER_SENSE);
2671 set_host_byte(cmd, DID_ABORT);
2672 cmd->result |= SAM_STAT_CHECK_CONDITION;
2673 return 1;
2674 }
2675
2676 /* check appl tag */
2677 if (e_app_tag != a_app_tag) {
2678 scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
2679 0x10, 0x2);
2680 set_driver_byte(cmd, DRIVER_SENSE);
2681 set_host_byte(cmd, DID_ABORT);
2682 cmd->result |= SAM_STAT_CHECK_CONDITION;
2683 return 1;
2684 }
2685
2686 return 1;
2687 }
2688
2689 static void
qla25xx_process_bidir_status_iocb(scsi_qla_host_t * vha,void * pkt,struct req_que * req,uint32_t index)2690 qla25xx_process_bidir_status_iocb(scsi_qla_host_t *vha, void *pkt,
2691 struct req_que *req, uint32_t index)
2692 {
2693 struct qla_hw_data *ha = vha->hw;
2694 srb_t *sp;
2695 uint16_t comp_status;
2696 uint16_t scsi_status;
2697 uint16_t thread_id;
2698 uint32_t rval = EXT_STATUS_OK;
2699 struct bsg_job *bsg_job = NULL;
2700 struct fc_bsg_request *bsg_request;
2701 struct fc_bsg_reply *bsg_reply;
2702 sts_entry_t *sts = pkt;
2703 struct sts_entry_24xx *sts24 = pkt;
2704
2705 /* Validate handle. */
2706 if (index >= req->num_outstanding_cmds) {
2707 ql_log(ql_log_warn, vha, 0x70af,
2708 "Invalid SCSI completion handle 0x%x.\n", index);
2709 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2710 return;
2711 }
2712
2713 sp = req->outstanding_cmds[index];
2714 if (!sp) {
2715 ql_log(ql_log_warn, vha, 0x70b0,
2716 "Req:%d: Invalid ISP SCSI completion handle(0x%x)\n",
2717 req->id, index);
2718
2719 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2720 return;
2721 }
2722
2723 /* Free outstanding command slot. */
2724 req->outstanding_cmds[index] = NULL;
2725 bsg_job = sp->u.bsg_job;
2726 bsg_request = bsg_job->request;
2727 bsg_reply = bsg_job->reply;
2728
2729 if (IS_FWI2_CAPABLE(ha)) {
2730 comp_status = le16_to_cpu(sts24->comp_status);
2731 scsi_status = le16_to_cpu(sts24->scsi_status) & SS_MASK;
2732 } else {
2733 comp_status = le16_to_cpu(sts->comp_status);
2734 scsi_status = le16_to_cpu(sts->scsi_status) & SS_MASK;
2735 }
2736
2737 thread_id = bsg_request->rqst_data.h_vendor.vendor_cmd[1];
2738 switch (comp_status) {
2739 case CS_COMPLETE:
2740 if (scsi_status == 0) {
2741 bsg_reply->reply_payload_rcv_len =
2742 bsg_job->reply_payload.payload_len;
2743 vha->qla_stats.input_bytes +=
2744 bsg_reply->reply_payload_rcv_len;
2745 vha->qla_stats.input_requests++;
2746 rval = EXT_STATUS_OK;
2747 }
2748 goto done;
2749
2750 case CS_DATA_OVERRUN:
2751 ql_dbg(ql_dbg_user, vha, 0x70b1,
2752 "Command completed with data overrun thread_id=%d\n",
2753 thread_id);
2754 rval = EXT_STATUS_DATA_OVERRUN;
2755 break;
2756
2757 case CS_DATA_UNDERRUN:
2758 ql_dbg(ql_dbg_user, vha, 0x70b2,
2759 "Command completed with data underrun thread_id=%d\n",
2760 thread_id);
2761 rval = EXT_STATUS_DATA_UNDERRUN;
2762 break;
2763 case CS_BIDIR_RD_OVERRUN:
2764 ql_dbg(ql_dbg_user, vha, 0x70b3,
2765 "Command completed with read data overrun thread_id=%d\n",
2766 thread_id);
2767 rval = EXT_STATUS_DATA_OVERRUN;
2768 break;
2769
2770 case CS_BIDIR_RD_WR_OVERRUN:
2771 ql_dbg(ql_dbg_user, vha, 0x70b4,
2772 "Command completed with read and write data overrun "
2773 "thread_id=%d\n", thread_id);
2774 rval = EXT_STATUS_DATA_OVERRUN;
2775 break;
2776
2777 case CS_BIDIR_RD_OVERRUN_WR_UNDERRUN:
2778 ql_dbg(ql_dbg_user, vha, 0x70b5,
2779 "Command completed with read data over and write data "
2780 "underrun thread_id=%d\n", thread_id);
2781 rval = EXT_STATUS_DATA_OVERRUN;
2782 break;
2783
2784 case CS_BIDIR_RD_UNDERRUN:
2785 ql_dbg(ql_dbg_user, vha, 0x70b6,
2786 "Command completed with read data underrun "
2787 "thread_id=%d\n", thread_id);
2788 rval = EXT_STATUS_DATA_UNDERRUN;
2789 break;
2790
2791 case CS_BIDIR_RD_UNDERRUN_WR_OVERRUN:
2792 ql_dbg(ql_dbg_user, vha, 0x70b7,
2793 "Command completed with read data under and write data "
2794 "overrun thread_id=%d\n", thread_id);
2795 rval = EXT_STATUS_DATA_UNDERRUN;
2796 break;
2797
2798 case CS_BIDIR_RD_WR_UNDERRUN:
2799 ql_dbg(ql_dbg_user, vha, 0x70b8,
2800 "Command completed with read and write data underrun "
2801 "thread_id=%d\n", thread_id);
2802 rval = EXT_STATUS_DATA_UNDERRUN;
2803 break;
2804
2805 case CS_BIDIR_DMA:
2806 ql_dbg(ql_dbg_user, vha, 0x70b9,
2807 "Command completed with data DMA error thread_id=%d\n",
2808 thread_id);
2809 rval = EXT_STATUS_DMA_ERR;
2810 break;
2811
2812 case CS_TIMEOUT:
2813 ql_dbg(ql_dbg_user, vha, 0x70ba,
2814 "Command completed with timeout thread_id=%d\n",
2815 thread_id);
2816 rval = EXT_STATUS_TIMEOUT;
2817 break;
2818 default:
2819 ql_dbg(ql_dbg_user, vha, 0x70bb,
2820 "Command completed with completion status=0x%x "
2821 "thread_id=%d\n", comp_status, thread_id);
2822 rval = EXT_STATUS_ERR;
2823 break;
2824 }
2825 bsg_reply->reply_payload_rcv_len = 0;
2826
2827 done:
2828 /* Return the vendor specific reply to API */
2829 bsg_reply->reply_data.vendor_reply.vendor_rsp[0] = rval;
2830 bsg_job->reply_len = sizeof(struct fc_bsg_reply);
2831 /* Always return DID_OK, bsg will send the vendor specific response
2832 * in this case only */
2833 sp->done(sp, DID_OK << 16);
2834
2835 }
2836
2837 /**
2838 * qla2x00_status_entry() - Process a Status IOCB entry.
2839 * @vha: SCSI driver HA context
2840 * @rsp: response queue
2841 * @pkt: Entry pointer
2842 */
2843 static void
qla2x00_status_entry(scsi_qla_host_t * vha,struct rsp_que * rsp,void * pkt)2844 qla2x00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt)
2845 {
2846 srb_t *sp;
2847 fc_port_t *fcport;
2848 struct scsi_cmnd *cp;
2849 sts_entry_t *sts = pkt;
2850 struct sts_entry_24xx *sts24 = pkt;
2851 uint16_t comp_status;
2852 uint16_t scsi_status;
2853 uint16_t ox_id;
2854 uint8_t lscsi_status;
2855 int32_t resid;
2856 uint32_t sense_len, par_sense_len, rsp_info_len, resid_len,
2857 fw_resid_len;
2858 uint8_t *rsp_info, *sense_data;
2859 struct qla_hw_data *ha = vha->hw;
2860 uint32_t handle;
2861 uint16_t que;
2862 struct req_que *req;
2863 int logit = 1;
2864 int res = 0;
2865 uint16_t state_flags = 0;
2866 uint16_t sts_qual = 0;
2867
2868 if (IS_FWI2_CAPABLE(ha)) {
2869 comp_status = le16_to_cpu(sts24->comp_status);
2870 scsi_status = le16_to_cpu(sts24->scsi_status) & SS_MASK;
2871 state_flags = le16_to_cpu(sts24->state_flags);
2872 } else {
2873 comp_status = le16_to_cpu(sts->comp_status);
2874 scsi_status = le16_to_cpu(sts->scsi_status) & SS_MASK;
2875 }
2876 handle = (uint32_t) LSW(sts->handle);
2877 que = MSW(sts->handle);
2878 req = ha->req_q_map[que];
2879
2880 /* Check for invalid queue pointer */
2881 if (req == NULL ||
2882 que >= find_first_zero_bit(ha->req_qid_map, ha->max_req_queues)) {
2883 ql_dbg(ql_dbg_io, vha, 0x3059,
2884 "Invalid status handle (0x%x): Bad req pointer. req=%p, "
2885 "que=%u.\n", sts->handle, req, que);
2886 return;
2887 }
2888
2889 /* Validate handle. */
2890 if (handle < req->num_outstanding_cmds) {
2891 sp = req->outstanding_cmds[handle];
2892 if (!sp) {
2893 ql_dbg(ql_dbg_io, vha, 0x3075,
2894 "%s(%ld): Already returned command for status handle (0x%x).\n",
2895 __func__, vha->host_no, sts->handle);
2896 return;
2897 }
2898 } else {
2899 ql_dbg(ql_dbg_io, vha, 0x3017,
2900 "Invalid status handle, out of range (0x%x).\n",
2901 sts->handle);
2902
2903 if (!test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) {
2904 if (IS_P3P_TYPE(ha))
2905 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
2906 else
2907 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2908 qla2xxx_wake_dpc(vha);
2909 }
2910 return;
2911 }
2912 qla_put_iocbs(sp->qpair, &sp->iores);
2913
2914 if (sp->cmd_type != TYPE_SRB) {
2915 req->outstanding_cmds[handle] = NULL;
2916 ql_dbg(ql_dbg_io, vha, 0x3015,
2917 "Unknown sp->cmd_type %x %p).\n",
2918 sp->cmd_type, sp);
2919 return;
2920 }
2921
2922 /* NVME completion. */
2923 if (sp->type == SRB_NVME_CMD) {
2924 req->outstanding_cmds[handle] = NULL;
2925 qla24xx_nvme_iocb_entry(vha, req, pkt, sp);
2926 return;
2927 }
2928
2929 if (unlikely((state_flags & BIT_1) && (sp->type == SRB_BIDI_CMD))) {
2930 qla25xx_process_bidir_status_iocb(vha, pkt, req, handle);
2931 return;
2932 }
2933
2934 /* Task Management completion. */
2935 if (sp->type == SRB_TM_CMD) {
2936 qla24xx_tm_iocb_entry(vha, req, pkt);
2937 return;
2938 }
2939
2940 /* Fast path completion. */
2941 if (comp_status == CS_COMPLETE && scsi_status == 0) {
2942 qla2x00_process_completed_request(vha, req, handle);
2943
2944 return;
2945 }
2946
2947 req->outstanding_cmds[handle] = NULL;
2948 cp = GET_CMD_SP(sp);
2949 if (cp == NULL) {
2950 ql_dbg(ql_dbg_io, vha, 0x3018,
2951 "Command already returned (0x%x/%p).\n",
2952 sts->handle, sp);
2953
2954 return;
2955 }
2956
2957 lscsi_status = scsi_status & STATUS_MASK;
2958
2959 fcport = sp->fcport;
2960
2961 ox_id = 0;
2962 sense_len = par_sense_len = rsp_info_len = resid_len =
2963 fw_resid_len = 0;
2964 if (IS_FWI2_CAPABLE(ha)) {
2965 if (scsi_status & SS_SENSE_LEN_VALID)
2966 sense_len = le32_to_cpu(sts24->sense_len);
2967 if (scsi_status & SS_RESPONSE_INFO_LEN_VALID)
2968 rsp_info_len = le32_to_cpu(sts24->rsp_data_len);
2969 if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER))
2970 resid_len = le32_to_cpu(sts24->rsp_residual_count);
2971 if (comp_status == CS_DATA_UNDERRUN)
2972 fw_resid_len = le32_to_cpu(sts24->residual_len);
2973 rsp_info = sts24->data;
2974 sense_data = sts24->data;
2975 host_to_fcp_swap(sts24->data, sizeof(sts24->data));
2976 ox_id = le16_to_cpu(sts24->ox_id);
2977 par_sense_len = sizeof(sts24->data);
2978 sts_qual = le16_to_cpu(sts24->status_qualifier);
2979 } else {
2980 if (scsi_status & SS_SENSE_LEN_VALID)
2981 sense_len = le16_to_cpu(sts->req_sense_length);
2982 if (scsi_status & SS_RESPONSE_INFO_LEN_VALID)
2983 rsp_info_len = le16_to_cpu(sts->rsp_info_len);
2984 resid_len = le32_to_cpu(sts->residual_length);
2985 rsp_info = sts->rsp_info;
2986 sense_data = sts->req_sense_data;
2987 par_sense_len = sizeof(sts->req_sense_data);
2988 }
2989
2990 /* Check for any FCP transport errors. */
2991 if (scsi_status & SS_RESPONSE_INFO_LEN_VALID) {
2992 /* Sense data lies beyond any FCP RESPONSE data. */
2993 if (IS_FWI2_CAPABLE(ha)) {
2994 sense_data += rsp_info_len;
2995 par_sense_len -= rsp_info_len;
2996 }
2997 if (rsp_info_len > 3 && rsp_info[3]) {
2998 ql_dbg(ql_dbg_io, fcport->vha, 0x3019,
2999 "FCP I/O protocol failure (0x%x/0x%x).\n",
3000 rsp_info_len, rsp_info[3]);
3001
3002 res = DID_BUS_BUSY << 16;
3003 goto out;
3004 }
3005 }
3006
3007 /* Check for overrun. */
3008 if (IS_FWI2_CAPABLE(ha) && comp_status == CS_COMPLETE &&
3009 scsi_status & SS_RESIDUAL_OVER)
3010 comp_status = CS_DATA_OVERRUN;
3011
3012 /*
3013 * Check retry_delay_timer value if we receive a busy or
3014 * queue full.
3015 */
3016 if (unlikely(lscsi_status == SAM_STAT_TASK_SET_FULL ||
3017 lscsi_status == SAM_STAT_BUSY))
3018 qla2x00_set_retry_delay_timestamp(fcport, sts_qual);
3019
3020 /*
3021 * Based on Host and scsi status generate status code for Linux
3022 */
3023 switch (comp_status) {
3024 case CS_COMPLETE:
3025 case CS_QUEUE_FULL:
3026 if (scsi_status == 0) {
3027 res = DID_OK << 16;
3028 break;
3029 }
3030 if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER)) {
3031 resid = resid_len;
3032 scsi_set_resid(cp, resid);
3033
3034 if (!lscsi_status &&
3035 ((unsigned)(scsi_bufflen(cp) - resid) <
3036 cp->underflow)) {
3037 ql_dbg(ql_dbg_io, fcport->vha, 0x301a,
3038 "Mid-layer underflow detected (0x%x of 0x%x bytes).\n",
3039 resid, scsi_bufflen(cp));
3040
3041 res = DID_ERROR << 16;
3042 break;
3043 }
3044 }
3045 res = DID_OK << 16 | lscsi_status;
3046
3047 if (lscsi_status == SAM_STAT_TASK_SET_FULL) {
3048 ql_dbg(ql_dbg_io, fcport->vha, 0x301b,
3049 "QUEUE FULL detected.\n");
3050 break;
3051 }
3052 logit = 0;
3053 if (lscsi_status != SS_CHECK_CONDITION)
3054 break;
3055
3056 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
3057 if (!(scsi_status & SS_SENSE_LEN_VALID))
3058 break;
3059
3060 qla2x00_handle_sense(sp, sense_data, par_sense_len, sense_len,
3061 rsp, res);
3062 break;
3063
3064 case CS_DATA_UNDERRUN:
3065 /* Use F/W calculated residual length. */
3066 resid = IS_FWI2_CAPABLE(ha) ? fw_resid_len : resid_len;
3067 scsi_set_resid(cp, resid);
3068 if (scsi_status & SS_RESIDUAL_UNDER) {
3069 if (IS_FWI2_CAPABLE(ha) && fw_resid_len != resid_len) {
3070 ql_dbg(ql_dbg_io, fcport->vha, 0x301d,
3071 "Dropped frame(s) detected (0x%x of 0x%x bytes).\n",
3072 resid, scsi_bufflen(cp));
3073
3074 res = DID_ERROR << 16 | lscsi_status;
3075 goto check_scsi_status;
3076 }
3077
3078 if (!lscsi_status &&
3079 ((unsigned)(scsi_bufflen(cp) - resid) <
3080 cp->underflow)) {
3081 ql_dbg(ql_dbg_io, fcport->vha, 0x301e,
3082 "Mid-layer underflow detected (0x%x of 0x%x bytes).\n",
3083 resid, scsi_bufflen(cp));
3084
3085 res = DID_ERROR << 16;
3086 break;
3087 }
3088 } else if (lscsi_status != SAM_STAT_TASK_SET_FULL &&
3089 lscsi_status != SAM_STAT_BUSY) {
3090 /*
3091 * scsi status of task set and busy are considered to be
3092 * task not completed.
3093 */
3094
3095 ql_dbg(ql_dbg_io, fcport->vha, 0x301f,
3096 "Dropped frame(s) detected (0x%x of 0x%x bytes).\n",
3097 resid, scsi_bufflen(cp));
3098
3099 res = DID_ERROR << 16 | lscsi_status;
3100 goto check_scsi_status;
3101 } else {
3102 ql_dbg(ql_dbg_io, fcport->vha, 0x3030,
3103 "scsi_status: 0x%x, lscsi_status: 0x%x\n",
3104 scsi_status, lscsi_status);
3105 }
3106
3107 res = DID_OK << 16 | lscsi_status;
3108 logit = 0;
3109
3110 check_scsi_status:
3111 /*
3112 * Check to see if SCSI Status is non zero. If so report SCSI
3113 * Status.
3114 */
3115 if (lscsi_status != 0) {
3116 if (lscsi_status == SAM_STAT_TASK_SET_FULL) {
3117 ql_dbg(ql_dbg_io, fcport->vha, 0x3020,
3118 "QUEUE FULL detected.\n");
3119 logit = 1;
3120 break;
3121 }
3122 if (lscsi_status != SS_CHECK_CONDITION)
3123 break;
3124
3125 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
3126 if (!(scsi_status & SS_SENSE_LEN_VALID))
3127 break;
3128
3129 qla2x00_handle_sense(sp, sense_data, par_sense_len,
3130 sense_len, rsp, res);
3131 }
3132 break;
3133
3134 case CS_PORT_LOGGED_OUT:
3135 case CS_PORT_CONFIG_CHG:
3136 case CS_PORT_BUSY:
3137 case CS_INCOMPLETE:
3138 case CS_PORT_UNAVAILABLE:
3139 case CS_RESET:
3140
3141 /*
3142 * We are going to have the fc class block the rport
3143 * while we try to recover so instruct the mid layer
3144 * to requeue until the class decides how to handle this.
3145 */
3146 res = DID_TRANSPORT_DISRUPTED << 16;
3147
3148 if (comp_status == CS_TIMEOUT) {
3149 if (IS_FWI2_CAPABLE(ha))
3150 break;
3151 else if ((le16_to_cpu(sts->status_flags) &
3152 SF_LOGOUT_SENT) == 0)
3153 break;
3154 }
3155
3156 if (atomic_read(&fcport->state) == FCS_ONLINE) {
3157 ql_dbg(ql_dbg_disc, fcport->vha, 0x3021,
3158 "Port to be marked lost on fcport=%02x%02x%02x, current "
3159 "port state= %s comp_status %x.\n", fcport->d_id.b.domain,
3160 fcport->d_id.b.area, fcport->d_id.b.al_pa,
3161 port_state_str[FCS_ONLINE],
3162 comp_status);
3163
3164 qlt_schedule_sess_for_deletion(fcport);
3165 }
3166
3167 break;
3168
3169 case CS_ABORTED:
3170 res = DID_RESET << 16;
3171 break;
3172
3173 case CS_DIF_ERROR:
3174 logit = qla2x00_handle_dif_error(sp, sts24);
3175 res = cp->result;
3176 break;
3177
3178 case CS_TRANSPORT:
3179 res = DID_ERROR << 16;
3180
3181 if (!IS_PI_SPLIT_DET_CAPABLE(ha))
3182 break;
3183
3184 if (state_flags & BIT_4)
3185 scmd_printk(KERN_WARNING, cp,
3186 "Unsupported device '%s' found.\n",
3187 cp->device->vendor);
3188 break;
3189
3190 case CS_DMA:
3191 ql_log(ql_log_info, fcport->vha, 0x3022,
3192 "CS_DMA error: 0x%x-0x%x (0x%x) nexus=%ld:%d:%llu portid=%06x oxid=0x%x cdb=%10phN len=0x%x rsp_info=0x%x resid=0x%x fw_resid=0x%x sp=%p cp=%p.\n",
3193 comp_status, scsi_status, res, vha->host_no,
3194 cp->device->id, cp->device->lun, fcport->d_id.b24,
3195 ox_id, cp->cmnd, scsi_bufflen(cp), rsp_info_len,
3196 resid_len, fw_resid_len, sp, cp);
3197 ql_dump_buffer(ql_dbg_tgt + ql_dbg_verbose, vha, 0xe0ee,
3198 pkt, sizeof(*sts24));
3199 res = DID_ERROR << 16;
3200 break;
3201 default:
3202 res = DID_ERROR << 16;
3203 break;
3204 }
3205
3206 out:
3207 if (logit)
3208 ql_dbg(ql_dbg_io, fcport->vha, 0x3022,
3209 "FCP command status: 0x%x-0x%x (0x%x) nexus=%ld:%d:%llu "
3210 "portid=%02x%02x%02x oxid=0x%x cdb=%10phN len=0x%x "
3211 "rsp_info=0x%x resid=0x%x fw_resid=0x%x sp=%p cp=%p.\n",
3212 comp_status, scsi_status, res, vha->host_no,
3213 cp->device->id, cp->device->lun, fcport->d_id.b.domain,
3214 fcport->d_id.b.area, fcport->d_id.b.al_pa, ox_id,
3215 cp->cmnd, scsi_bufflen(cp), rsp_info_len,
3216 resid_len, fw_resid_len, sp, cp);
3217
3218 if (rsp->status_srb == NULL)
3219 sp->done(sp, res);
3220 }
3221
3222 /**
3223 * qla2x00_status_cont_entry() - Process a Status Continuations entry.
3224 * @rsp: response queue
3225 * @pkt: Entry pointer
3226 *
3227 * Extended sense data.
3228 */
3229 static void
qla2x00_status_cont_entry(struct rsp_que * rsp,sts_cont_entry_t * pkt)3230 qla2x00_status_cont_entry(struct rsp_que *rsp, sts_cont_entry_t *pkt)
3231 {
3232 uint8_t sense_sz = 0;
3233 struct qla_hw_data *ha = rsp->hw;
3234 struct scsi_qla_host *vha = pci_get_drvdata(ha->pdev);
3235 srb_t *sp = rsp->status_srb;
3236 struct scsi_cmnd *cp;
3237 uint32_t sense_len;
3238 uint8_t *sense_ptr;
3239
3240 if (!sp || !GET_CMD_SENSE_LEN(sp))
3241 return;
3242
3243 sense_len = GET_CMD_SENSE_LEN(sp);
3244 sense_ptr = GET_CMD_SENSE_PTR(sp);
3245
3246 cp = GET_CMD_SP(sp);
3247 if (cp == NULL) {
3248 ql_log(ql_log_warn, vha, 0x3025,
3249 "cmd is NULL: already returned to OS (sp=%p).\n", sp);
3250
3251 rsp->status_srb = NULL;
3252 return;
3253 }
3254
3255 if (sense_len > sizeof(pkt->data))
3256 sense_sz = sizeof(pkt->data);
3257 else
3258 sense_sz = sense_len;
3259
3260 /* Move sense data. */
3261 if (IS_FWI2_CAPABLE(ha))
3262 host_to_fcp_swap(pkt->data, sizeof(pkt->data));
3263 memcpy(sense_ptr, pkt->data, sense_sz);
3264 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302c,
3265 sense_ptr, sense_sz);
3266
3267 sense_len -= sense_sz;
3268 sense_ptr += sense_sz;
3269
3270 SET_CMD_SENSE_PTR(sp, sense_ptr);
3271 SET_CMD_SENSE_LEN(sp, sense_len);
3272
3273 /* Place command on done queue. */
3274 if (sense_len == 0) {
3275 rsp->status_srb = NULL;
3276 sp->done(sp, cp->result);
3277 }
3278 }
3279
3280 /**
3281 * qla2x00_error_entry() - Process an error entry.
3282 * @vha: SCSI driver HA context
3283 * @rsp: response queue
3284 * @pkt: Entry pointer
3285 * return : 1=allow further error analysis. 0=no additional error analysis.
3286 */
3287 static int
qla2x00_error_entry(scsi_qla_host_t * vha,struct rsp_que * rsp,sts_entry_t * pkt)3288 qla2x00_error_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, sts_entry_t *pkt)
3289 {
3290 srb_t *sp;
3291 struct qla_hw_data *ha = vha->hw;
3292 const char func[] = "ERROR-IOCB";
3293 uint16_t que = MSW(pkt->handle);
3294 struct req_que *req = NULL;
3295 int res = DID_ERROR << 16;
3296
3297 ql_dbg(ql_dbg_async, vha, 0x502a,
3298 "iocb type %xh with error status %xh, handle %xh, rspq id %d\n",
3299 pkt->entry_type, pkt->entry_status, pkt->handle, rsp->id);
3300
3301 if (que >= ha->max_req_queues || !ha->req_q_map[que])
3302 goto fatal;
3303
3304 req = ha->req_q_map[que];
3305
3306 if (pkt->entry_status & RF_BUSY)
3307 res = DID_BUS_BUSY << 16;
3308
3309 if ((pkt->handle & ~QLA_TGT_HANDLE_MASK) == QLA_TGT_SKIP_HANDLE)
3310 return 0;
3311
3312 switch (pkt->entry_type) {
3313 case NOTIFY_ACK_TYPE:
3314 case STATUS_TYPE:
3315 case STATUS_CONT_TYPE:
3316 case LOGINOUT_PORT_IOCB_TYPE:
3317 case CT_IOCB_TYPE:
3318 case ELS_IOCB_TYPE:
3319 case ABORT_IOCB_TYPE:
3320 case MBX_IOCB_TYPE:
3321 default:
3322 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
3323 if (sp) {
3324 qla_put_iocbs(sp->qpair, &sp->iores);
3325 sp->done(sp, res);
3326 return 0;
3327 }
3328 break;
3329
3330 case ABTS_RESP_24XX:
3331 case CTIO_TYPE7:
3332 case CTIO_CRC2:
3333 return 1;
3334 }
3335 fatal:
3336 ql_log(ql_log_warn, vha, 0x5030,
3337 "Error entry - invalid handle/queue (%04x).\n", que);
3338 return 0;
3339 }
3340
3341 /**
3342 * qla24xx_mbx_completion() - Process mailbox command completions.
3343 * @vha: SCSI driver HA context
3344 * @mb0: Mailbox0 register
3345 */
3346 static void
qla24xx_mbx_completion(scsi_qla_host_t * vha,uint16_t mb0)3347 qla24xx_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0)
3348 {
3349 uint16_t cnt;
3350 uint32_t mboxes;
3351 __le16 __iomem *wptr;
3352 struct qla_hw_data *ha = vha->hw;
3353 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
3354
3355 /* Read all mbox registers? */
3356 WARN_ON_ONCE(ha->mbx_count > 32);
3357 mboxes = (1ULL << ha->mbx_count) - 1;
3358 if (!ha->mcp)
3359 ql_dbg(ql_dbg_async, vha, 0x504e, "MBX pointer ERROR.\n");
3360 else
3361 mboxes = ha->mcp->in_mb;
3362
3363 /* Load return mailbox registers. */
3364 ha->flags.mbox_int = 1;
3365 ha->mailbox_out[0] = mb0;
3366 mboxes >>= 1;
3367 wptr = ®->mailbox1;
3368
3369 for (cnt = 1; cnt < ha->mbx_count; cnt++) {
3370 if (mboxes & BIT_0)
3371 ha->mailbox_out[cnt] = rd_reg_word(wptr);
3372
3373 mboxes >>= 1;
3374 wptr++;
3375 }
3376 }
3377
3378 static void
qla24xx_abort_iocb_entry(scsi_qla_host_t * vha,struct req_que * req,struct abort_entry_24xx * pkt)3379 qla24xx_abort_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
3380 struct abort_entry_24xx *pkt)
3381 {
3382 const char func[] = "ABT_IOCB";
3383 srb_t *sp;
3384 struct srb_iocb *abt;
3385
3386 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
3387 if (!sp)
3388 return;
3389
3390 abt = &sp->u.iocb_cmd;
3391 abt->u.abt.comp_status = pkt->nport_handle;
3392 sp->done(sp, 0);
3393 }
3394
qla24xx_nvme_ls4_iocb(struct scsi_qla_host * vha,struct pt_ls4_request * pkt,struct req_que * req)3395 void qla24xx_nvme_ls4_iocb(struct scsi_qla_host *vha,
3396 struct pt_ls4_request *pkt, struct req_que *req)
3397 {
3398 srb_t *sp;
3399 const char func[] = "LS4_IOCB";
3400 uint16_t comp_status;
3401
3402 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
3403 if (!sp)
3404 return;
3405
3406 comp_status = le16_to_cpu(pkt->status);
3407 sp->done(sp, comp_status);
3408 }
3409
3410 /**
3411 * qla24xx_process_response_queue() - Process response queue entries.
3412 * @vha: SCSI driver HA context
3413 * @rsp: response queue
3414 */
qla24xx_process_response_queue(struct scsi_qla_host * vha,struct rsp_que * rsp)3415 void qla24xx_process_response_queue(struct scsi_qla_host *vha,
3416 struct rsp_que *rsp)
3417 {
3418 struct sts_entry_24xx *pkt;
3419 struct qla_hw_data *ha = vha->hw;
3420 struct purex_entry_24xx *purex_entry;
3421 struct purex_item *pure_item;
3422
3423 if (!ha->flags.fw_started)
3424 return;
3425
3426 if (rsp->qpair->cpuid != smp_processor_id() || !rsp->qpair->rcv_intr) {
3427 rsp->qpair->rcv_intr = 1;
3428 qla_cpu_update(rsp->qpair, smp_processor_id());
3429 }
3430
3431 while (rsp->ring_ptr->signature != RESPONSE_PROCESSED) {
3432 pkt = (struct sts_entry_24xx *)rsp->ring_ptr;
3433
3434 rsp->ring_index++;
3435 if (rsp->ring_index == rsp->length) {
3436 rsp->ring_index = 0;
3437 rsp->ring_ptr = rsp->ring;
3438 } else {
3439 rsp->ring_ptr++;
3440 }
3441
3442 if (pkt->entry_status != 0) {
3443 if (qla2x00_error_entry(vha, rsp, (sts_entry_t *) pkt))
3444 goto process_err;
3445
3446 ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
3447 wmb();
3448 continue;
3449 }
3450 process_err:
3451
3452 switch (pkt->entry_type) {
3453 case STATUS_TYPE:
3454 qla2x00_status_entry(vha, rsp, pkt);
3455 break;
3456 case STATUS_CONT_TYPE:
3457 qla2x00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt);
3458 break;
3459 case VP_RPT_ID_IOCB_TYPE:
3460 qla24xx_report_id_acquisition(vha,
3461 (struct vp_rpt_id_entry_24xx *)pkt);
3462 break;
3463 case LOGINOUT_PORT_IOCB_TYPE:
3464 qla24xx_logio_entry(vha, rsp->req,
3465 (struct logio_entry_24xx *)pkt);
3466 break;
3467 case CT_IOCB_TYPE:
3468 qla24xx_els_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE);
3469 break;
3470 case ELS_IOCB_TYPE:
3471 qla24xx_els_ct_entry(vha, rsp->req, pkt, ELS_IOCB_TYPE);
3472 break;
3473 case ABTS_RECV_24XX:
3474 if (qla_ini_mode_enabled(vha)) {
3475 pure_item = qla24xx_copy_std_pkt(vha, pkt);
3476 if (!pure_item)
3477 break;
3478 qla24xx_queue_purex_item(vha, pure_item,
3479 qla24xx_process_abts);
3480 break;
3481 }
3482 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
3483 IS_QLA28XX(ha)) {
3484 /* ensure that the ATIO queue is empty */
3485 qlt_handle_abts_recv(vha, rsp,
3486 (response_t *)pkt);
3487 break;
3488 } else {
3489 qlt_24xx_process_atio_queue(vha, 1);
3490 }
3491 fallthrough;
3492 case ABTS_RESP_24XX:
3493 case CTIO_TYPE7:
3494 case CTIO_CRC2:
3495 qlt_response_pkt_all_vps(vha, rsp, (response_t *)pkt);
3496 break;
3497 case PT_LS4_REQUEST:
3498 qla24xx_nvme_ls4_iocb(vha, (struct pt_ls4_request *)pkt,
3499 rsp->req);
3500 break;
3501 case NOTIFY_ACK_TYPE:
3502 if (pkt->handle == QLA_TGT_SKIP_HANDLE)
3503 qlt_response_pkt_all_vps(vha, rsp,
3504 (response_t *)pkt);
3505 else
3506 qla24xxx_nack_iocb_entry(vha, rsp->req,
3507 (struct nack_to_isp *)pkt);
3508 break;
3509 case MARKER_TYPE:
3510 /* Do nothing in this case, this check is to prevent it
3511 * from falling into default case
3512 */
3513 break;
3514 case ABORT_IOCB_TYPE:
3515 qla24xx_abort_iocb_entry(vha, rsp->req,
3516 (struct abort_entry_24xx *)pkt);
3517 break;
3518 case MBX_IOCB_TYPE:
3519 qla24xx_mbx_iocb_entry(vha, rsp->req,
3520 (struct mbx_24xx_entry *)pkt);
3521 break;
3522 case VP_CTRL_IOCB_TYPE:
3523 qla_ctrlvp_completed(vha, rsp->req,
3524 (struct vp_ctrl_entry_24xx *)pkt);
3525 break;
3526 case PUREX_IOCB_TYPE:
3527 purex_entry = (void *)pkt;
3528 switch (purex_entry->els_frame_payload[3]) {
3529 case ELS_RDP:
3530 pure_item = qla24xx_copy_std_pkt(vha, pkt);
3531 if (!pure_item)
3532 break;
3533 qla24xx_queue_purex_item(vha, pure_item,
3534 qla24xx_process_purex_rdp);
3535 break;
3536 case ELS_FPIN:
3537 if (!vha->hw->flags.scm_enabled) {
3538 ql_log(ql_log_warn, vha, 0x5094,
3539 "SCM not active for this port\n");
3540 break;
3541 }
3542 pure_item = qla27xx_copy_fpin_pkt(vha,
3543 (void **)&pkt, &rsp);
3544 if (!pure_item)
3545 break;
3546 qla24xx_queue_purex_item(vha, pure_item,
3547 qla27xx_process_purex_fpin);
3548 break;
3549
3550 default:
3551 ql_log(ql_log_warn, vha, 0x509c,
3552 "Discarding ELS Request opcode 0x%x\n",
3553 purex_entry->els_frame_payload[3]);
3554 }
3555 break;
3556 default:
3557 /* Type Not Supported. */
3558 ql_dbg(ql_dbg_async, vha, 0x5042,
3559 "Received unknown response pkt type 0x%x entry status=%x.\n",
3560 pkt->entry_type, pkt->entry_status);
3561 break;
3562 }
3563 ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
3564 wmb();
3565 }
3566
3567 /* Adjust ring index */
3568 if (IS_P3P_TYPE(ha)) {
3569 struct device_reg_82xx __iomem *reg = &ha->iobase->isp82;
3570
3571 wrt_reg_dword(®->rsp_q_out[0], rsp->ring_index);
3572 } else {
3573 wrt_reg_dword(rsp->rsp_q_out, rsp->ring_index);
3574 }
3575 }
3576
3577 static void
qla2xxx_check_risc_status(scsi_qla_host_t * vha)3578 qla2xxx_check_risc_status(scsi_qla_host_t *vha)
3579 {
3580 int rval;
3581 uint32_t cnt;
3582 struct qla_hw_data *ha = vha->hw;
3583 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
3584
3585 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
3586 !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
3587 return;
3588
3589 rval = QLA_SUCCESS;
3590 wrt_reg_dword(®->iobase_addr, 0x7C00);
3591 rd_reg_dword(®->iobase_addr);
3592 wrt_reg_dword(®->iobase_window, 0x0001);
3593 for (cnt = 10000; (rd_reg_dword(®->iobase_window) & BIT_0) == 0 &&
3594 rval == QLA_SUCCESS; cnt--) {
3595 if (cnt) {
3596 wrt_reg_dword(®->iobase_window, 0x0001);
3597 udelay(10);
3598 } else
3599 rval = QLA_FUNCTION_TIMEOUT;
3600 }
3601 if (rval == QLA_SUCCESS)
3602 goto next_test;
3603
3604 rval = QLA_SUCCESS;
3605 wrt_reg_dword(®->iobase_window, 0x0003);
3606 for (cnt = 100; (rd_reg_dword(®->iobase_window) & BIT_0) == 0 &&
3607 rval == QLA_SUCCESS; cnt--) {
3608 if (cnt) {
3609 wrt_reg_dword(®->iobase_window, 0x0003);
3610 udelay(10);
3611 } else
3612 rval = QLA_FUNCTION_TIMEOUT;
3613 }
3614 if (rval != QLA_SUCCESS)
3615 goto done;
3616
3617 next_test:
3618 if (rd_reg_dword(®->iobase_c8) & BIT_3)
3619 ql_log(ql_log_info, vha, 0x504c,
3620 "Additional code -- 0x55AA.\n");
3621
3622 done:
3623 wrt_reg_dword(®->iobase_window, 0x0000);
3624 rd_reg_dword(®->iobase_window);
3625 }
3626
3627 /**
3628 * qla24xx_intr_handler() - Process interrupts for the ISP23xx and ISP24xx.
3629 * @irq: interrupt number
3630 * @dev_id: SCSI driver HA context
3631 *
3632 * Called by system whenever the host adapter generates an interrupt.
3633 *
3634 * Returns handled flag.
3635 */
3636 irqreturn_t
qla24xx_intr_handler(int irq,void * dev_id)3637 qla24xx_intr_handler(int irq, void *dev_id)
3638 {
3639 scsi_qla_host_t *vha;
3640 struct qla_hw_data *ha;
3641 struct device_reg_24xx __iomem *reg;
3642 int status;
3643 unsigned long iter;
3644 uint32_t stat;
3645 uint32_t hccr;
3646 uint16_t mb[8];
3647 struct rsp_que *rsp;
3648 unsigned long flags;
3649 bool process_atio = false;
3650
3651 rsp = (struct rsp_que *) dev_id;
3652 if (!rsp) {
3653 ql_log(ql_log_info, NULL, 0x5059,
3654 "%s: NULL response queue pointer.\n", __func__);
3655 return IRQ_NONE;
3656 }
3657
3658 ha = rsp->hw;
3659 reg = &ha->iobase->isp24;
3660 status = 0;
3661
3662 if (unlikely(pci_channel_offline(ha->pdev)))
3663 return IRQ_HANDLED;
3664
3665 spin_lock_irqsave(&ha->hardware_lock, flags);
3666 vha = pci_get_drvdata(ha->pdev);
3667 for (iter = 50; iter--; ) {
3668 stat = rd_reg_dword(®->host_status);
3669 if (qla2x00_check_reg32_for_disconnect(vha, stat))
3670 break;
3671 if (stat & HSRX_RISC_PAUSED) {
3672 if (unlikely(pci_channel_offline(ha->pdev)))
3673 break;
3674
3675 hccr = rd_reg_dword(®->hccr);
3676
3677 ql_log(ql_log_warn, vha, 0x504b,
3678 "RISC paused -- HCCR=%x, Dumping firmware.\n",
3679 hccr);
3680
3681 qla2xxx_check_risc_status(vha);
3682
3683 ha->isp_ops->fw_dump(vha);
3684 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
3685 break;
3686 } else if ((stat & HSRX_RISC_INT) == 0)
3687 break;
3688
3689 switch (stat & 0xff) {
3690 case INTR_ROM_MB_SUCCESS:
3691 case INTR_ROM_MB_FAILED:
3692 case INTR_MB_SUCCESS:
3693 case INTR_MB_FAILED:
3694 qla24xx_mbx_completion(vha, MSW(stat));
3695 status |= MBX_INTERRUPT;
3696
3697 break;
3698 case INTR_ASYNC_EVENT:
3699 mb[0] = MSW(stat);
3700 mb[1] = rd_reg_word(®->mailbox1);
3701 mb[2] = rd_reg_word(®->mailbox2);
3702 mb[3] = rd_reg_word(®->mailbox3);
3703 qla2x00_async_event(vha, rsp, mb);
3704 break;
3705 case INTR_RSP_QUE_UPDATE:
3706 case INTR_RSP_QUE_UPDATE_83XX:
3707 qla24xx_process_response_queue(vha, rsp);
3708 break;
3709 case INTR_ATIO_QUE_UPDATE_27XX:
3710 case INTR_ATIO_QUE_UPDATE:
3711 process_atio = true;
3712 break;
3713 case INTR_ATIO_RSP_QUE_UPDATE:
3714 process_atio = true;
3715 qla24xx_process_response_queue(vha, rsp);
3716 break;
3717 default:
3718 ql_dbg(ql_dbg_async, vha, 0x504f,
3719 "Unrecognized interrupt type (%d).\n", stat * 0xff);
3720 break;
3721 }
3722 wrt_reg_dword(®->hccr, HCCRX_CLR_RISC_INT);
3723 rd_reg_dword_relaxed(®->hccr);
3724 if (unlikely(IS_QLA83XX(ha) && (ha->pdev->revision == 1)))
3725 ndelay(3500);
3726 }
3727 qla2x00_handle_mbx_completion(ha, status);
3728 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3729
3730 if (process_atio) {
3731 spin_lock_irqsave(&ha->tgt.atio_lock, flags);
3732 qlt_24xx_process_atio_queue(vha, 0);
3733 spin_unlock_irqrestore(&ha->tgt.atio_lock, flags);
3734 }
3735
3736 return IRQ_HANDLED;
3737 }
3738
3739 static irqreturn_t
qla24xx_msix_rsp_q(int irq,void * dev_id)3740 qla24xx_msix_rsp_q(int irq, void *dev_id)
3741 {
3742 struct qla_hw_data *ha;
3743 struct rsp_que *rsp;
3744 struct device_reg_24xx __iomem *reg;
3745 struct scsi_qla_host *vha;
3746 unsigned long flags;
3747
3748 rsp = (struct rsp_que *) dev_id;
3749 if (!rsp) {
3750 ql_log(ql_log_info, NULL, 0x505a,
3751 "%s: NULL response queue pointer.\n", __func__);
3752 return IRQ_NONE;
3753 }
3754 ha = rsp->hw;
3755 reg = &ha->iobase->isp24;
3756
3757 spin_lock_irqsave(&ha->hardware_lock, flags);
3758
3759 vha = pci_get_drvdata(ha->pdev);
3760 qla24xx_process_response_queue(vha, rsp);
3761 if (!ha->flags.disable_msix_handshake) {
3762 wrt_reg_dword(®->hccr, HCCRX_CLR_RISC_INT);
3763 rd_reg_dword_relaxed(®->hccr);
3764 }
3765 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3766
3767 return IRQ_HANDLED;
3768 }
3769
3770 static irqreturn_t
qla24xx_msix_default(int irq,void * dev_id)3771 qla24xx_msix_default(int irq, void *dev_id)
3772 {
3773 scsi_qla_host_t *vha;
3774 struct qla_hw_data *ha;
3775 struct rsp_que *rsp;
3776 struct device_reg_24xx __iomem *reg;
3777 int status;
3778 uint32_t stat;
3779 uint32_t hccr;
3780 uint16_t mb[8];
3781 unsigned long flags;
3782 bool process_atio = false;
3783
3784 rsp = (struct rsp_que *) dev_id;
3785 if (!rsp) {
3786 ql_log(ql_log_info, NULL, 0x505c,
3787 "%s: NULL response queue pointer.\n", __func__);
3788 return IRQ_NONE;
3789 }
3790 ha = rsp->hw;
3791 reg = &ha->iobase->isp24;
3792 status = 0;
3793
3794 spin_lock_irqsave(&ha->hardware_lock, flags);
3795 vha = pci_get_drvdata(ha->pdev);
3796 do {
3797 stat = rd_reg_dword(®->host_status);
3798 if (qla2x00_check_reg32_for_disconnect(vha, stat))
3799 break;
3800 if (stat & HSRX_RISC_PAUSED) {
3801 if (unlikely(pci_channel_offline(ha->pdev)))
3802 break;
3803
3804 hccr = rd_reg_dword(®->hccr);
3805
3806 ql_log(ql_log_info, vha, 0x5050,
3807 "RISC paused -- HCCR=%x, Dumping firmware.\n",
3808 hccr);
3809
3810 qla2xxx_check_risc_status(vha);
3811
3812 ha->isp_ops->fw_dump(vha);
3813 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
3814 break;
3815 } else if ((stat & HSRX_RISC_INT) == 0)
3816 break;
3817
3818 switch (stat & 0xff) {
3819 case INTR_ROM_MB_SUCCESS:
3820 case INTR_ROM_MB_FAILED:
3821 case INTR_MB_SUCCESS:
3822 case INTR_MB_FAILED:
3823 qla24xx_mbx_completion(vha, MSW(stat));
3824 status |= MBX_INTERRUPT;
3825
3826 break;
3827 case INTR_ASYNC_EVENT:
3828 mb[0] = MSW(stat);
3829 mb[1] = rd_reg_word(®->mailbox1);
3830 mb[2] = rd_reg_word(®->mailbox2);
3831 mb[3] = rd_reg_word(®->mailbox3);
3832 qla2x00_async_event(vha, rsp, mb);
3833 break;
3834 case INTR_RSP_QUE_UPDATE:
3835 case INTR_RSP_QUE_UPDATE_83XX:
3836 qla24xx_process_response_queue(vha, rsp);
3837 break;
3838 case INTR_ATIO_QUE_UPDATE_27XX:
3839 case INTR_ATIO_QUE_UPDATE:
3840 process_atio = true;
3841 break;
3842 case INTR_ATIO_RSP_QUE_UPDATE:
3843 process_atio = true;
3844 qla24xx_process_response_queue(vha, rsp);
3845 break;
3846 default:
3847 ql_dbg(ql_dbg_async, vha, 0x5051,
3848 "Unrecognized interrupt type (%d).\n", stat & 0xff);
3849 break;
3850 }
3851 wrt_reg_dword(®->hccr, HCCRX_CLR_RISC_INT);
3852 } while (0);
3853 qla2x00_handle_mbx_completion(ha, status);
3854 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3855
3856 if (process_atio) {
3857 spin_lock_irqsave(&ha->tgt.atio_lock, flags);
3858 qlt_24xx_process_atio_queue(vha, 0);
3859 spin_unlock_irqrestore(&ha->tgt.atio_lock, flags);
3860 }
3861
3862 return IRQ_HANDLED;
3863 }
3864
3865 irqreturn_t
qla2xxx_msix_rsp_q(int irq,void * dev_id)3866 qla2xxx_msix_rsp_q(int irq, void *dev_id)
3867 {
3868 struct qla_hw_data *ha;
3869 struct qla_qpair *qpair;
3870
3871 qpair = dev_id;
3872 if (!qpair) {
3873 ql_log(ql_log_info, NULL, 0x505b,
3874 "%s: NULL response queue pointer.\n", __func__);
3875 return IRQ_NONE;
3876 }
3877 ha = qpair->hw;
3878
3879 queue_work_on(smp_processor_id(), ha->wq, &qpair->q_work);
3880
3881 return IRQ_HANDLED;
3882 }
3883
3884 irqreturn_t
qla2xxx_msix_rsp_q_hs(int irq,void * dev_id)3885 qla2xxx_msix_rsp_q_hs(int irq, void *dev_id)
3886 {
3887 struct qla_hw_data *ha;
3888 struct qla_qpair *qpair;
3889 struct device_reg_24xx __iomem *reg;
3890 unsigned long flags;
3891
3892 qpair = dev_id;
3893 if (!qpair) {
3894 ql_log(ql_log_info, NULL, 0x505b,
3895 "%s: NULL response queue pointer.\n", __func__);
3896 return IRQ_NONE;
3897 }
3898 ha = qpair->hw;
3899
3900 reg = &ha->iobase->isp24;
3901 spin_lock_irqsave(&ha->hardware_lock, flags);
3902 wrt_reg_dword(®->hccr, HCCRX_CLR_RISC_INT);
3903 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3904
3905 queue_work_on(smp_processor_id(), ha->wq, &qpair->q_work);
3906
3907 return IRQ_HANDLED;
3908 }
3909
3910 /* Interrupt handling helpers. */
3911
3912 struct qla_init_msix_entry {
3913 const char *name;
3914 irq_handler_t handler;
3915 };
3916
3917 static const struct qla_init_msix_entry msix_entries[] = {
3918 { "default", qla24xx_msix_default },
3919 { "rsp_q", qla24xx_msix_rsp_q },
3920 { "atio_q", qla83xx_msix_atio_q },
3921 { "qpair_multiq", qla2xxx_msix_rsp_q },
3922 { "qpair_multiq_hs", qla2xxx_msix_rsp_q_hs },
3923 };
3924
3925 static const struct qla_init_msix_entry qla82xx_msix_entries[] = {
3926 { "qla2xxx (default)", qla82xx_msix_default },
3927 { "qla2xxx (rsp_q)", qla82xx_msix_rsp_q },
3928 };
3929
3930 static int
qla24xx_enable_msix(struct qla_hw_data * ha,struct rsp_que * rsp)3931 qla24xx_enable_msix(struct qla_hw_data *ha, struct rsp_que *rsp)
3932 {
3933 int i, ret;
3934 struct qla_msix_entry *qentry;
3935 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
3936 int min_vecs = QLA_BASE_VECTORS;
3937 struct irq_affinity desc = {
3938 .pre_vectors = QLA_BASE_VECTORS,
3939 };
3940
3941 if (QLA_TGT_MODE_ENABLED() && (ql2xenablemsix != 0) &&
3942 IS_ATIO_MSIX_CAPABLE(ha)) {
3943 desc.pre_vectors++;
3944 min_vecs++;
3945 }
3946
3947 if (USER_CTRL_IRQ(ha) || !ha->mqiobase) {
3948 /* user wants to control IRQ setting for target mode */
3949 ret = pci_alloc_irq_vectors(ha->pdev, min_vecs,
3950 ha->msix_count, PCI_IRQ_MSIX);
3951 } else
3952 ret = pci_alloc_irq_vectors_affinity(ha->pdev, min_vecs,
3953 ha->msix_count, PCI_IRQ_MSIX | PCI_IRQ_AFFINITY,
3954 &desc);
3955
3956 if (ret < 0) {
3957 ql_log(ql_log_fatal, vha, 0x00c7,
3958 "MSI-X: Failed to enable support, "
3959 "giving up -- %d/%d.\n",
3960 ha->msix_count, ret);
3961 goto msix_out;
3962 } else if (ret < ha->msix_count) {
3963 ql_log(ql_log_info, vha, 0x00c6,
3964 "MSI-X: Using %d vectors\n", ret);
3965 ha->msix_count = ret;
3966 /* Recalculate queue values */
3967 if (ha->mqiobase && (ql2xmqsupport || ql2xnvmeenable)) {
3968 ha->max_req_queues = ha->msix_count - 1;
3969
3970 /* ATIOQ needs 1 vector. That's 1 less QPair */
3971 if (QLA_TGT_MODE_ENABLED())
3972 ha->max_req_queues--;
3973
3974 ha->max_rsp_queues = ha->max_req_queues;
3975
3976 ha->max_qpairs = ha->max_req_queues - 1;
3977 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0190,
3978 "Adjusted Max no of queues pairs: %d.\n", ha->max_qpairs);
3979 }
3980 }
3981 vha->irq_offset = desc.pre_vectors;
3982 ha->msix_entries = kcalloc(ha->msix_count,
3983 sizeof(struct qla_msix_entry),
3984 GFP_KERNEL);
3985 if (!ha->msix_entries) {
3986 ql_log(ql_log_fatal, vha, 0x00c8,
3987 "Failed to allocate memory for ha->msix_entries.\n");
3988 ret = -ENOMEM;
3989 goto free_irqs;
3990 }
3991 ha->flags.msix_enabled = 1;
3992
3993 for (i = 0; i < ha->msix_count; i++) {
3994 qentry = &ha->msix_entries[i];
3995 qentry->vector = pci_irq_vector(ha->pdev, i);
3996 qentry->entry = i;
3997 qentry->have_irq = 0;
3998 qentry->in_use = 0;
3999 qentry->handle = NULL;
4000 }
4001
4002 /* Enable MSI-X vectors for the base queue */
4003 for (i = 0; i < QLA_BASE_VECTORS; i++) {
4004 qentry = &ha->msix_entries[i];
4005 qentry->handle = rsp;
4006 rsp->msix = qentry;
4007 scnprintf(qentry->name, sizeof(qentry->name),
4008 "qla2xxx%lu_%s", vha->host_no, msix_entries[i].name);
4009 if (IS_P3P_TYPE(ha))
4010 ret = request_irq(qentry->vector,
4011 qla82xx_msix_entries[i].handler,
4012 0, qla82xx_msix_entries[i].name, rsp);
4013 else
4014 ret = request_irq(qentry->vector,
4015 msix_entries[i].handler,
4016 0, qentry->name, rsp);
4017 if (ret)
4018 goto msix_register_fail;
4019 qentry->have_irq = 1;
4020 qentry->in_use = 1;
4021 }
4022
4023 /*
4024 * If target mode is enable, also request the vector for the ATIO
4025 * queue.
4026 */
4027 if (QLA_TGT_MODE_ENABLED() && (ql2xenablemsix != 0) &&
4028 IS_ATIO_MSIX_CAPABLE(ha)) {
4029 qentry = &ha->msix_entries[QLA_ATIO_VECTOR];
4030 rsp->msix = qentry;
4031 qentry->handle = rsp;
4032 scnprintf(qentry->name, sizeof(qentry->name),
4033 "qla2xxx%lu_%s", vha->host_no,
4034 msix_entries[QLA_ATIO_VECTOR].name);
4035 qentry->in_use = 1;
4036 ret = request_irq(qentry->vector,
4037 msix_entries[QLA_ATIO_VECTOR].handler,
4038 0, qentry->name, rsp);
4039 qentry->have_irq = 1;
4040 }
4041
4042 msix_register_fail:
4043 if (ret) {
4044 ql_log(ql_log_fatal, vha, 0x00cb,
4045 "MSI-X: unable to register handler -- %x/%d.\n",
4046 qentry->vector, ret);
4047 qla2x00_free_irqs(vha);
4048 ha->mqenable = 0;
4049 goto msix_out;
4050 }
4051
4052 /* Enable MSI-X vector for response queue update for queue 0 */
4053 if (IS_MQUE_CAPABLE(ha) &&
4054 (ha->msixbase && ha->mqiobase && ha->max_qpairs))
4055 ha->mqenable = 1;
4056 else
4057 ha->mqenable = 0;
4058
4059 ql_dbg(ql_dbg_multiq, vha, 0xc005,
4060 "mqiobase=%p, max_rsp_queues=%d, max_req_queues=%d.\n",
4061 ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues);
4062 ql_dbg(ql_dbg_init, vha, 0x0055,
4063 "mqiobase=%p, max_rsp_queues=%d, max_req_queues=%d.\n",
4064 ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues);
4065
4066 msix_out:
4067 return ret;
4068
4069 free_irqs:
4070 pci_free_irq_vectors(ha->pdev);
4071 goto msix_out;
4072 }
4073
4074 int
qla2x00_request_irqs(struct qla_hw_data * ha,struct rsp_que * rsp)4075 qla2x00_request_irqs(struct qla_hw_data *ha, struct rsp_que *rsp)
4076 {
4077 int ret = QLA_FUNCTION_FAILED;
4078 device_reg_t *reg = ha->iobase;
4079 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
4080
4081 /* If possible, enable MSI-X. */
4082 if (ql2xenablemsix == 0 || (!IS_QLA2432(ha) && !IS_QLA2532(ha) &&
4083 !IS_QLA8432(ha) && !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha) &&
4084 !IS_QLAFX00(ha) && !IS_QLA27XX(ha) && !IS_QLA28XX(ha)))
4085 goto skip_msi;
4086
4087 if (ql2xenablemsix == 2)
4088 goto skip_msix;
4089
4090 if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_HP &&
4091 (ha->pdev->subsystem_device == 0x7040 ||
4092 ha->pdev->subsystem_device == 0x7041 ||
4093 ha->pdev->subsystem_device == 0x1705)) {
4094 ql_log(ql_log_warn, vha, 0x0034,
4095 "MSI-X: Unsupported ISP 2432 SSVID/SSDID (0x%X,0x%X).\n",
4096 ha->pdev->subsystem_vendor,
4097 ha->pdev->subsystem_device);
4098 goto skip_msi;
4099 }
4100
4101 if (IS_QLA2432(ha) && (ha->pdev->revision < QLA_MSIX_CHIP_REV_24XX)) {
4102 ql_log(ql_log_warn, vha, 0x0035,
4103 "MSI-X; Unsupported ISP2432 (0x%X, 0x%X).\n",
4104 ha->pdev->revision, QLA_MSIX_CHIP_REV_24XX);
4105 goto skip_msix;
4106 }
4107
4108 ret = qla24xx_enable_msix(ha, rsp);
4109 if (!ret) {
4110 ql_dbg(ql_dbg_init, vha, 0x0036,
4111 "MSI-X: Enabled (0x%X, 0x%X).\n",
4112 ha->chip_revision, ha->fw_attributes);
4113 goto clear_risc_ints;
4114 }
4115
4116 skip_msix:
4117
4118 ql_log(ql_log_info, vha, 0x0037,
4119 "Falling back-to MSI mode -- ret=%d.\n", ret);
4120
4121 if (!IS_QLA24XX(ha) && !IS_QLA2532(ha) && !IS_QLA8432(ha) &&
4122 !IS_QLA8001(ha) && !IS_P3P_TYPE(ha) && !IS_QLAFX00(ha) &&
4123 !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
4124 goto skip_msi;
4125
4126 ret = pci_alloc_irq_vectors(ha->pdev, 1, 1, PCI_IRQ_MSI);
4127 if (ret > 0) {
4128 ql_dbg(ql_dbg_init, vha, 0x0038,
4129 "MSI: Enabled.\n");
4130 ha->flags.msi_enabled = 1;
4131 } else
4132 ql_log(ql_log_warn, vha, 0x0039,
4133 "Falling back-to INTa mode -- ret=%d.\n", ret);
4134 skip_msi:
4135
4136 /* Skip INTx on ISP82xx. */
4137 if (!ha->flags.msi_enabled && IS_QLA82XX(ha))
4138 return QLA_FUNCTION_FAILED;
4139
4140 ret = request_irq(ha->pdev->irq, ha->isp_ops->intr_handler,
4141 ha->flags.msi_enabled ? 0 : IRQF_SHARED,
4142 QLA2XXX_DRIVER_NAME, rsp);
4143 if (ret) {
4144 ql_log(ql_log_warn, vha, 0x003a,
4145 "Failed to reserve interrupt %d already in use.\n",
4146 ha->pdev->irq);
4147 goto fail;
4148 } else if (!ha->flags.msi_enabled) {
4149 ql_dbg(ql_dbg_init, vha, 0x0125,
4150 "INTa mode: Enabled.\n");
4151 ha->flags.mr_intr_valid = 1;
4152 /* Set max_qpair to 0, as MSI-X and MSI in not enabled */
4153 ha->max_qpairs = 0;
4154 }
4155
4156 clear_risc_ints:
4157 if (IS_FWI2_CAPABLE(ha) || IS_QLAFX00(ha))
4158 goto fail;
4159
4160 spin_lock_irq(&ha->hardware_lock);
4161 wrt_reg_word(®->isp.semaphore, 0);
4162 spin_unlock_irq(&ha->hardware_lock);
4163
4164 fail:
4165 return ret;
4166 }
4167
4168 void
qla2x00_free_irqs(scsi_qla_host_t * vha)4169 qla2x00_free_irqs(scsi_qla_host_t *vha)
4170 {
4171 struct qla_hw_data *ha = vha->hw;
4172 struct rsp_que *rsp;
4173 struct qla_msix_entry *qentry;
4174 int i;
4175
4176 /*
4177 * We need to check that ha->rsp_q_map is valid in case we are called
4178 * from a probe failure context.
4179 */
4180 if (!ha->rsp_q_map || !ha->rsp_q_map[0])
4181 goto free_irqs;
4182 rsp = ha->rsp_q_map[0];
4183
4184 if (ha->flags.msix_enabled) {
4185 for (i = 0; i < ha->msix_count; i++) {
4186 qentry = &ha->msix_entries[i];
4187 if (qentry->have_irq) {
4188 irq_set_affinity_notifier(qentry->vector, NULL);
4189 free_irq(pci_irq_vector(ha->pdev, i), qentry->handle);
4190 }
4191 }
4192 kfree(ha->msix_entries);
4193 ha->msix_entries = NULL;
4194 ha->flags.msix_enabled = 0;
4195 ql_dbg(ql_dbg_init, vha, 0x0042,
4196 "Disabled MSI-X.\n");
4197 } else {
4198 free_irq(pci_irq_vector(ha->pdev, 0), rsp);
4199 }
4200
4201 free_irqs:
4202 pci_free_irq_vectors(ha->pdev);
4203 }
4204
qla25xx_request_irq(struct qla_hw_data * ha,struct qla_qpair * qpair,struct qla_msix_entry * msix,int vector_type)4205 int qla25xx_request_irq(struct qla_hw_data *ha, struct qla_qpair *qpair,
4206 struct qla_msix_entry *msix, int vector_type)
4207 {
4208 const struct qla_init_msix_entry *intr = &msix_entries[vector_type];
4209 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
4210 int ret;
4211
4212 scnprintf(msix->name, sizeof(msix->name),
4213 "qla2xxx%lu_qpair%d", vha->host_no, qpair->id);
4214 ret = request_irq(msix->vector, intr->handler, 0, msix->name, qpair);
4215 if (ret) {
4216 ql_log(ql_log_fatal, vha, 0x00e6,
4217 "MSI-X: Unable to register handler -- %x/%d.\n",
4218 msix->vector, ret);
4219 return ret;
4220 }
4221 msix->have_irq = 1;
4222 msix->handle = qpair;
4223 return ret;
4224 }
4225