| /drivers/usb/gadget/udc/ |
| D | snps_udc_core.c | 219 u32 tmp; in udc_mask_unused_interrupts() local
242 u32 tmp; in udc_enable_ep0_interrupts() local
259 u32 tmp; in udc_enable_dev_setup_interrupts() local
282 u32 tmp; in udc_set_txfifo_addr() local
323 u32 tmp; in udc_ep_enable() local
449 u32 tmp; in ep_init() local
695 u32 tmp; in udc_rxfifo_read_bytes() local
874 u32 tmp; in prep_dma() local
1032 u32 tmp; in udc_set_rde() local
1056 u32 tmp; in udc_queue() local
[all …]
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| D | net2280.c | 170 u32 tmp = readl(&ep->dev->regs->pciirqenb0); in enable_pciirqenb() local
187 u32 tmp = 0; in net2280_enable() local
381 u32 tmp; in ep_reset_228x() local
457 u32 tmp, dmastat; in ep_reset_338x() local
612 u32 tmp; in write_fifo() local
671 u32 tmp; in out_flush() local
712 unsigned count, tmp, is_short; in read_fifo() local
850 unsigned int tmp = BIT(VALID_BIT) | (ep->is_in << DMA_DIRECTION); in start_queue() local
871 u32 tmp; in start_dma() local
936 dma_addr_t tmp; in queue_dma() local
[all …]
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| /drivers/scsi/mvsas/ |
| D | mv_64xx.c | 31 u32 tmp; in mvs_64xx_enable_xmt() local
70 u32 reg, tmp; in mvs_64xx_stp_reset() local
106 u32 tmp; in mvs_64xx_phy_reset() local
127 u32 tmp; in mvs_64xx_clear_srs_irq() local
147 u32 tmp; in mvs_64xx_chip_reset() local
197 u32 tmp; in mvs_64xx_phy_disable() local
219 u32 tmp; in mvs_64xx_phy_enable() local
242 u32 tmp, cctl; in mvs_64xx_init() local
423 u32 tmp; in mvs_64xx_interrupt_enable() local
432 u32 tmp; in mvs_64xx_interrupt_disable() local
[all …]
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| D | mv_94xx.c | 38 u32 tmp, setting_0 = 0, setting_1 = 0; in set_phy_tuning() local
100 u32 tmp; in set_phy_ffe_tuning() local
247 u32 tmp; in mvs_94xx_enable_xmt() local
256 u32 tmp; in mvs_94xx_phy_reset() local
288 u32 tmp; in mvs_94xx_phy_disable() local
296 u32 tmp; in mvs_94xx_phy_enable() local
320 u32 tmp; in mvs_94xx_sgpio_init() local
366 u32 tmp, cctl; in mvs_94xx_init() local
595 u32 tmp; in mvs_94xx_interrupt_enable() local
610 u32 tmp; in mvs_94xx_interrupt_disable() local
[all …]
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| /drivers/media/pci/cx25821/ |
| D | cx25821-medusa-video.c | 25 u32 tmp = 0; in medusa_enable_bluefield_output() local
81 u32 tmp = 0; in medusa_initialize_ntsc() local
215 u32 value = 0, tmp = 0; in medusa_PALCombInit() local
248 u32 tmp = 0; in medusa_initialize_pal() local
386 u32 value = 0, tmp = 0; in medusa_set_videostandard() local
470 u32 tmp = 0; in medusa_set_decoderduration() local
555 u32 val = 0, tmp = 0; in medusa_set_brightness() local
576 u32 val = 0, tmp = 0; in medusa_set_contrast() local
597 u32 val = 0, tmp = 0; in medusa_set_hue() local
621 u32 val = 0, tmp = 0; in medusa_set_saturation() local
[all …]
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| /drivers/gpu/drm/i915/ |
| D | i915_fixed.h | 77 u64 tmp; in mul_round_up_u32_fixed16() local
89 u64 tmp; in mul_fixed16() local
99 u64 tmp; in div_fixed16() local
109 u64 tmp; in div_round_up_u32_fixed16() local
120 u64 tmp; in mul_u32_fixed16() local
130 u64 tmp; in add_fixed16() local
141 u64 tmp; in add_fixed16_u32() local
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| /drivers/gpu/drm/radeon/ |
| D | rs600.c | 121 u32 tmp = RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset); in rs600_page_flip() local
165 u32 tmp = 0; in avivo_program_fmt() local
227 u32 tmp, dyn_pwrmgt_sclk_length, dyn_sclk_vol_cntl; in rs600_pm_misc() local
321 u32 tmp; in rs600_pm_prepare() local
339 u32 tmp; in rs600_pm_finish() local
355 u32 tmp; in rs600_hpd_sense() local
378 u32 tmp; in rs600_hpd_set_polarity() local
459 u32 status, tmp; in rs600_asic_reset() local
523 uint32_t tmp; in rs600_gart_tlb_flush() local
558 u32 tmp; in rs600_gart_enable() local
[all …]
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| D | r300.c | 90 uint32_t tmp; in rv370_pcie_gart_tlb_flush() local
156 uint32_t tmp; in rv370_pcie_gart_enable() local
195 u32 tmp; in rv370_pcie_gart_disable() local
351 uint32_t tmp; in r300_mc_wait_for_idle() local
366 uint32_t gb_tile_config, tmp; in r300_gpu_init() local
419 u32 status, tmp; in r300_asic_reset() local
479 u32 tmp; in r300_mc_init() local
598 uint32_t tmp; in rv370_debugfs_pcie_gart_info() local
638 uint32_t tmp, tile_flags = 0; in r300_packet0_check() local
1366 u32 tmp; in r300_clock_startup() local
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| D | r600.c | 304 u32 tmp = 0; in dce3_program_fmt() local
862 u32 tmp; in r600_hpd_set_polarity() local
969 u32 tmp = DC_HPDx_CONNECTION_TIMER(0x9c4) | DC_HPDx_RX_INT_TIMER(0xfa); in r600_hpd_init() local
1077 u32 tmp; in r600_pcie_gart_tlb_flush() local
1083 u32 tmp; in r600_pcie_gart_tlb_flush() local
1131 u32 tmp; in r600_pcie_gart_enable() local
1189 u32 tmp; in r600_pcie_gart_disable() local
1231 u32 tmp; in r600_agp_enable() local
1266 u32 tmp; in r600_mc_wait_for_idle() local
1306 u32 tmp; in r600_mc_program() local
[all …]
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| D | r100.c | 165 u32 tmp = ((u32)crtc_base) | RADEON_CRTC_OFFSET__OFFSET_LOCK; in r100_page_flip() local
356 u32 tmp, sclk_cntl, sclk_cntl2, sclk_more_cntl; in r100_pm_misc() local
454 u32 tmp; in r100_pm_prepare() local
485 u32 tmp; in r100_pm_finish() local
560 u32 tmp; in r100_hpd_set_polarity() local
662 uint32_t tmp; in r100_pci_gart_enable() local
684 uint32_t tmp; in r100_pci_gart_disable() local
714 uint32_t tmp = 0; in r100_irq_set() local
748 u32 tmp; in r100_irq_disable() local
970 u32 tmp; in r100_cp_wait_for_idle() local
[all …]
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| D | si_smc.c | 115 u32 tmp = RREG32_SMC(SMC_SYSCON_RESET_CNTL); in si_start_smc() local
124 u32 tmp; in si_reset_smc() local
145 u32 tmp = RREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0); in si_stop_smc_clock() local
154 u32 tmp = RREG32_SMC(SMC_SYSCON_CLOCK_CNTL_0); in si_start_smc_clock() local
174 u32 tmp; in si_send_msg_to_smc() local
195 u32 tmp; in si_wait_for_smc_inactive() local
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| D | rv770.c | 797 u32 tmp = RREG32(CG_CLKPIN_CNTL); in rv770_get_xclk() local
811 u32 tmp = RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset); in rv770_page_flip() local
899 u32 tmp; in rv770_pcie_gart_enable() local
949 u32 tmp; in rv770_pcie_gart_disable() local
983 u32 tmp; in rv770_agp_enable() local
1011 u32 tmp; in rv770_mc_program() local
1140 u32 tmp, i; in rv770_set_clk_bypass_mode() local
1188 u32 db_debug4, tmp; in rv770_gpu_init() local
1647 u32 tmp; in rv770_mc_init() local
2027 u32 link_width_cntl, lanes, speed_cntl, tmp; in rv770_pcie_gen2_enable() local
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| /drivers/char/ |
| D | tlclk.c | 329 unsigned long tmp; in store_received_ref_clk3a() local
351 unsigned long tmp; in store_received_ref_clk3b() local
373 unsigned long tmp; in store_enable_clk3b_output() local
395 unsigned long tmp; in store_enable_clk3a_output() local
416 unsigned long tmp; in store_enable_clkb1_output() local
438 unsigned long tmp; in store_enable_clka1_output() local
459 unsigned long tmp; in store_enable_clkb0_output() local
480 unsigned long tmp; in store_enable_clka0_output() local
501 unsigned long tmp; in store_select_amcb2_transmit_clock() local
542 unsigned long tmp; in store_select_amcb1_transmit_clock() local
[all …]
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| /drivers/gpu/drm/amd/amdgpu/ |
| D | gmc_v8_0.c | 199 u32 tmp; in gmc_v8_0_mc_resume() local
453 u32 tmp; in gmc_v8_0_mc_program() local
527 u32 tmp; in gmc_v8_0_mc_init() local
643 unsigned int tmp; in gmc_v8_0_flush_gpu_tlb_pasid() local
753 u32 tmp; in gmc_v8_0_set_fault_enable_default() local
781 u32 tmp; in gmc_v8_0_set_prt() local
845 u32 tmp, field; in gmc_v8_0_gart_enable() local
990 u32 tmp; in gmc_v8_0_gart_disable() local
1120 u32 tmp; in gmc_v8_0_sw_init() local
1190 u64 tmp = RREG32(mmMC_VM_FB_OFFSET); in gmc_v8_0_sw_init() local
[all …]
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| D | gfxhub_v1_0.c | 121 uint32_t tmp; in gfxhub_v1_0_init_tlb_regs() local
142 uint32_t tmp; in gfxhub_v1_0_init_cache_regs() local
181 uint32_t tmp; in gfxhub_v1_0_enable_system_domain() local
212 uint32_t tmp; in gfxhub_v1_0_setup_vmid_config() local
310 u32 tmp; in gfxhub_v1_0_gart_disable() local
341 u32 tmp; in gfxhub_v1_0_set_fault_enable_default() local
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| D | gmc_v7_0.c | 111 u32 tmp; in gmc_v7_0_mc_resume() local
262 u32 tmp; in gmc_v7_0_mc_program() local
328 u32 tmp; in gmc_v7_0_mc_init() local
435 unsigned int tmp; in gmc_v7_0_flush_gpu_tlb_pasid() local
522 u32 tmp; in gmc_v7_0_set_fault_enable_default() local
548 uint32_t tmp; in gmc_v7_0_set_prt() local
612 u32 tmp, field; in gmc_v7_0_gart_enable() local
740 u32 tmp; in gmc_v7_0_gart_disable() local
994 u32 tmp = RREG32(mmMC_SEQ_MISC0); in gmc_v7_0_sw_init() local
1058 u64 tmp = RREG32(mmMC_VM_FB_OFFSET); in gmc_v7_0_sw_init() local
[all …]
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| D | gfxhub_v2_0.c | 189 uint32_t tmp; in gfxhub_v2_0_init_tlb_regs() local
209 uint32_t tmp; in gfxhub_v2_0_init_cache_regs() local
258 uint32_t tmp; in gfxhub_v2_0_enable_system_domain() local
289 uint32_t tmp; in gfxhub_v2_0_setup_vmid_config() local
364 u32 tmp; in gfxhub_v2_0_gart_disable() local
395 u32 tmp; in gfxhub_v2_0_set_fault_enable_default() local
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| D | mmhub_v2_0.c | 196 uint32_t tmp; in mmhub_v2_0_init_system_aperture_regs() local
233 uint32_t tmp; in mmhub_v2_0_init_tlb_regs() local
253 uint32_t tmp; in mmhub_v2_0_init_cache_regs() local
304 uint32_t tmp; in mmhub_v2_0_enable_system_domain() local
344 uint32_t tmp; in mmhub_v2_0_setup_vmid_config() local
420 u32 tmp; in mmhub_v2_0_gart_disable() local
450 u32 tmp; in mmhub_v2_0_set_fault_enable_default() local
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| D | gfxhub_v2_1.c | 187 uint32_t tmp; in gfxhub_v2_1_init_tlb_regs() local
207 uint32_t tmp; in gfxhub_v2_1_init_cache_regs() local
258 uint32_t tmp; in gfxhub_v2_1_enable_system_domain() local
295 uint32_t tmp; in gfxhub_v2_1_setup_vmid_config() local
382 u32 tmp; in gfxhub_v2_1_gart_disable() local
411 u32 tmp; in gfxhub_v2_1_set_fault_enable_default() local
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| D | mmhub_v1_0.c | 88 uint32_t tmp; in mmhub_v1_0_init_system_aperture_regs() local
138 uint32_t tmp; in mmhub_v1_0_init_tlb_regs() local
159 uint32_t tmp; in mmhub_v1_0_init_cache_regs() local
201 uint32_t tmp; in mmhub_v1_0_enable_system_domain() local
236 uint32_t tmp; in mmhub_v1_0_setup_vmid_config() local
344 u32 tmp; in mmhub_v1_0_gart_disable() local
378 u32 tmp; in mmhub_v1_0_set_fault_enable_default() local
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| D | df_v1_7.c | 46 u32 tmp; in df_v1_7_enable_broadcast_mode() local
59 u32 tmp; in df_v1_7_get_fb_channel_number() local
80 u32 tmp; in df_v1_7_update_medium_grain_clock_gating() local
104 u32 tmp; in df_v1_7_get_clockgating_state() local
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| /drivers/video/fbdev/aty/ |
| D | radeon_pm.c | 132 u32 tmp; in radeon_pm_disable_dynamic_mode() local
333 u32 tmp; in radeon_pm_enable_dynamic_mode() local
834 u32 tmp; in radeon_pm_setup_for_suspend() local
1437 u32 tmp, tmp2; in radeon_pm_reset_pad_ctlr_strength() local
1462 u32 tmp; in radeon_pm_all_ppls_off() local
1476 u32 tmp; in radeon_pm_start_mclk_sclk() local
1583 u32 r2ec, tmp; in radeon_pm_m10_enable_lvds_spread_spectrum() local
1638 u32 tmp; in radeon_pm_restore_pixel_pll() local
1725 u32 tmp, i; in radeon_reinitialize_M10() local
1979 u32 tmp, i; in radeon_reinitialize_M9P() local
[all …]
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| /drivers/video/fbdev/mmp/hw/ |
| D | mmp_ctrl.c | 33 u32 isr, imask, tmp; in ctrl_handle_irq() local
121 u32 tmp; in dmafetch_set_fmt() local
170 u32 tmp; in dmafetch_onoff() local
183 u32 tmp; in path_enabledisable() local
255 u32 total_x, total_y, vsync_ctrl, tmp, sclk_src, sclk_div, in path_set_mode() local
325 u32 tmp, irq_mask; in ctrl_set_default() local
348 u32 dma_ctrl1, mask, tmp, path_config; in path_set_default() local
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| /drivers/gpu/drm/i915/display/ |
| D | icl_dsi.c | 129 u32 tmp = 0; in add_payld_to_queue() local
153 u32 tmp; in dsi_send_pkt_hdr() local
213 u32 tmp; in dsi_program_swing_and_deemphasis() local
374 u32 tmp; in gen11_dsi_enable_io_power() local
401 u32 tmp; in gen11_dsi_config_phy_lanes_sequence() local
455 u32 tmp; in gen11_dsi_voltage_swing_program_seq() local
507 u32 tmp; in gen11_dsi_enable_ddi_buffer() local
529 u32 tmp; in gen11_dsi_setup_dphy_timings() local
602 u32 tmp; in gen11_dsi_gate_clocks() local
618 u32 tmp; in gen11_dsi_ungate_clocks() local
[all …]
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| /drivers/net/ethernet/netronome/nfp/nfpcore/ |
| D | nfp_cpplib.c | 43 u8 tmp[4]; in nfp_cpp_readl() local
66 u8 tmp[4]; in nfp_cpp_writel() local
87 u8 tmp[8]; in nfp_cpp_readq() local
110 u8 tmp[8]; in nfp_cpp_writeq() local
157 char *tmp = buff; in nfp_cpp_explicit_read() local
210 const char *tmp = buff; in nfp_cpp_explicit_write() local
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