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/Documentation/devicetree/bindings/usb/
Dux500-usb.txt19 reg = <0xa03e0000 0x10000>;
20 interrupts = <0 23 0x4>;
25 dmas = <&dma 38 0 0x2>, /* Logical - DevToMem */
26 <&dma 38 0 0x0>, /* Logical - MemToDev */
27 <&dma 37 0 0x2>, /* Logical - DevToMem */
28 <&dma 37 0 0x0>, /* Logical - MemToDev */
29 <&dma 36 0 0x2>, /* Logical - DevToMem */
30 <&dma 36 0 0x0>, /* Logical - MemToDev */
31 <&dma 19 0 0x2>, /* Logical - DevToMem */
32 <&dma 19 0 0x0>, /* Logical - MemToDev */
[all …]
/Documentation/devicetree/bindings/misc/
Dpvpanic-mmio.txt15 * Bytes 0x0 Write panic event to the reg when guest OS panics.
16 * Bytes 0x1 Reserved.
21 #size-cells = <0x2>;
22 #address-cells = <0x2>;
26 reg = <0x0 0x9060000 0x0 0x2>;
/Documentation/devicetree/bindings/dma/
Dst,stm32-mdma.yaml17 0x0: Low
18 0x1: Medium
19 0x2: High
20 0x3: Very high
22 -bit 0-1: Source increment mode
23 0x0: Source address pointer is fixed
24 0x2: Source address pointer is incremented after each data transfer
25 0x3: Source address pointer is decremented after each data transfer
27 0x0: Destination address pointer is fixed
28 0x2: Destination address pointer is incremented after each data transfer
[all …]
Dst,stm32-dma.yaml20 0x0: no address increment between transfers
21 0x1: increment address between transfers
23 0x0: no address increment between transfers
24 0x1: increment address between transfers
26 0x0: offset size is linked to the peripheral bus width
27 0x1: offset size is fixed to 4 (32-bit alignment)
29 0x0: low
30 0x1: medium
31 0x2: high
32 0x3: very high
[all …]
/Documentation/userspace-api/media/v4l/
Dsubdev-image-processing-full.svg9 xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd"
39 inkscape:pageopacity="0"
45 fit-margin-top="0"
46 fit-margin-left="0"
47 fit-margin-right="0"
48 fit-margin-bottom="0"
67 style="fill:none;fill-opacity:0;stroke:#ff765a;stroke-width:2"
75 style="fill:none;fill-opacity:0;stroke:#000000;stroke-width:2"
91 style="fill:none;fill-opacity:0;stroke:#000000;stroke-width:2"
97 style="fill:none;fill-opacity:0;stroke:#000000;stroke-width:2"
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Dsubdev-image-processing-scaling-multi-source.svg9 xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd"
39 inkscape:pageopacity="0"
45 fit-margin-top="0"
46 fit-margin-left="0"
47 fit-margin-right="0"
48 fit-margin-bottom="0"
57 style="fill:none;fill-opacity:0;stroke:#000000;stroke-width:2"
74 style="fill:none;fill-opacity:0;stroke:#a52a2a;stroke-width:2"
92 style="fill:none;fill-opacity:0;stroke:#0000ff;stroke-width:2"
152 style="fill:none;fill-opacity:0;stroke:#00ff00;stroke-width:2"
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Dsubdev-image-processing-crop.svg9 xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd"
39 inkscape:pageopacity="0"
45 fit-margin-top="0"
46 fit-margin-left="0"
47 fit-margin-right="0"
48 fit-margin-bottom="0"
57 style="fill:none;fill-opacity:0;stroke:#000000;stroke-width:2"
74 style="fill:none;fill-opacity:0;stroke:#a52a2a;stroke-width:2"
92 style="fill:none;fill-opacity:0;stroke:#0000ff;stroke-width:2"
166 style="fill:none;fill-opacity:0;stroke:#8b6914;stroke-width:2"
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/Documentation/input/devices/
Dalps.rst32 E8-E6-E6-E6-E9. An ALPS touchpad should respond with either 00-00-0A or
33 00-00-64 if no buttons are pressed. The bits 0-2 of the first byte will be 1s
45 The new ALPS touchpads have an E7 signature of 73-03-50 or 73-03-0A but
94 byte 0: 0 0 YSGN XSGN 1 M R L
95 byte 1: X7 X6 X5 X4 X3 X2 X1 X0
109 byte 0: 1 0 0 0 1 x9 x8 x7
110 byte 1: 0 x6 x5 x4 x3 x2 x1 x0
111 byte 2: 0 ? ? l r ? fin ges
112 byte 3: 0 ? ? ? ? y9 y8 y7
113 byte 4: 0 y6 y5 y4 y3 y2 y1 y0
[all …]
/Documentation/gpu/
Dafbc.rst31 * Component 0: R
36 fourcc:modifier pair. In general, component '0' is considered to
42 * Component 0: R(8)
49 * Component 0: R(8)
55 * Component 0: Y(8)
65 * Component 0: R(8)
94 * Plane 0:
96 * Component 0: Y(8)
102 * Plane 0:
104 * Component 0: Y(8)
[all …]
/Documentation/devicetree/bindings/powerpc/opal/
Doppanel-opal.txt6 - #lines : Number of lines on the operator panel e.g. <0x2>.
7 - #length : Number of characters per line of the operator panel e.g. <0x10>.
12 #lines = <0x2>;
13 #length = <0x10>;
/Documentation/doc-guide/
Dsvg_image.svg5 width="70px" height="40px" viewBox="0 0 700 400">
6 <line x1="0" y1="200" x2="700" y2="200" stroke="black" stroke-width="20px"/>
8 <line x1="180" y1="370" x2="500" y2="50" stroke="black" stroke-width="15px"/>
9 <polygon points="585 0 525 25 585 50" transform="rotate(135 525 25)"/>
/Documentation/devicetree/bindings/net/
Ddavicom-dm9000.txt20 reg = <0x18000000 0x2 0x18000004 0x2>;
Dfsl-enetc.txt37 ethernet@0,0 {
39 reg = <0x000000 0 0 0 0>;
45 #size-cells = <0>;
47 reg = <0x2>;
69 ethernet@0,0 {
71 reg = <0x000000 0 0 0 0>;
76 mdio@0,3 {
78 reg = <0x000300 0 0 0 0>;
80 #size-cells = <0>;
82 reg = <0x2>;
[all …]
/Documentation/devicetree/bindings/display/ti/
Dti,k2g-dss.yaml86 reg = <0x02540000 0x400>,
87 <0x02550000 0x1000>,
88 <0x02557000 0x1000>,
89 <0x0255a800 0x100>,
90 <0x0255ac00 0x100>;
92 clocks = <&k2g_clks 0x2 0>,
93 <&k2g_clks 0x2 1>;
97 power-domains = <&k2g_pds 0x2>;
/Documentation/devicetree/bindings/arm/
Dfw-cfg.txt23 * Bytes 0x0 to 0x7 cover the data register.
24 * Bytes 0x8 to 0x9 cover the selector register.
31 #size-cells = <0x2>;
32 #address-cells = <0x2>;
36 reg = <0x0 0x9020000 0x0 0xa>;
/Documentation/devicetree/bindings/powerpc/fsl/
Dlbc.txt19 reg = <0xf0010100 0x40>;
21 ranges = <0x0 0x0 0xfe000000 0x02000000
22 0x1 0x0 0xf4500000 0x00008000
23 0x2 0x0 0xfd810000 0x00010000>;
25 flash@0,0 {
27 reg = <0x0 0x0 0x2000000>;
32 board-control@1,0 {
33 reg = <0x1 0x0 0x20>;
37 simple-periph@2,0 {
39 reg = <0x2 0x0 0x10000>;
[all …]
/Documentation/devicetree/bindings/mtd/
Dst,stm32-fmc2-nand.yaml60 - description: Chip select 0 data
61 - description: Chip select 0 command
62 - description: Chip select 0 address space
85 - description: Chip select 0 data
86 - description: Chip select 0 command
87 - description: Chip select 0 address space
106 reg = <0x58002000 0x1000>,
107 <0x80000000 0x1000>,
108 <0x88010000 0x1000>,
109 <0x88020000 0x1000>,
[all …]
/Documentation/powerpc/
Dptrace.rst44 #define PPC_DEBUG_FEATURE_INSN_BP_RANGE 0x1
45 #define PPC_DEBUG_FEATURE_INSN_BP_MASK 0x2
46 #define PPC_DEBUG_FEATURE_DATA_BP_RANGE 0x4
47 #define PPC_DEBUG_FEATURE_DATA_BP_MASK 0x8
48 #define PPC_DEBUG_FEATURE_DATA_BP_DAWR 0x10
49 #define PPC_DEBUG_FEATURE_DATA_BP_ARCH_31 0x20
57 #define PPC_BREAKPOINT_TRIGGER_EXECUTE 0x1
58 #define PPC_BREAKPOINT_TRIGGER_READ 0x2
59 #define PPC_BREAKPOINT_TRIGGER_WRITE 0x4
61 #define PPC_BREAKPOINT_MODE_EXACT 0x0
[all …]
/Documentation/devicetree/bindings/pci/
D83xx-512x-pci.txt12 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
14 /* IDSEL 0x0E -mini PCI */
15 0x7000 0x0 0x0 0x1 &ipic 18 0x8
16 0x7000 0x0 0x0 0x2 &ipic 18 0x8
17 0x7000 0x0 0x0 0x3 &ipic 18 0x8
18 0x7000 0x0 0x0 0x4 &ipic 18 0x8
20 /* IDSEL 0x0F - PCI slot */
21 0x7800 0x0 0x0 0x1 &ipic 17 0x8
22 0x7800 0x0 0x0 0x2 &ipic 18 0x8
23 0x7800 0x0 0x0 0x3 &ipic 17 0x8
[all …]
Dxilinx-nwl-pcie.txt34 address. The value must be 0.
48 interrupts = <0 114 4>, <0 115 4>, <0 116 4>, <0 117 4>, <0 118 4>;
50 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
51 interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc 0x1>,
52 <0x0 0x0 0x0 0x2 &pcie_intc 0x2>,
53 <0x0 0x0 0x0 0x3 &pcie_intc 0x3>,
54 <0x0 0x0 0x0 0x4 &pcie_intc 0x4>;
57 reg = <0x0 0xfd0e0000 0x0 0x1000>,
58 <0x0 0xfd480000 0x0 0x1000>,
59 <0x80 0x00000000 0x0 0x1000000>;
[all …]
/Documentation/hwmon/
Dk10temp.rst10 Socket AM2+: Quad-Core Opteron, Phenom (II) X3/X4, Athlon X2 (but see below)
12 Socket AM3: Quad-Core Opteron, Athlon/Phenom II X2/X3/X4, Sempron II
18 Socket S1G2: Athlon (X2), Sempron (X2), Turion X2 (Ultra)
53 BIOS and Kernel Developer's Guide (BKDG) for AMD Family 14h Models 00h-0Fh Processors:
69 Revision Guide for AMD Family 14h Models 00h-0Fh Processors:
/Documentation/devicetree/bindings/security/tpm/
Dibmvtpm.txt30 ibm,#dma-size-cells = <0x2>;
33 ibm,my-drc-index = <0x30000003>;
34 ibm,#dma-address-cells = <0x2>;
35 linux,sml-base = <0xc60e 0x0>;
36 interrupts = <0xa0003 0x0>;
37 ibm,my-dma-window = <0x10000003 0x0 0x0 0x0 0x10000000>;
39 reg = <0x30000003>;
40 linux,sml-size = <0xbce10200>;
/Documentation/devicetree/bindings/gpio/
Dgpio-xilinx.txt35 reg = < 0x40000000 0x10000 >;
36 xlnx,all-inputs = <0x0>;
37 xlnx,all-inputs-2 = <0x0>;
38 xlnx,dout-default = <0x0>;
39 xlnx,dout-default-2 = <0x0>;
40 xlnx,gpio-width = <0x2>;
41 xlnx,gpio2-width = <0x2>;
42 xlnx,interrupt-present = <0x1>;
43 xlnx,is-dual = <0x1>;
44 xlnx,tri-default = <0xffffffff>;
[all …]
/Documentation/devicetree/bindings/display/
Dssd1289fb.txt10 display@2,0 {
12 reg = <0x2 0x0000 0x0004>;
/Documentation/devicetree/bindings/input/
Dspear-keyboard.txt9 - st,mode: keyboard mode: 0 - 9x9, 1 - 6x6, 2 - 2x2
15 reg = <0xfc400000 0x100>;
16 linux,keymap = < 0x00030012
17 0x0102003a >;
19 st,mode = <0>;

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