Searched +full:0 +full:x30 (Results 1 – 25 of 99) sorted by relevance
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| /Documentation/dev-tools/ |
| D | kfence.rst | 29 CONFIG_KFENCE_SAMPLE_INTERVAL=0
41 ``CONFIG_KFENCE_SAMPLE_INTERVAL``. Setting ``kfence.sample_interval=0``
68 BUG: KFENCE: out-of-bounds read in test_out_of_bounds_read+0xa3/0x22b
70 Out-of-bounds read at 0xffffffffb672efff (1B left of kfence-#17):
71 test_out_of_bounds_read+0xa3/0x22b
72 kunit_try_run_case+0x51/0x85
73 kunit_generic_run_threadfn_adapter+0x16/0x30
74 kthread+0x137/0x160
75 ret_from_fork+0x22/0x30
77 …kfence-#17 [0xffffffffb672f000-0xffffffffb672f01f, size=32, cache=kmalloc-32] allocated by task 50…
[all …]
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| /Documentation/misc-devices/ |
| D | eeprom.rst | 11 Addresses scanned: I2C 0x50 - 0x57
28 24C01 1K 0x50 (shadows at 0x51 - 0x57)
29 24C01A 1K 0x50 - 0x57 (Typical device on DIMMs)
30 24C02 2K 0x50 - 0x57
31 24C04 4K 0x50, 0x52, 0x54, 0x56
32 (additional data at 0x51, 0x53, 0x55, 0x57)
33 24C08 8K 0x50, 0x54 (additional data at 0x51, 0x52,
34 0x53, 0x55, 0x56, 0x57)
35 24C16 16K 0x50 (additional data at 0x51 - 0x57)
36 Sony 2K 0x57
[all …]
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| /Documentation/devicetree/bindings/timer/ |
| D | marvell,armada-370-xp-timer.txt | 31 reg = <0x20300 0x30>, <0x21040 0x30>;
40 reg = <0x20300 0x30>, <0x21040 0x30>;
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| D | jcore,pit.txt | 22 reg = < 0x200 0x30 0x500 0x30 >;
23 interrupts = < 0x48 >;
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| /Documentation/devicetree/bindings/clock/ |
| D | qcom,hfpll.txt | 37 starting at 0. Otherwise hfpll_Y where Y is more specific
46 reg = <0xf9016000 0x30>;
56 reg = <0xf908a000 0x30>, <0xf900a000 0x30>;
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| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | jcore,aic.txt | 23 reg = < 0x200 0x30 0x500 0x30 >;
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| D | brcm,bcm7038-l1-intc.txt | 54 reg = <0x1041a400 0x30 0x1041a600 0x30>;
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| D | brcm,l2-intc.txt | 26 reg = <0xf0441000 0x30>;
30 interrupts = <0x0 0x20 0x0>;
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| /Documentation/devicetree/bindings/net/ |
| D | mdio-mux-mmioreg.txt | 23 The FPGA node defines a memory-mapped FPGA with a register space of 0x30 bytes.
25 A bitmask of 0x6 means that bits 1 and 2 (bit 0 is lsb) are the bits on
29 fpga: board-control@3,0 {
33 reg = <3 0 0x30>;
34 ranges = <0 3 0 0x30>;
40 #size-cells = <0>;
42 mux-mask = <0x6>; // EMI2
44 emi2_slot1: mdio@0 { // Slot 1 XAUI (FM2)
45 reg = <0>;
47 #size-cells = <0>;
[all …]
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| D | brcm,bcm7445-switch-v4.0.txt | 6 "brcm,bcm7445-switch-v4.0"
7 "brcm,bcm7278-switch-v4.0"
13 - #size-cells: must be 0, see dsa/dsa.txt
73 ranges = <0 0xf0b00000 0x40804>;
75 ethernet_switch@0 {
76 compatible = "brcm,bcm7445-switch-v4.0";
77 #size-cells = <0>;
79 reg = <0x0 0x40000
80 0x40000 0x110
81 0x40340 0x30
[all …]
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| D | cavium-mdio.txt | 15 - #size-cells: Must be <0>. MDIO addresses have no size component.
23 #size-cells = <0>;
24 reg = <0x11800 0x00001800 0x0 0x40>;
26 ethernet-phy@0 {
28 reg = <0>;
58 reg = <0x0b00 0 0 0 0>; /* DEVFN = 0x0b (1:3) */
59 assigned-addresses = <0x03000000 0x87e0 0x05000000 0x0 0x800000>;
60 ranges = <0x87e0 0x05000000 0x03000000 0x87e0 0x05000000 0x0 0x800000>;
65 #size-cells = <0>;
66 reg = <0x87e0 0x05003800 0x0 0x30>;
[all …]
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| D | rockchip-dwmac.txt | 31 - pinctrl-0: pin-control mode. can be <&rgmii_pins> or <&rmii_pins>.
43 - tx_delay: Delay value for TXD timing. Range value is 0~0x7F, 0x30 as default.
44 - rx_delay: Delay value for RXD timing. Range value is 0~0x7F, 0x10 as default.
51 reg = <0xff290000 0x10000>;
65 pinctrl-0 = <&rgmii_pins /*&rmii_pins*/>;
68 snps,reset-gpio = <&gpio4 7 0>;
73 tx_delay = <0x30>;
74 rx_delay = <0x10>;
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| /Documentation/i2c/ |
| D | slave-testunit-backend.rst | 19 Instantiating the device is regular. Example for bus 0, address 0x30:
21 # echo "slave-testunit 0x1030" > /sys/bus/i2c/devices/i2c-0/new_device
28 0x00 CMD - which test to trigger
29 0x01 DATAL - configuration byte 1 for the test
30 0x02 DATAH - configuration byte 2 for the test
31 0x03 DELAY - delay in n * 10ms until test is started
47 0x00 NOOP (reserved for future use)
49 0x01 READ_BYTES (also needs master mode)
56 time, the bus will be busy. Example to read 128 bytes from device 0x50 after
59 # i2cset -y 0 0x30 0x01 0x50 0x80 0x05 i
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| /Documentation/devicetree/bindings/reset/ |
| D | intel,rcu-gw.yaml | 28 minimum: 0
54 reg = <0xe0000000 0x20000>;
55 intel,global-reset = <0x10 30>;
62 reg = <0xe0d00000 0x30>;
65 resets = <&rcu0 0x30 21>;
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| D | brcm,brcmstb-reset.txt | 20 reg = <0x8404318 0x30>;
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| /Documentation/devicetree/bindings/sound/ |
| D | marvell,mmp-sspa.yaml | 41 const: 0
103 reg = <0xd42a0c00 0x30>,
104 <0xd42a0c80 0x30>;
109 #sound-dai-cells = <0>;
110 dmas = <&adma0 0>, <&adma0 1>;
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| D | amlogic,axg-spdifin.txt | 12 - #sound-dai-cells: must be 0.
21 reg = <0x0 0x400 0x0 0x30>;
22 #sound-dai-cells = <0>;
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| /Documentation/devicetree/bindings/iio/magnetometer/ |
| D | mmc35240.txt | 12 reg = <0x30>;
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | pinctrl-single.txt | 32 pinctrl-single,power-source = <0x30 0xf0>;
38 pinctrl-single,bias-pullup = <0 1 0 1>;
44 pinctrl-single,bias-pulldown = <2 2 0 2>;
61 pinctrl-single,input-schmitt = <0x30 0x70>;
67 pinctrl-single,input-schmitt-enable = <0x30 0x40 0 0x70>;
74 pinctrl-single,low-power-mode = <0x288 0x388>;
83 pinctrl-single,gpio-range = <&range 0 3 0 &range 3 9 1>;
102 pinctrl-single,pins = <0xdc 0x118>;
104 Where 0xdc is the offset from the pinctrl register base address for the device
105 pinctrl register, and 0x118 contains the desired value of the pinctrl register.
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| /Documentation/devicetree/bindings/phy/ |
| D | brcm,brcmstb-usb-phy.txt | 36 Possible values are: 0 (Don't invert), 1 (Invert)
38 Possible values are: 0 (Don't invert), 1 (Invert)
51 reg = <0xf0470200 0xb8>,
52 <0xf0471940 0x6c0>;
65 reg = <0x29f0200 0x200>,
66 <0x29c0880 0x30>,
67 <0x29cc100 0x534>,
68 <0x2808000 0x24>,
69 <0x2980080 0x8>;
75 brcm,ioc = <0x0>;
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| /Documentation/devicetree/bindings/leds/ |
| D | ams,as3645a.txt | 17 reg : The I2C address of the device. Typically 0x30.
19 #size-cells : 0
22 Required properties of the flash child node (0)
25 reg: 0
69 #size-cells = <0>;
70 reg = <0x30>;
72 led@0 {
73 reg = <0x0>;
81 reg = <0x1>;
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| /Documentation/devicetree/bindings/gpio/ |
| D | gpio-thunderx.txt | 20 gpio_6_0: gpio@6,0 {
22 reg = <0x3000 0 0 0 0>; /* DEVFN = 0x30 (6:0) */
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| /Documentation/devicetree/bindings/media/i2c/ |
| D | ov9650.txt | 25 reg = <0x30>;
26 reset-gpios = <&axi_gpio_0 0 GPIO_ACTIVE_HIGH>;
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| /Documentation/devicetree/bindings/ipmi/ |
| D | aspeed-kcs-bmc.txt | 29 reg = <0x24 0x1>, <0x30 0x1>, <0x3c 0x1>;
30 aspeed,lpc-reg = <0xca2>;
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| /Documentation/devicetree/bindings/leds/backlight/ |
| D | arcxcnn_bl.txt | 8 - default-brightness: brightness value on boot, value from: 0-4095
11 - led-sources: List of enabled channels from 0 to 5.
14 - arc,led-config-0: setting for register ILED_CONFIG_0
16 - arc,dim-freq: PWM mode frequence setting (bits [3:0] used)
27 reg = <0x30>;
31 led-sources = <0 1 2 5>;
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