Searched +full:0 +full:xd (Results 1 – 10 of 10) sorted by relevance
/Documentation/devicetree/bindings/pinctrl/ |
D | pinctrl_spear.txt | 12 - NAND_MODE : <0> 26 - AUTO_NET_SMII_MODE : <0> 50 drivers/pinctrl/spear/pinctrl-spear3*0.c 147 "gpt0", "gpt1", "sdhci", "cf", "xd", "touchscreen", "uart1", "uart2_3", 155 "xd", "clcd", "arm_trace", "miphy_dbg", "pcie", "sata"
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/Documentation/admin-guide/media/ |
D | dvb-usb-af9015-cardlist.rst | 11 :stub-columns: 0 29 * - Conceptronic USB2.0 DVB-T CTVDIGRCU V3.0 70 - 0ccd:0099 72 - 0ccd:0097 74 - 0ccd:0069 79 * - Xtensions XD-380
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/Documentation/devicetree/bindings/arm/ |
D | pmu.yaml | 78 Indicates that this PMU doesn't support the 0xc and 0xd events.
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/Documentation/dev-tools/ |
D | ubsan.rst | 22 CPU: 0 PID: 0 Comm: swapper Not tainted 4.4.0-rc1+ #26 27 [<ffffffff815e6cd6>] dump_stack+0x45/0x5f 28 [<ffffffff8163a5ed>] ubsan_epilogue+0xd/0x40 29 [<ffffffff8163ac2b>] __ubsan_handle_shift_out_of_bounds+0xeb/0x130 30 [<ffffffff815f0001>] ? radix_tree_gang_lookup_slot+0x51/0x150 31 [<ffffffff8173c586>] _mix_pool_bytes+0x1e6/0x480 32 [<ffffffff83105653>] ? dmi_walk_early+0x48/0x5c 33 [<ffffffff8173c881>] add_device_randomness+0x61/0x130 34 [<ffffffff83105b35>] ? dmi_save_one_device+0xaa/0xaa 35 [<ffffffff83105653>] dmi_walk_early+0x48/0x5c [all …]
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/Documentation/sound/cards/ |
D | emu10k1-jack.rst | 30 /usr/local/bin/jackd -R -dalsa -r48000 -p64 -n2 -D -Chw:0,2 -Phw:0,3 -S 60 capture_1 asio14 FXBUS2(0xe) 61 capture_2 asio15 FXBUS2(0xf) 62 capture_3 asio0 FXBUS2(0x0) 63 ~capture_4 Center EXTOUT(0x11) // mapped to by Center 64 ~capture_5 LFE EXTOUT(0x12) // mapped to by LFE 65 capture_6 asio3 FXBUS2(0x3) 66 capture_7 asio4 FXBUS2(0x4) 67 capture_8 asio5 FXBUS2(0x5) 68 capture_9 asio6 FXBUS2(0x6) [all …]
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/Documentation/admin-guide/hw-vuln/ |
D | special-register-buffer-data-sampling.rst | 42 Kabylake_L 06_8EH <= 0xC 43 Kabylake 06_9EH <= 0xD 97 IA32_MCU_OPT_CTRL MSR, (address 0x123). The presence of this MSR and 98 RNGDS_MITG_DIS (bit 0) is enumerated by CPUID.(EAX=07H,ECX=0).EDX[SRBDS_CTRL = 101 Setting IA32_MCU_OPT_CTRL[0] (RNGDS_MITG_DIS) to 1 for a logical processor
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/Documentation/sparc/oradax/ |
D | dax-hv-api.txt | 79 Only version 0 CCBs are available. 108 … Version 0 and 1 CCBs are available. Only version 0 CCBs may use Huffman encoded data, whereas only 115 …node indicates N interrupts available, the guest may use any value from 0 to N - 1 (inclusive) in … 140 [31:28] CCB version. For API version 2.0: set to 1 if CCB uses OZIP encoding; set to 0 if the… 141 uses Huffman encoding; otherwise either 0 or 1. For API version 1.0: always set to 0. 148 0x00 No Operation (No-op) or Sync 149 0x01 Extract 150 0x02 Scan Value 151 0x12 Inverted Scan Value 152 0x03 Scan Range [all …]
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/Documentation/devicetree/bindings/ |
D | numa.txt | 29 /* numa node 0 */ 30 numa-node-id = <0>; 65 0_______20______1 76 0 -> 1 = 20 79 3 -> 0 = 20 80 0 -> 2 = 40 87 distance-matrix = <0 0 10>, 88 <0 1 20>, 89 <0 2 40>, 90 <0 3 20>, [all …]
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/Documentation/filesystems/ext4/ |
D | journal.rst | 119 * - 0x0 122 - jbd2 magic number, 0xC03B3998. 123 * - 0x4 128 * - 0x8 179 * - 0x0 183 * - 0xC 187 * - 0x10 191 * - 0x14 199 * - 0x18 203 * - 0x1C [all …]
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/Documentation/x86/ |
D | boot.rst | 28 Protocol 2.02 (Kernel 2.4.0-test3-pre3) New command line protocol. 99 0A0000 +------------------------+ 121 0x100000 ("high memory"), and the kernel real-mode block (boot sector, 123 0x10000 and end of low memory. Unfortunately, in protocols 2.00 and 124 2.01 the 0x90000+ memory range is still used internally by the kernel; 139 0x90000 segment, the boot loader should make sure not to use memory 140 above the 0x9A000 point; too many BIOSes will break above that point. 149 0A0000 +------------------------+ 180 following header at offset 0x01f1. The real-mode code can total up to 195 01FE/2 ALL boot_flag 0xAA55 magic number [all …]
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