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/Documentation/ABI/testing/
Dsysfs-class-rapidio10 NOTE: An mport ID is not a RapidIO destination ID assigned to a
36 only fabric enumerating mports have a valid destination ID
39 After enumeration or discovery was performed for a given mport device,
48 drwxr-xr-x 3 root root 0 Feb 11 15:10 00:e:0001
49 drwxr-xr-x 3 root root 0 Feb 11 15:10 00:e:0004
50 drwxr-xr-x 3 root root 0 Feb 11 15:10 00:e:0007
51 drwxr-xr-x 3 root root 0 Feb 11 15:10 00:s:0002
52 drwxr-xr-x 3 root root 0 Feb 11 15:10 00:s:0003
53 drwxr-xr-x 3 root root 0 Feb 11 15:10 00:s:0005
54 lrwxrwxrwx 1 root root 0 Feb 11 15:11 device -> ../../../0000:01:00.0
[all …]
Dsysfs-class-switchtec7 KernelVersion: v4.11
10 Each registered switchtec driver is represented by a switchtecX
16 KernelVersion: v4.11
25 KernelVersion: v4.11
33 KernelVersion: v4.11
42 KernelVersion: v4.11
50 KernelVersion: v4.11
58 KernelVersion: v4.11
66 KernelVersion: v4.11
74 KernelVersion: v4.11
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/Documentation/devicetree/bindings/media/i2c/
Dtda1997x.txt6 - RGB 8bit per color (24 bits total): R[11:4] B[11:4] G[11:4]
7 - YUV444 8bit per color (24 bits total): Y[11:4] Cr[11:4] Cb[11:4]
8 - YUV422 semi-planar 8bit per component (16 bits total): Y[11:4] CbCr[11:4]
9 - YUV422 semi-planar 10bit per component (20 bits total): Y[11:2] CbCr[11:2]
10 - YUV422 semi-planar 12bit per component (24 bits total): - Y[11:0] CbCr[11:0]
11 - YUV422 BT656 8bit per component (8 bits total): YCbCr[11:4] (2-cycles)
12 - YUV422 BT656 10bit per component (10 bits total): YCbCr[11:2] (2-cycles)
13 - YUV422 BT656 12bit per component (12 bits total): YCbCr[11:0] (2-cycles)
16 - RGB 12bit per color (36 bits total): R[11:0] B[11:0] G[11:0]
17 - YUV444 12bit per color (36 bits total): Y[11:0] Cb[11:0] Cr[11:0]
[all …]
/Documentation/devicetree/bindings/interrupt-controller/
Dsifive,plic-1.0.0.yaml16 A hart context is a privilege mode in a hardware execution thread. For example,
21 a pending enabled interrupt and then release it once it has been handled.
23 Each interrupt has a configurable priority. Higher priority interrupts are
24 serviced first. Each context can specify a priority threshold. Interrupts
32 While the RISC-V ISA doesn't specify a memory layout for the PLIC, the
33 "sifive,plic-1.0.0" device is a concrete implementation of the PLIC that
34 contains a specific memory layout, which is documented in chapter 8 of the
63 that a context is not present. Each node pointed to should be a
64 riscv,cpu-intc node, which has a riscv node as parent.
90 &cpu0_intc 11
[all …]
/Documentation/hwmon/
Dmax16065.rst55 accurately monitor (+/-2.5%) one current channel using a dedicated high-side
67 one current channel using a dedicated high-side current-sense amplifier. The
86 any of the i2ctools commands on a command register (0xa5 to 0xac). The chips
87 supported by this driver interpret any access to a command register (including
90 turn into a brick.
97 in[0-11]_input Input voltage measurements.
103 in[0-11]_min Low warning limit.
107 in[0-11]_max High warning limit.
114 in[0-11]_lcrit Low critical limit.
116 in[0-11]_crit High critical limit.
[all …]
Dmax31785.rst19 The Maxim MAX31785 is a PMBus device providing closed-loop, multi-channel fan
61 temp[1-11]_crit Critical high temperature
62 temp[1-11]_crit_alarm Chip temperature critical high alarm
63 temp[1-11]_input Measured temperature
64 temp[1-11]_max Maximum temperature
65 temp[1-11]_max_alarm Chip temperature high alarm
Dk10temp.rst16 * AMD Family 11h processors:
45 BIOS and Kernel Developer's Guide (BKDG) for AMD Family 11h Processors:
61 Revision Guide for AMD Family 11h Processors:
73 AMD Family 11h Processor Power and Thermal Data Sheet for Notebooks:
91 Family 10h/11h/12h/14h/15h/16h processors.
93 All these processors have a sensor, but on those for Socket F or AM2+,
104 available as temp1_input in sysfs. It is measured in degrees Celsius with a
105 resolution of 1/8th degree. Please note that it is defined as a relative
109 control cooling systems. Tctl is a non-physical temperature on an
122 On some AMD CPUs, there is a difference between the die temperature (Tdie) and
[all …]
/Documentation/userspace-api/media/v4l/
Dpixfmt-sdr-pcu20be.rst14 This format contains a sequence of complex number samples. Each complex
16 and Q are represented as a 20 bit unsigned big endian number stored in
37 - I'\ :sub:`0[11:4]`
42 - I'\ :sub:`1[11:4]`
48 - Q'\ :sub:`0[11:4]`
53 - Q'\ :sub:`1[11:4]`
Dpixfmt-yuv420m.rst19 This is a multi-planar format, as opposed to a packed format. The three
25 Each Cb belongs to four pixels, a two-by-two square of the image. For
27 Y'\ :sub:`10`, and Y'\ :sub:`11`. The Cr data, just like the Cb plane,
59 - Y'\ :sub:`11`
78 - Cb\ :sub:`11`
85 - Cr\ :sub:`11`
Dpixfmt-y12i.rst9 Interleaved grey-scale image, e.g. from a stereo-pair
15 This is a grey-scale image with a depth of 12 bits per pixel, but with
17 in a 24-bit word in the little-endian order. On a little-endian machine
27 pixels cross the byte boundary and have a ratio of 3 bytes for each
35 - Y'\ :sub:`0right[3:0]`\ Y'\ :sub:`0left[11:8]`
36 - Y'\ :sub:`0right[11:4]`
Dpixfmt-nv12.rst22 first. The Y plane has one byte per pixel. For ``V4L2_PIX_FMT_NV12``, a
27 Y'\ :sub:`01`, Y'\ :sub:`10`, Y'\ :sub:`11`. ``V4L2_PIX_FMT_NV21`` is
29 with a Cr byte.
49 - Y'\ :sub:`11`
70 - Cb\ :sub:`11`
71 - Cr\ :sub:`11`
Dpixfmt-m420.rst16 M420 is a YUV format with ½ horizontal and vertical chroma subsampling
24 Y'\ :sub:`10`, Y'\ :sub:`11`.
44 - Y'\ :sub:`11`
65 - Cb\ :sub:`11`
66 - Cr\ :sub:`11`
Dpixfmt-yuv420.rst19 These are planar formats, as opposed to a packed format. The three
24 plane (and of the image). Each Cr belongs to four pixels, a two-by-two
26 Y'\ :sub:`01`, Y'\ :sub:`10`, and Y'\ :sub:`11`. Following the Cr plane
52 - Y'\ :sub:`11`
70 - Cr\ :sub:`11`
76 - Cb\ :sub:`11`
Dpixfmt-yvyu.rst18 Y's, a Cb and a Cr. Each Y goes to one of the pixels, and the Cb and Cr
42 - Y'\ :sub:`11`
45 - Cr\ :sub:`11`
47 - Cb\ :sub:`11`
Dpixfmt-uyvy.rst18 Y's, a Cb and a Cr. Each Y goes to one of the pixels, and the Cb and Cr
43 - Y'\ :sub:`11`
44 - Cb\ :sub:`11`
46 - Cr\ :sub:`11`
/Documentation/devicetree/bindings/sound/
Dcs35l32.txt15 - reset-gpios : a GPIO spec for the reset pin. If specified, it will be
28 Determines the data packed in a two-CS35L32 configuration.
29 0 = Left/right channels VMON[11:0], IMON[11:0], VPMON[7:0].
30 1 = Left/right channels VMON[11:0], IMON[11:0], STATUS.
/Documentation/core-api/
Dpacking.rst10 One can memory-map a pointer to a carefully crafted struct over the hardware
20 A more robust alternative to struct field definitions would be to extract the
34 - Packing a CPU-usable number into a memory buffer (with hardware
36 - Unpacking a memory buffer (which has hardware constraints/quirks)
37 into a CPU-usable number.
47 The following examples cover the memory layout of a packed u64 field.
57 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
73 24 25 26 27 28 29 30 31 16 17 18 19 20 21 22 23 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7
77 inverts bit offsets inside a byte.
86 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 23 22 21 20 19 18 17 16 31 30 29 28 27 26 25 24
[all …]
/Documentation/devicetree/bindings/serial/
Dqcom,msm-uart.txt3 The MSM serial UART hardware is designed for low-speed use cases where a
4 dma-engine isn't needed. From a software perspective it's mostly compatible
6 character at a time.
17 A uart device at 0xa9c00000 with interrupt 11.
22 interrupts = <11>;
/Documentation/devicetree/bindings/input/rmi4/
Drmi_2d_sensor.txt5 bindings for devices which contain 2D sensors using Function 11 or
10 RMI4 Function 11 and Function 12 are for 2D touch position sensing.
23 - syna,clip-x-low: Sets a minimum value for X.
24 - syna,clip-y-low: Sets a minimum value for Y.
25 - syna,clip-x-high: Sets a maximum value for X.
26 - syna,clip-y-high: Sets a maximum value for Y.
38 - syna,rezero-wait-ms: Time in miliseconds to wait after issuing a rezero
42 Example of a RMI4 I2C device with F11:
50 rmi4-f11@11 {
/Documentation/devicetree/bindings/pci/
Dv3-v360epc-pci.txt12 - interrupts: should contain a reference to the V3 error interrupt
22 be aligned to a 1MB boundary, and may be 1MB, 2MB, 4MB, 8MB, 16MB, 32MB,
27 - syscon: should contain a link to the syscon device node, since
56 0x4800 0 0 1 &pic 13 /* INT A on slot 9 is irq 13 */
61 0x5000 0 0 1 &pic 14 /* INT A on slot 10 is irq 14 */
65 /* IDSEL 11 */
66 0x5800 0 0 1 &pic 15 /* INT A on slot 11 is irq 15 */
67 0x5800 0 0 2 &pic 16 /* INT B on slot 11 is irq 16 */
68 0x5800 0 0 3 &pic 13 /* INT C on slot 11 is irq 13 */
69 0x5800 0 0 4 &pic 14 /* INT D on slot 11 is irq 14 */
[all …]
/Documentation/pcmcia/
Ddriver-changes.rst29 ranges. After a call to pcmcia_request_window(), the regions found there
36 ranges. After a call to pcmcia_request_io(), the ports found there
41 dev_info_t and a few other typedefs are removed. No longer use them
46 There is no more need to fill out a "dev_node_t" structure.
64 pcmcia_parse_tuple(), a driver shall use "pcmcia_get_tuple()" if it is
67 a new helper "pcmcia_get_mac_from_cis()" was added.
70 By calling pcmcia_loop_config(), a driver can iterate over all available
71 configuration options. During a driver's probe() phase, one doesn't need
106 * Device model integration (as of 2.6.11)
107 A struct pcmcia_device is registered with the device model core,
[all …]
/Documentation/devicetree/bindings/display/exynos/
Dsamsung-fimd.txt4 Samsung series of SoCs which transfers the image data from a video memory
19 - interrupts: should contain a list of all FIMD IP block interrupts in the
29 - pinctrl-names: must contain a "default" entry.
38 - power-domains: a phandle to FIMD power domain node.
89 fimd@11c00000 {
94 interrupts = <11 0>, <11 1>, <11 2>;
103 fimd@11c00000 {
/Documentation/ABI/stable/
Dsysfs-class-tpm5 Description: The device/ directory under a specific TPM instance exposes
13 Description: The "active" property prints a '1' if the TPM chip is accepting
16 visible to the OS, but will only accept a restricted set of
41 Manufacturer is a hex dump of the 4 byte manufacturer info
42 space in a TPM. TCG version shows the TCG TPM spec level that
51 used to wait for a short, medium and long TPM command. All
54 any longer than necessary before starting to poll for a
64 Durations can be modified in the case where a buggy chip
73 Description: The "enabled" property prints a '1' if the TPM chip is enabled,
75 may be visible but produce a '0' after some operation that
[all …]
/Documentation/devicetree/bindings/pinctrl/
Dfsl,vf610-pinctrl.txt8 - fsl,pins: two integers array, represents a group of pins mux and config
10 a pin working on a specific function, CONFIG is the pad setting value
18 PAD_CTL_SRE_FAST (1 << 11)
19 PAD_CTL_SRE_SLOW (0 << 11)
/Documentation/accounting/
Dcgroupstats.rst6 http://lkml.org/lkml/2007/4/11/187 and implements per cgroup statistics as
7 suggested by Andrew Morton in http://lkml.org/lkml/2007/4/11/263.
10 interface. A new set of cgroup operations are registered with commands
15 The current model for cgroupstats is a pull, a push model (to post
25 To extract cgroup statistics a utility very similar to getdelays.c
28 ~/balbir/cgroupstats # ./getdelays -C "/sys/fs/cgroup/a"

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