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/Documentation/hwmon/
Dadm1026.rst23 List of GPIO pins (0-16) to program as inputs
26 List of GPIO pins (0-16) to program as outputs
29 List of GPIO pins (0-16) to program as inverted
32 List of GPIO pins (0-16) to program as normal/non-inverted
45 16 general purpose digital I/O lines, eight (8) fan speed sensors (8-bit),
69 higher voltages directly. 3.3V, 5V, 12V, -12V and battery voltage all have
70 dedicated inputs. There are several inputs scaled to 0-3V full-scale range
72 a 0-2.5V full-scale range. A 2.5V or 1.82V reference voltage is provided
Ddme1737.rst94 in0: +5VTR (+5V standby) 0V - 6.64V
95 in1: Vccp (processor core) 0V - 3V
96 in2: VCC (internal +3.3V) 0V - 4.38V
97 in3: +5V 0V - 6.64V
98 in4: +12V 0V - 16V
99 in5: VTR (+3.3V standby) 0V - 4.38V
100 in6: Vbat (+3.0V) 0V - 4.38V
104 in0: +2.5V 0V - 3.32V
105 in1: Vccp (processor core) 0V - 2V
106 in2: VCC (internal +3.3V) 0V - 4.38V
[all …]
Dadm1025.rst26 * No INT mode for pin 16. We don't play with it anyway.
38 are provided, for monitoring +2.5V, +3.3V, +5V and +12V power supplies and
45 different manners. It can act as the +12V power-supply voltage analog
52 properly, you'll have a wrong +12V reading or a wrong VID reading. The way
Dmc13783-adc.rst29 Among other things they contain a 10-bit A/D converter. The converter has 16
47 0 Battery Voltage (BATT) 2.50 - 4.65V -2.40V
49 2 Application Supply (BP) 2.50 - 4.65V -2.40V
50 3 Charger Voltage (CHRGRAW) 0 - 10V / /5
51 0 - 20V /10
52 4 Charger Current (CHRGISNSP-CHRGISNSN) -0.25 - 0.25V x4
53 5 General Purpose ADIN5 / Battery Pack Thermistor 0 - 2.30V No
54 6 General Purpose ADIN6 / Backup Voltage (LICELL) 0 - 2.30V / No /
55 1.50 - 3.50V -1.20V
56 7 General Purpose ADIN7 / UID / Die Temperature 0 - 2.30V / No /
[all …]
Dfam15h_power.rst8 * AMD Family 16h Processors
17 - BIOS and Kernel Developer's Guide (BKDG) For AMD Family 16h Processors
33 of AMD Family 15h and 16h processors via TDP algorithm.
35 For AMD Family 15h and 16h processors the following power values can
110 v. Calculate the average power consumption for a compute unit over
/Documentation/fb/
Dviafb.modes29 # D: 25.175 MHz, H: 31.469 kHz, V: 59.94 Hz
31 timings 39722 48 16 33 10 96 2 endmode mode "480x640-60"
32 # D: 24.823 MHz, H: 39.780 kHz, V: 60.00 Hz
45 # 15 chars 16 lines
53 # D: 31.50 MHz, H: 37.500 kHz, V: 75.00 Hz
54 geometry 640 480 640 480 32 timings 31747 120 16 16 1 64 3 endmode
74 # D: 36.000 MHz, H: 43.269 kHz, V: 85.00 Hz
95 # D: 43.163 MHz, H: 50.900 kHz, V: 100.00 Hz
116 # D: 52.406 MHz, H: 61.800 kHz, V: 120.00 Hz
137 # D: 26.880 MHz, H: 30.000 kHz, V: 60.24 Hz
[all …]
Ds3fb.rst10 S3 Trio64 (and variants V+, UV+, V2/DX, V2/GX)
19 I tested s3fb on Trio64 (plain, V+ and V2/DX) and Virge (plain, VX, DX),
28 * 16 bpp truecolor modes (RGB 555 and RGB 565)
42 (hardware limitation) and 16bit tall fonts (driver limitation). Text mode
64 * support for fontheight != 16 in text mode
/Documentation/userspace-api/media/v4l/
Dpixfmt-meta-vsp1-hgo.rst52 - [23:16]
67 - B/Cb/V max [7:0]
69 - B/Cb/V min [7:0]
72 * - 16
75 - :cspan:`4` B/Cb/V sum [31:0]
89 - :cspan:`4` B/Cb/V bin 0 [31:0]
93 - :cspan:`4` B/Cb/V bin 63 [31:0]
103 - [23:16]
128 - [23:16]
153 - [23:16]
/Documentation/devicetree/bindings/iio/dac/
Dad5755.txt48 0: 0 V to 5 V voltage range.
49 1: 0 V to 10 V voltage range.
50 2: Plus minus 5 V voltage range.
51 3: Plus minus 10 V voltage range.
74 16
83 16
/Documentation/userspace-api/media/drivers/
Dcx2341x-uapi.rst14 The format is YUV 4:2:0 which uses 1 Y byte per pixel and 1 U and V byte per
20 The Y plane is divided into blocks of 16x16 pixels from left to right
23 So the first 16 bytes are the first line of the top-left block, the
24 second 16 bytes are the second line of the top-left block, etc. After
28 The UV plane is divided into blocks of 16x8 UV values going from left
31 So the first 16 bytes are the first line of the top-left block and
32 contain 8 UV value pairs (16 bytes in total). The second 16 bytes are the
38 Y, U and V planes. This code assumes frames of 720x576 (PAL) pixels.
67 // The Y plane is divided into blocks of 16x16 pixels
69 for (y = 0; y < h; y += 16) {
[all …]
/Documentation/devicetree/bindings/iio/adc/
Dqcom,spmi-vadc.yaml17 voltage. The VADC is a 16-bit sigma-delta ADC.
115 specified VADC will use the VDD reference (1.8V) and GND for
117 calibrated with 0.625V and 1.25V reference channels, also
121 the VDD reference (1.875V) and GND for channel calibration. If
122 property is not found, channel will be calibrated with 0V and 1.25V
165 enum: [ 1, 2, 4, 8, 16, 32, 64, 128, 256, 512 ]
188 enum: [ 1, 2, 4, 8, 16 ]
207 4, 6, 8, 10, 16, 32, 64, 128 ]
211 enum: [ 1, 2, 4, 8, 16 ]
234 enum: [ 1, 2, 4, 8, 16 ]
Dti,ads8344.yaml13 16bit 8-channel ADC with single ended inputs.
25 description: Supply the 2.5V or 5V reference voltage
Dti,ads7950.yaml13 Family of 4-16 channel, 8-12 bit ADCs with SPI interface.
38 description: Supplies the 2.5V or 5V reference voltage
/Documentation/arm/sa1100/
Dlart.rst9 between 3.5V and 16V and is overdimensioned to support a range of
/Documentation/devicetree/bindings/display/bridge/
Dtoshiba,tc358768.yaml30 description: Regulator for 1.2V internal core power.
33 description: Regulator for 1.2V for the MIPI.
36 description: Regulator for 1.8V - 3.3V IO power.
72 enum: [ 16, 18, 24 ]
/Documentation/devicetree/bindings/power/supply/
Dbq24257.txt28 not specified a default of 6,5000,000 (=6.5V) is used.
31 (=4.36V) is used.
39 interrupts = <16 IRQ_TYPE_EDGE_BOTH>;
54 interrupts = <16 IRQ_TYPE_EDGE_BOTH>;
Dti,bq24735.txt20 must be between 1.024V and 19.2V with a 16mV step resolution. The POR value
/Documentation/riscv/
Dboot-image-header.rst2 Boot image header in RISC-V Linux
8 This document only describes the boot image header details for RISC-V Linux.
28 ARM64 header. Thus, both ARM64 & RISC-V header can be combined into one common
34 - This header can also be reused to support EFI stub for RISC-V in future. EFI
44 Bits 16:31 Major version
/Documentation/ABI/testing/
Dsysfs-bus-iio-adc-hi84358 threshold detector input channel. Channels 0..7, 8..15, 16..23
23 The low voltage threshold range is between 2..21V.
43 The high voltage threshold range is between 3..22V.
/Documentation/devicetree/bindings/sound/
Dst,sta350.txt16 - vdd-dig-supply: regulator spec, providing 3.3V
17 - vdd-pll-supply: regulator spec, providing 3.3V
18 - vcc-supply: regulator spec, providing 5V - 26V
110 are 1, 2, 4, 8, 16, 32, 64 and 128.
119 power-down-gpios = <&gpio1 16 0>;
Dst,sta32x.txt16 - Vdda-supply: regulator spec, providing 3.3V
17 - Vdd3-supply: regulator spec, providing 3.3V
18 - Vcc-supply: regulator spec, providing 5V - 26V
89 power-down-gpios = <&gpio1 16 0>;
/Documentation/devicetree/bindings/hwmon/
Dmaxim,max20730.yaml16 with PMBus for applications operating from 4.5V to 16V and requiring
/Documentation/userspace-api/media/cec/
Dcec-ioc-dqevent.rst82 :widths: 1 1 16
138 :widths: 3 1 16
185 * .. _`CEC-EVENT-PIN-5V-LOW`:
189 - Generated if the 5V pin goes from a high voltage to a low voltage.
191 capability set. When open() is called, the 5V pin can be read and
192 if the 5V is low, then an initial event will be generated for that
194 * .. _`CEC-EVENT-PIN-5V-HIGH`:
198 - Generated if the 5V pin goes from a low voltage to a high voltage.
200 capability set. When open() is called, the 5V pin can be read and
201 if the 5V is high, then an initial event will be generated for that
/Documentation/devicetree/bindings/mmc/
Dbrcm,sdhci-iproc.txt20 8, 16, 32-bit host access to SDHCI register.
36 no-1-8-v;
/Documentation/admin-guide/auxdisplay/
Dcfag12864b.rst64 (10) [+5v]---( 1) Vdd
66 (12) [+5v]---(14) Reset
70 Init (16)------------------------------(12) Controller Select 2
71 Select (17)------------------------------(16) Data / Instruction
72 Ground (18)---[GND] [+5v]---(19) LED +

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