| /Documentation/filesystems/ext4/ |
| D | blocks.rst | 7 sectors between 1KiB and 64KiB, and the number of sectors must be an
10 4KiB. You may experience mounting problems if block size is greater than
11 page size (i.e. 64KiB blocks on a i386 which only has 4KiB memory
20 :widths: 1 1 1 1 1
21 :header-rows: 1
24 - 1KiB
25 - 2KiB
26 - 4KiB
27 - 64KiB
66 - 1,074,791,436
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| D | bigalloc.rst | 6 At the moment, the default size of a block is 4KiB, which is a commonly
18 megabyte range, it might make sense to set a cluster size of 1 megabyte.
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| /Documentation/admin-guide/device-mapper/ |
| D | dm-ebs.rst | 30 1, 2, 4, 8 sectors of 512 bytes supported.
36 2^N supported, e.g. 8 = emulate 8 sectors of 512 bytes = 4KiB.
42 Emulate 1 sector = 512 bytes logical block size on /dev/sda starting at
45 ebs /dev/sda 1024 1
47 Emulate 2 sector = 1KiB logical block size on /dev/sda starting at
48 offset 128 sectors, enforce 2KiB underlying device block size.
49 This presumes 2KiB logical blocksize on /dev/sda or less to work:
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| D | dm-integrity.rst | 29 instead of a journal. If a bit in the bitmap is 1, the corresponding
43 1. overwrite the superblock with zeroes
56 1. the underlying block device
204 1. the number of integrity mismatches
217 * superblock (4kiB)
240 * metadata area (4kiB), it contains journal entries
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| /Documentation/arm/ |
| D | tcm.rst | 8 This is usually just a few (4-64) KiB of RAM inside the ARM
15 The size of DTCM or ITCM is minimum 4KiB so the typical
16 minimum configuration is 4KiB ITCM and 4KiB DTCM.
24 determine if ITCM (bits 1-0) and/or DTCM (bit 17-16) is present
39 implementation will map the TCM 1 to 1 from physical to virtual
42 on, supporting a maximum of 32KiB of ITCM and 32KiB of DTCM.
45 TCMs in two separate banks, so for example an 8KiB ITCM is divided
46 into two 4KiB banks with its own control registers. The idea is to
153 tcmem[1] = 0x2BADBABEU;
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| D | booting.rst | 19 1. Setup and initialise the RAM.
27 1. Setup and initialise RAM
124 it. The recommended placement is in the first 16KiB of RAM.
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| /Documentation/arm/samsung-s3c24xx/ |
| D | nand.rst | 11 The driver uses a 512 byte (1 page) ECC code for this setup. The
18 The driver is capable of handling NAND flash with a 2KiB page
22 each 256 byte block in an 2KiB page. This means that more than
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| D | suspend.rst | 18 1) A bootloader that can support the necessary resume operation
20 2) Support for at least 1 source for resume
87 1) The uart drivers will disable the clocks to the UART blocks when
127 `S3C2410 PM Suspend CRC Chunksize (KiB)`
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| /Documentation/filesystems/nfs/ |
| D | rpc-server-gss.rst | 8 NFSv4.1 and higher don't require the client to act as a server for the
55 A) It can handle tokens that are no bigger than 2KiB
58 beyond 64KiB in size due to various authorization extensions attacked to
65 back to the kernel (4KiB).
85 to /var/run/gssproxy.sock and then write "1" to
93 "1"--the read will block until gss-proxy has done its write to the file.
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| /Documentation/devicetree/bindings/misc/ |
| D | brcm,kona-smc.txt | 14 reg = <0x3404c000 0x400>; //1 KiB in SRAM
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| D | aspeed-p2a-ctrl.txt | 6 In this case, the host has access to a 64KiB window into all of the BMC's
38 syscon: scu@1e6e2000 {
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| /Documentation/admin-guide/ |
| D | perf-security.rst | 9 Usage of Performance Counters for Linux (perf_events) [1]_ , [2]_ , [3]_
19 1. System hardware and software configuration data, for example: a CPU
108 1. Create perf_users group of privileged Perf users, assign perf_users
172 -1:
189 >=1:
234 is set to 516 KiB, then a user process is provided with 516 KiB * 8 =
235 4128 KiB of memory above the RLIMIT_MEMLOCK limit (ulimit -l) for
238 required to manually distribute the available 4128 KiB between the
241 allocates all available 4128 KiB and the other processes will fail to
253 .. [1] `<https://lwn.net/Articles/337493/>`_ citation in Bibliography
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| D | ldm.rst | 13 1MiB journalled database at the end of the physical disk. The size of
43 The missing 1MiB at the end of the disk is where the LDM database is
51 |hda1 || 51380224 | 100352 | 49 || 1048576 | 2048 | 1|
71 hda: 102400 sectors w/32KiB Cache, CHS=50/64/32
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| D | xfs.rst | 26 doing delayed allocation writeout (default size is 64KiB).
27 Valid values for this option are page size (typically 4KiB)
28 through to 1GiB, inclusive, in power-of-2 increments.
130 Valid sizes for version 1 and version 2 logs are 16384 (16k)
136 The default value for version 1 logs is 32768, while the
267 fs.xfs.stats_clear (Min: 0 Default: 0 Max: 1)
268 Setting this to "1" clears accumulated XFS statistics
275 fs.xfs.filestream_centisecs (Min: 1 Default: 3000 Max: 360000)
281 (Units: seconds Min: 1 Default: 300 Max: 86400)
293 XFS_ERRLEVEL_LOW: 1
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| /Documentation/translations/zh_CN/arm/ |
| D | Booting | 40 1、设置和初始化 RAM。
47 1、设置和初始化 RAM
120 建议放在 RAM 的头 16KiB 中。
132 dtb 必须置于内核自解压不会覆盖的内存区。建议将其放置于 RAM 的头 16KiB
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| /Documentation/virt/kvm/devices/ |
| D | mpic.rst | 21 Base address of the 256 KiB MPIC register space. Must be
34 IRQ input line for each standard openpic source. 0 is inactive and 1
37 For edge-triggered interrupts: Writing 1 is considered an activating
38 edge, and writing 0 is ignored. Reading returns 1 if a previously
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| /Documentation/filesystems/ |
| D | vfat.rst | 28 The permission mask (for files and directories, see *umask(1)*).
96 end in '~1' or tilde followed by some number. If this
100 be the short alias instead of longfi~1.txt.
216 **dos1xfloppy <bool>: 0,1,yes,no,true,false**
219 parameters match defaults assumed by DOS 1.x for 160 kiB,
220 180 kiB, 320 kiB, and 360 kiB floppies and floppy images.
339 1) The attribute byte for a slot directory entry is always set
355 1) Positioning. Slots for a file always immediately proceed
365 <slot #1, id = 0x01, characters = "My Big File.E">
370 are numbered from 1 to N. The Nth slot is ``or'ed`` with
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| D | squashfs.rst | 12 maximum of 1Mbytes (default block size 128K).
22 1. Filesystem Features
35 Max block size 1 MiB 4 KiB
179 is split into slots, caching up to eight 224 GiB files (128 KiB blocks).
182 16 KiB.
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| D | ubifs.rst | 21 1 MTD devices represent flash devices and they consist of eraseblocks of
22 rather large size, typically about 128KiB. Block devices consist of
31 typically 100K-1G for SLC NAND and NOR flashes, and 1K-10K for MLC
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| /Documentation/devicetree/bindings/sram/ |
| D | sram.yaml | 35 maxItems: 1
43 const: 1
46 const: 1
88 maxItems: 1
143 reg = <0x5c000000 0x40000>; /* 256 KiB SRAM at address 0x5c000000 */
145 #address-cells = <1>;
146 #size-cells = <1>;
175 #address-cells = <1>;
176 #size-cells = <1>;
200 #address-cells = <1>;
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| /Documentation/devicetree/bindings/soc/fsl/ |
| D | bman.txt | 83 - The size must be 2^(size + 1), with size = 11..33. That is 4 KiB to
127 interrupts = <16 2 1 2>;
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| D | qman.txt | 110 - The size must be 2^(size + 1), with size = 11..29. That is 4 KiB to
111 1 GiB
158 #clock-cells = <1>;
176 interrupts = <16 2 1 3>
180 clocks = <&platform_pll 1>;
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| /Documentation/devicetree/bindings/bus/ |
| D | qcom,ebi2.txt | 8 lines (up to 9 address lines so can only address 1KiB external memory space),
56 - #size-cells: should be <1>
59 <1 0x0 0x1b000000 0x00800000>,
81 value is actually 1, so a value of 0 will still yield 1 recovery cycle.
83 inserted after every write minimum 1. The data out is driven from the time
84 WE is asserted until CS is asserted. With a hold of 1 (value = 0), the CS
85 stays active for 1 extra cycle etc. Valid values 0 thru 15.
90 - qcom,xmem-write-wait-cycles: number of wait cycles for every write access, 0=1
92 - qcom,xmem-read-wait-cycles: number of wait cycles for every read access, 0=1
101 2 means 2 cycles between ADV and OE. Valid values 0, 1, 2 or 3.
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| /Documentation/staging/ |
| D | xz.rst | 54 which will use no BCJ filter and 1 MiB LZMA2 dictionary.
76 by the kernel. 1 MiB is probably the maximum reasonable dictionary
81 xz --check=crc32 --lzma2=dict=512KiB inputfile
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| /Documentation/devicetree/bindings/pci/ |
| D | nvidia,tegra20-pcie.txt | 30 - cell 1 denotes the upper 32 address bits and should be 0
50 - #interrupt-cells: Size representation for interrupts (must be 1)
74 - pinctrl-1: phandle for the idle state of pin configurations.
150 - Root port 0 uses 4 lanes, root port 1 is unused.
179 #interrupt-cells = <1>;
188 0x82000000 0 0x80001000 0x80001000 0 0x00001000 /* port 1 registers */
199 pci@1,0 {
237 pci@1,0 {
280 #interrupt-cells = <1>;
289 0x82000000 0 0x00001000 0x00001000 0 0x00001000 /* port 1 configuration space */
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