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/Documentation/devicetree/bindings/clock/
Darmada3700-periph-clock.txt36 0 gbe-50 50 MHz parent clock for Gigabit Ethernet
39 3 gbe1-50 50 MHz clock for Gigabit Ethernet port 1
40 4 gbe0-50 50 MHz clock for Gigabit Ethernet port 0
Dsilabs,si570.txt24 one of: 7, 20, 50 or 100.
36 temperature-stability = <50>;
Dimx25-clock.yaml69 nfc_ipg_per 50
184 clocks = <&clks 79>, <&clks 50>;
/Documentation/scsi/
Daic7xxx.rst63 AHA-274X[A] aic7770 EISA SE-50M SE-HD50F
65 SE-50M
66 AHA-274X[A]T aic7770 EISA 2 X SE-50M SE-HD50F
67 AHA-2842 aic7770 VL SE-50M SE-HD50F
68 AHA-2940AU aic7860 PCI/32 SE-50M SE-HD50F
69 AVA-2902I aic7860 PCI/32 SE-50M
70 AVA-2902E aic7860 PCI/32 SE-50M
71 AVA-2906 aic7856 PCI/32 SE-50M SE-DB25F
72 APC-7850 aic7850 PCI/32 SE-50M 1
73 AVA-2940 aic7860 PCI/32 SE-50M
[all …]
/Documentation/devicetree/bindings/
Dtrivial-devices.yaml155 # Microchip 7-bit Single I2C Digital POT (50k)
163 # Microchip 7-bit Single I2C Digital POT (50k)
171 # Microchip 7-bit Single I2C Digital POT (50k)
179 # Microchip 7-bit Single I2C Digital Potentiometer (50k)
187 # Microchip 7-bit Single I2C Digital Potentiometer (50k)
195 # Microchip 7-bit Single I2C Digital Potentiometer with NV Memory (50k)
203 # Microchip 7-bit Single I2C Digital Potentiometer with NV Memory (50k)
211 # Microchip 8-bit Single I2C Digital Potentiometer (50k)
219 # Microchip 8-bit Single I2C Digital Potentiometer (50k)
227 # Microchip 8-bit Single I2C Digital Potentiometer with NV Memory (50k)
[all …]
/Documentation/devicetree/bindings/phy/
Drockchip-emmc-phy.txt17 Possible values are 33, 40, 50, 66 and 100.
18 If not set, the default value of 50 will be applied.
35 drive-impedance-ohm = <50>;
/Documentation/devicetree/bindings/input/touchscreen/
Dstmpe.txt15 1 -> 50 us
21 7 -> 50 ms
29 6 -> 50 ms
35 1 -> 50 mA (typical 80 mA max)
100 * 50 mA typical 80 mA max touchscreen drivers
/Documentation/core-api/
Dpacking.rst55 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
71 56 57 58 59 60 61 62 63 48 49 50 51 52 53 54 55 40 41 42 43 44 45 46 47 32 33 34 35 36 37 38 39
84 39 38 37 36 35 34 33 32 47 46 45 44 43 42 41 40 55 54 53 52 51 50 49 48 63 62 61 60 59 58 57 56
98 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63
110 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
125 56 57 58 59 60 61 62 63 48 49 50 51 52 53 54 55 40 41 42 43 44 45 46 47 32 33 34 35 36 37 38 39
136 39 38 37 36 35 34 33 32 47 46 45 44 43 42 41 40 55 54 53 52 51 50 49 48 63 62 61 60 59 58 57 56
147 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63
/Documentation/input/
Dinput.rst100 crw-r--r-- 1 root root 13, 65 Apr 1 10:50 event1
101 crw-r--r-- 1 root root 13, 66 Apr 1 10:50 event2
102 crw-r--r-- 1 root root 13, 67 Apr 1 10:50 event3
128 crw-r--r-- 1 root root 13, 35 Apr 1 10:50 mouse3
131 crw-r--r-- 1 root root 13, 62 Apr 1 10:50 mouse30
132 crw-r--r-- 1 root root 13, 63 Apr 1 10:50 mice
161 crw-r--r-- 1 root root 13, 0 Apr 1 10:50 js0
162 crw-r--r-- 1 root root 13, 1 Apr 1 10:50 js1
163 crw-r--r-- 1 root root 13, 2 Apr 1 10:50 js2
164 crw-r--r-- 1 root root 13, 3 Apr 1 10:50 js3
/Documentation/doc-guide/
Dsvg_image.svg8 <line x1="180" y1="370" x2="500" y2="50" stroke="black" stroke-width="15px"/>
9 <polygon points="585 0 525 25 585 50" transform="rotate(135 525 25)"/>
/Documentation/devicetree/bindings/sound/
Dcs35l36.txt15 increments of 50mV.
21 50mA.
67 3 = 50ms
75 weak-FET operation. The range is 50mV to 700mV in 50mV increments.
Dcs35l33.txt62 stage enters LDO operation. Starts as a default value of 50mV for a value
63 of 1 and increases with a step size of 50mV to a maximum of 750mV (value of
72 from 0 to 7 for delays of 5ms, 10ms, 50ms, 100ms, 200ms, 500ms, 1000ms.
91 1800mV with a step size of 50mV up to a maximum value of 1750mV.
Drt1015.txt22 realtek,power-up-delay-ms = <50>;
Dda7219.txt50 [<2>, <5>, <10>, <50>, <100>, <200>, <500>]
54 [<5>, <10>, <20>, <50>, <100>, <200>, <500>, <1000>]
98 dlg,btn-cfg = <50>;
/Documentation/devicetree/bindings/iio/adc/
Dadi,ad7192.yaml55 filter is at 50 Hz. When REJ60 is set, a filter notch is placed at
56 60 Hz when the sinc filter first notch is at 50 Hz. This allows
57 simultaneous 50 Hz/ 60 Hz rejection.
/Documentation/devicetree/bindings/i2c/
Di2c-mux-ltc4306.txt45 eeprom@50 {
56 eeprom@50 {
/Documentation/devicetree/bindings/leds/
Dleds-trigger-pattern.txt8 1. For gradual dimming, the dimming interval now is set as 50 milliseconds. So
9 the tuple with duration less than dimming interval (50ms) is treated as a step
/Documentation/x86/
Dresctrl_ui.rst395 threads, having 50% bandwidth, each consuming 5GBps' consumes the max L3
396 bandwidth of 100GBps although the percentage value specified is only 50%
624 { latency: 50 } hitcount: 83
676 # echo "L3:0=3;1=c\nMB:0=50;1=50" > /sys/fs/resctrl/p0/schemata
677 # echo "L3:0=3;1=3\nMB:0=50;1=50" > /sys/fs/resctrl/p1/schemata
683 "lower" 50% on cache ID 0, and the "upper" 50% of cache ID 1.
684 Tasks in group "p1" use the "lower" 50% of cache on both sockets.
687 maximum memory b/w of 50% on socket0 and 50% on socket 1.
688 Tasks in group "p1" may also use 50% memory b/w on both sockets.
718 50% of the L3 cache on socket 0 and 50% of memory b/w cannot be used by
[all …]
/Documentation/devicetree/bindings/thermal/
Dnvidia,tegra124-soctherm.txt62 TEGRA_SOCTHERM_THROT_LEVEL_LOW (50%),
137 * the HW will skip cpu clock's pulse in 50% depth,
138 * skip gpu clock's pulse in 50% level
142 nvidia,cpu-throt-percent = <50>;
155 nvidia,priority = <50>;
/Documentation/devicetree/bindings/mux/
Dadi,adg792a.txt32 mux: mux-controller@50 {
58 pmux: mux-controller@50 {
/Documentation/driver-api/thermal/
Dexynos_thermal_emulation.rst60 emulation : 0 50 | 70 | 20 | 0
61 current temp: sensor 50 70 20 sensor
/Documentation/devicetree/bindings/rtc/
Dorion-rtc.txt17 interrupts = <50>;
/Documentation/devicetree/bindings/soc/ti/
Dkeystone-navigator-qmss.txt161 interrupts = <0 48 0xf04 0 49 0xf04 0 50 0xf04
191 accumulator = <0 36 16 2 50>;
198 accumulator = <0 37 16 2 50>;
204 accumulator = <0 38 16 2 50>;
210 accumulator = <0 39 16 2 50>;
/Documentation/devicetree/bindings/dma/
Dti-dma-crossbar.txt65 /* Requesting crossbar input 49 and 50 */
66 dmas = <&sdma_xbar 49>, <&sdma_xbar 50>;
/Documentation/devicetree/bindings/usb/
Domap-usb.txt16 - power : Should be "50". This signifies the controller can supply up to
43 power = <50>;

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