| /Documentation/devicetree/bindings/ptp/ |
| D | ptp-idtcm.yaml | 16 - idt,8a34000
17 - idt,8a34001
18 - idt,8a34002
19 - idt,8a34003
20 - idt,8a34004
21 - idt,8a34005
22 - idt,8a34006
23 - idt,8a34007
24 - idt,8a34008
25 - idt,8a34009
[all …]
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| /Documentation/gpu/ |
| D | afbc.rst | 42 * Component 0: R(8)
43 * Component 1: G(8)
44 * Component 2: B(8)
45 * Component 3: A(8)
49 * Component 0: R(8)
50 * Component 1: G(8)
51 * Component 2: B(8)
55 * Component 0: Y(8)
56 * Component 1: Cb(8, 2x1 subsampled)
57 * Component 2: Cr(8, 2x1 subsampled)
[all …]
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| /Documentation/devicetree/bindings/input/touchscreen/ |
| D | ad7879.txt | 18 This property has to be a '/bits/ 8' value
21 2: 8us
23 This property has to be a '/bits/ 8' value
26 2: 8 measurements
28 This property has to be a '/bits/ 8' value
31 2: 8 middle values
33 This property has to be a '/bits/ 8' value
36 This property has to be a '/bits/ 8' value
48 adi,first-conversion-delay = /bits/ 8 <3>;
49 adi,acquisition-time = /bits/ 8 <1>;
[all …]
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| /Documentation/devicetree/bindings/leds/ |
| D | leds-lp55xx.yaml | 97 - 8 # LED output D9
122 clock-mode = /bits/ 8 <2>;
123 pwr-sel = /bits/ 8 <3>; /* D1~9 connected to VOUT */
128 led-cur = /bits/ 8 <0x14>;
129 max-cur = /bits/ 8 <0x20>;
135 led-cur = /bits/ 8 <0x14>;
136 max-cur = /bits/ 8 <0x20>;
142 led-cur = /bits/ 8 <0x14>;
143 max-cur = /bits/ 8 <0x20>;
149 led-cur = /bits/ 8 <0x14>;
[all …]
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| /Documentation/admin-guide/media/ |
| D | dvb_intro.rst | 133 T 177500000 7MHz AUTO AUTO QAM64 8k 1/16 NONE
134 T 184500000 7MHz AUTO AUTO QAM64 8k 1/8 NONE
135 T 191625000 7MHz AUTO AUTO QAM64 8k 1/16 NONE
136 T 219500000 7MHz AUTO AUTO QAM64 8k 1/16 NONE
137 T 226500000 7MHz AUTO AUTO QAM64 8k 1/16 NONE
138 T 557625000 7MHz AUTO AUTO QPSK 8k 1/16 NONE
151 TRANSMISSION_MODE = 8K
179 TRANSMISSION_MODE = 8K
194 TRANSMISSION_MODE = 8K
209 TRANSMISSION_MODE = 8K
[all …]
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| /Documentation/devicetree/bindings/leds/backlight/ |
| D | lp855x.txt | 25 dev-ctrl = /bits/ 8 <0x00>;
30 rom-addr = /bits/ 8 <0x14>;
31 rom-val = /bits/ 8 <0xcf>;
36 rom-addr = /bits/ 8 <0x15>;
37 rom-val = /bits/ 8 <0xc7>;
42 rom-addr = /bits/ 8 <0x19>;
43 rom-val = /bits/ 8 <0x0f>;
53 dev-ctrl = /bits/ 8 <0x85>;
54 init-brt = /bits/ 8 <0x10>;
64 dev-ctrl = /bits/ 8 <0x41>;
[all …]
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| /Documentation/trace/postprocess/ |
| D | trace-pagealloc-postprocess.pl | 28 use constant STATE_PCPU_PAGES_DRAINED => 8;
259 $fragmenting = $8;
316 printf("%-" . $max_strlen . "s %8s %10s %8s %8s %8s %8s %8s %8s %8s %8s %8s %8s %8s\n",
318 printf("%-" . $max_strlen . "s %8s %10s %8s %8s %8s %8s %8s %8s %8s %8s %8s %8s %8s\n",
321 printf("%-" . $max_strlen . "s %8s %10s %8s %8s %8s %8s %8s %8s %8s %8s %8s %8s %8s\n",
335 printf("%-" . $max_strlen . "s %8d %10d %8d %8d %8d %8d %8d %8d %8d %8d %8d %8d %8d\n",
|
| /Documentation/admin-guide/device-mapper/ |
| D | dm-service-time.rst | 82 # echo "0 10 multipath 0 0 1 1 service-time 0 2 2 8:0 128 1 8:16 128 4" \
86 test: 0 10 multipath 0 0 1 1 service-time 0 2 2 8:0 128 1 8:16 128 4
89 test: 0 10 multipath 2 0 0 0 1 1 E 0 2 2 8:0 A 0 0 1 8:16 A 0 0 4
92 Or '2' for sda and '8' for sdb would be also true::
94 # echo "0 10 multipath 0 0 1 1 service-time 0 2 2 8:0 128 2 8:16 128 8" \
98 test: 0 10 multipath 0 0 1 1 service-time 0 2 2 8:0 128 2 8:16 128 8
101 test: 0 10 multipath 2 0 0 0 1 1 E 0 2 2 8:0 A 0 0 2 8:16 A 0 0 8
|
| D | dm-queue-length.rst | 41 # echo "0 10 multipath 0 0 1 1 queue-length 0 2 1 8:0 128 8:16 128" \
45 test: 0 10 multipath 0 0 1 1 queue-length 0 2 1 8:0 128 8:16 128
48 test: 0 10 multipath 2 0 0 0 1 1 E 0 2 1 8:0 A 0 0 8:16 A 0 0
|
| /Documentation/devicetree/bindings/ |
| D | trivial-devices.yaml | 111 # 10-bit 8 channels 300ks/s SPI ADC with temperature sensor
117 # 12-bit 8 channels 300ks/s SPI ADC with temperature sensor
131 # mCube 3-axis 8-bit digital accelerometer
133 # MEMSIC 2-axis 8-bit digital accelerometer
207 # Microchip 8-bit Single I2C Digital Potentiometer (5k)
209 # Microchip 8-bit Single I2C Digital Potentiometer (10k)
211 # Microchip 8-bit Single I2C Digital Potentiometer (50k)
213 # Microchip 8-bit Single I2C Digital Potentiometer (100k)
215 # Microchip 8-bit Single I2C Digital Potentiometer (5k)
217 # Microchip 8-bit Single I2C Digital Potentiometer (10k)
[all …]
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| /Documentation/devicetree/bindings/media/ |
| D | ti,da850-vpif.txt | 18 VPIF has a 16-bit parallel bus input, supporting 2 8-bit channels or a
25 Example using 2 8-bit input channels, one of which is connected to an
36 bus-width = <8>;
42 bus-width = <8>;
43 data-shift = <8>;
49 bus-width = <8>;
69 /* VPIF channel 0 (lower 8-bits) */
71 bus-width = <8>;
86 bus-width = <8>;
|
| /Documentation/devicetree/bindings/timer/ |
| D | renesas,8bit-timer.txt | 1 * Renesas H8/300 8bit timer
3 The 8bit timer is a 8bit timer/counter with configurable clock inputs and
10 - compatible: must contain "renesas,8bit-timer"
19 compatible = "renesas,8bit-timer";
|
| /Documentation/admin-guide/blockdev/drbd/ |
| D | figures.rst | 20 .. kernel-figure:: conn-states-8.dot
21 :alt: conn-states-8.dot
24 .. kernel-figure:: disk-states-8.dot
25 :alt: disk-states-8.dot
28 .. kernel-figure:: node-states-8.dot
29 :alt: node-states-8.dot
|
| /Documentation/ABI/testing/ |
| D | sysfs-driver-toshiba_acpi | 1 What: /sys/devices/LNXSYSTM:00/LNXSYBUS:00/TOS{1900,620{0,7,8}}:00/kbd_backlight_mode
2 Date: June 8, 2014
20 What: /sys/devices/LNXSYSTM:00/LNXSYBUS:00/TOS{1900,620{0,7,8}}:00/kbd_backlight_timeout
21 Date: June 8, 2014
33 What: /sys/devices/LNXSYSTM:00/LNXSYBUS:00/TOS{1900,620{0,7,8}}:00/position
34 Date: June 8, 2014
40 What: /sys/devices/LNXSYSTM:00/LNXSYBUS:00/TOS{1900,620{0,7,8}}:00/touchpad
41 Date: June 8, 2014
52 What: /sys/devices/LNXSYSTM:00/LNXSYBUS:00/TOS{1900,620{0,7,8}}:00/available_kbd_modes
68 What: /sys/devices/LNXSYSTM:00/LNXSYBUS:00/TOS{1900,620{0,7,8}}:00/kbd_type
[all …]
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| /Documentation/devicetree/bindings/spi/ |
| D | spi-sifive.yaml | 51 Depth of hardware queues; defaults to 8
53 enum: [8]
54 default: 8
58 Maximum bits per word; defaults to 8
60 enum: [0, 1, 2, 3, 4, 5, 6, 7, 8]
61 default: 8
81 sifive,fifo-depth = <8>;
82 sifive,max-bits-per-word = <8>;
|
| /Documentation/devicetree/bindings/media/i2c/ |
| D | tda1997x.txt | 6 - RGB 8bit per color (24 bits total): R[11:4] B[11:4] G[11:4]
7 - YUV444 8bit per color (24 bits total): Y[11:4] Cr[11:4] Cb[11:4]
8 - YUV422 semi-planar 8bit per component (16 bits total): Y[11:4] CbCr[11:4]
11 - YUV422 BT656 8bit per component (8 bits total): YCbCr[11:4] (2-cycles)
76 * The 8bpp YUV422 semi-planar mode outputs CbCr[11:4]
80 /* Y[11:8]<->VP[15:12]<->CSI_DATA[19:16] */
84 /* CbCc[11:8]<->VP[07:04]<->CSI_DATA[11:8] */
99 - VP[15:8] connected to IMX6 CSI_DATA[19:12] for 8bit BT656
118 * The 8bpp YUV422 semi-planar mode outputs CbCr[11:4]
122 /* Y[11:8]<->VP[15:12]<->CSI_DATA[19:16] */
[all …]
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| /Documentation/devicetree/bindings/ata/ |
| D | ahci-ceva.txt | 11 ceva,pN-cominit-params = /bits/ 8 <CIBGMN CIBGMX CIBGN CINMP>;
19 ceva,pN-comwake-params = /bits/ 8 <CWBGMN CWBGMX CWBGN CWNMP>;
27 ceva,pN-burst-params = /bits/ 8 <BMX BNM SFD PTST>;
49 ceva,p0-cominit-params = /bits/ 8 <0x0F 0x25 0x18 0x29>;
50 ceva,p0-comwake-params = /bits/ 8 <0x04 0x0B 0x08 0x0F>;
51 ceva,p0-burst-params = /bits/ 8 <0x0A 0x08 0x4A 0x06>;
54 ceva,p1-cominit-params = /bits/ 8 <0x0F 0x25 0x18 0x29>;
55 ceva,p1-comwake-params = /bits/ 8 <0x04 0x0B 0x08 0x0F>;
56 ceva,p1-burst-params = /bits/ 8 <0x0A 0x08 0x4A 0x06>;
|
| /Documentation/driver-api/early-userspace/ |
| D | buffer-format.rst | 59 c_ino 8 bytes File inode number
60 c_mode 8 bytes File mode and permissions
61 c_uid 8 bytes File uid
62 c_gid 8 bytes File gid
63 c_nlink 8 bytes Number of links
64 c_mtime 8 bytes Modification time
65 c_filesize 8 bytes Size of data field
66 c_maj 8 bytes Major part of file device number
67 c_min 8 bytes Minor part of file device number
68 c_rmaj 8 bytes Major part of device node reference
[all …]
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| /Documentation/userspace-api/media/rc/ |
| D | rc-protos.rst | 67 - 8 to 13
131 after the 8th bit.
168 - 8 to 13
185 The scancode is a 16 bits value, where the address is the lower 8 bits
186 and the command the higher 8 bits; this is reversed from IR order.
230 * - 8
269 * - 8
271 - 8 to 15
278 The nec protocol encodes an 8 bit address and an 8 bit command. It is
285 A plain nec IR message has 16 bits; the high 8 bits are the address
[all …]
|
| /Documentation/filesystems/ext4/ |
| D | blocks.rst | 40 - 8TiB
44 - 8,192
49 - 8,192
54 - 8MiB
70 - 8TiB
106 - 8,192
111 - 8,192
116 - 8MiB
132 - 8TiB
|
| /Documentation/hwmon/ |
| D | it87.rst | 10 Addresses scanned: from Super I/O config space (8 I/O ports)
18 Addresses scanned: from Super I/O config space (8 I/O ports)
24 Addresses scanned: from Super I/O config space (8 I/O ports)
32 Addresses scanned: from Super I/O config space (8 I/O ports)
40 Addresses scanned: from Super I/O config space (8 I/O ports)
48 Addresses scanned: from Super I/O config space (8 I/O ports)
56 Addresses scanned: from Super I/O config space (8 I/O ports)
64 Addresses scanned: from Super I/O config space (8 I/O ports)
72 Addresses scanned: from Super I/O config space (8 I/O ports)
80 Addresses scanned: from Super I/O config space (8 I/O ports)
[all …]
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| /Documentation/devicetree/bindings/hwmon/ |
| D | aspeed-pwm-tacho.txt | 3 The ASPEED PWM controller can support upto 8 PWM outputs. The ASPEED Fan Tacho
6 There can be upto 8 fans supported. Each fan can have one PWM output and
31 Under fan subnode there can upto 8 child nodes, with each child node
32 representing a fan. If there are 8 fans each fan can have one PWM port and
65 cooling-levels = /bits/ 8 <125 151 177 203 229 255>;
66 aspeed,fan-tach-ch = /bits/ 8 <0x00>;
71 aspeed,fan-tach-ch = /bits/ 8 <0x01 0x02>;
|
| /Documentation/devicetree/bindings/iio/adc/ |
| D | renesas,gyroadc.txt | 3 The GyroADC block is a reduced SPI block with up to 8 chipselect lines,
45 15bit sampling, up to 8 channels can be sampled in
47 ADC channel with data, thus for 8-channel operation,
48 8 chips are required. A 3:8 chipselect demuxer is
54 16bit sampling, up to 8 channels can be sampled in
56 ADC channel with data, thus for 8-channel operation,
57 8 chips are required. A 3:8 chipselect demuxer is
|
| /Documentation/devicetree/bindings/dma/ |
| D | snps,dma-spear1340.yaml | 50 maximum: 8
93 enum: [4, 8, 16, 32]
99 Data bus width per each DMA master in (2^n * 8) bits. This property is
101 the property incorrectly permits to define data-bus width of 8 and 16
107 - 0 # 8 bits
121 maxItems: 8
136 maxItems: 8
138 enum: [4, 8, 16, 32, 64, 128, 256]
167 dma-channels = <8>;
175 data-width = <8 8>;
|
| /Documentation/devicetree/bindings/rtc/ |
| D | armada-380-rtc.txt | 1 * Real Time Clock of the Armada 38x/7K/8K SoCs
3 RTC controller for the Armada 38x, 7K and 8K SoCs
8 "marvell,armada-8k-rtc" for Aramda 7K/8K SoCs
|