| /Documentation/devicetree/bindings/arm/ |
| D | arm,vexpress-juno.yaml | 4 $id: http://devicetree.org/schemas/arm/arm,vexpress-juno.yaml#
7 title: ARM Versatile Express and Juno Boards Device Tree Bindings
10 - Sudeep Holla <sudeep.holla@arm.com>
14 ARM's Versatile Express platform were built as reference designs for exploring
30 "arm,vexpress" compatible was retained in the root node, and these are
36 manual, followed by "arm,vexpress" as an additional compatible value. If
46 in MPCore configuration in a test chip on the core tile. See ARM
49 - const: arm,vexpress,v2p-ca9
50 - const: arm,vexpress
53 and Jazelle support in the Cortex A5 family. See ARM DUI 0541C.
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| D | pmu.yaml | 4 $id: http://devicetree.org/schemas/arm/pmu.yaml#
7 title: ARM Performance Monitor Units
10 - Mark Rutland <mark.rutland@arm.com>
11 - Will Deacon <will.deacon@arm.com>
14 ARM cores often have a PMU for counting cpu and cache events like cache misses
15 and hits. The interface to the PMU is part of the ARM ARM. The ARM PMU
23 - arm,armv8-pmuv3 # Only for s/w models
24 - arm,arm1136-pmu
25 - arm,arm1176-pmu
26 - arm,arm11mpcore-pmu
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| D | arm,realview.yaml | 4 $id: http://devicetree.org/schemas/arm/arm,realview.yaml#
7 title: ARM RealView Boards Device Tree Bindings
13 The ARM RealView series of reference designs were built to explore the ARM
22 - description: ARM RealView Emulation Baseboard (HBI-0140) was created
24 pluggable CPU modules, see ARM DUI 0303E.
26 - const: arm,realview-eb
27 - description: ARM RealView Platform Baseboard for ARM1176JZF-S
28 (HBI-0147) was created as a development board to test ARM TrustZone,
29 CoreSight and Intelligent Energy Management (IEM) see ARM DUI 0425F.
31 - const: arm,realview-pb1176
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| D | cpus.yaml | 4 $id: http://devicetree.org/schemas/arm/cpus.yaml#
7 title: ARM CPUs bindings
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
21 with updates for 32-bit and 64-bit ARM systems provided in this document.
37 The ARM architecture, in accordance with the Devicetree Specification,
45 Usage and definition depend on ARM architecture version and
48 On uniprocessor ARM architectures previous to v7
51 On ARM 11 MPcore based systems this property is
59 On 32-bit ARM v7 or later systems this property is
68 On ARM v8 64-bit systems this property is required
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| D | coresight-cti.yaml | 5 $id: http://devicetree.org/schemas/arm/coresight-cti.yaml#
8 title: ARM Coresight Cross Trigger Interface (CTI) device.
32 are implementation defined, except when the CTI is connected to an ARM v8
35 In this case the ARM v8 architecture defines the required signal connections
38 indicate this feature (arm,coresight-cti-v8-arch).
53 constants defined in <dt-bindings/arm/coresight-cti-dt.h>
67 - $ref: /schemas/arm/primecell.yaml#
69 # Need a custom select here or 'arm,primecell' will match on lots of nodes
75 - arm,coresight-cti
85 - const: arm,coresight-cti
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| D | vexpress-sysreg.txt | 1 ARM Versatile Express system registers
9 - compatible value : = "arm,vexpress,sysreg";
24 "arm,vexpress-sysreg,sys_led"
25 "arm,vexpress-sysreg,sys_mci"
26 "arm,vexpress-sysreg,sys_flash"
37 compatible = "arm,vexpress-sysreg";
41 compatible = "arm,vexpress-sysreg,sys_led";
47 compatible = "arm,vexpress-sysreg,sys_mci";
53 compatible = "arm,vexpress-sysreg,sys_flash";
64 node via "arm,vexpress,config-bridge" phandle and define appropriate
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| D | arm,integrator.yaml | 4 $id: http://devicetree.org/schemas/arm/arm,integrator.yaml#
7 title: ARM Integrator Boards Device Tree Bindings
13 These were the first ARM platforms officially supported by ARM Ltd.
23 - description: ARM Integrator Application Platform, this board has a PCI
27 rapid prototyping. See ARM DUI 0098B. This board can physically come
29 special metal fixture called Integrator/PP2, see ARM DUI 0169A.
31 - const: arm,integrator-ap
32 - description: ARM Integrator Compact Platform (HBI-0086), this board has
34 peripherals to make use of the core module. See ARM DUI 0159B.
36 - const: arm,integrator-cp
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| D | coresight.txt | 3 CoreSight components are compliant with the ARM CoreSight architecture
14 * compatible: These have to be supplemented with "arm,primecell" as
17 "arm,coresight-etb10", "arm,primecell";
20 "arm,coresight-tpiu", "arm,primecell";
26 "arm,coresight-tmc", "arm,primecell";
29 "arm,coresight-dynamic-funnel", "arm,primecell";
30 "arm,coresight-funnel", "arm,primecell"; (OBSOLETE. For
35 "arm,coresight-etm3x", "arm,primecell";
38 "arm,coresight-etm4x", "arm,primecell";
41 "arm,coresight-etm4x-sysreg";
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| D | l2c2x0.yaml | 4 $id: http://devicetree.org/schemas/arm/l2c2x0.yaml#
7 title: ARM L2 Cache Controller
13 ARM cores often have a separate L2C210/L2C220/L2C310 (also known as PL210/
34 - arm,pl310-cache
35 - arm,l220-cache
36 - arm,l210-cache
44 # compatible with the ARM one, with system cache mode (meaning
49 # compatible with the ARM one with outer cache mode.
53 # with arm,pl310-cache controller.
55 - const: arm,pl310-cache
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| D | psci.yaml | 4 $id: http://devicetree.org/schemas/arm/psci.yaml#
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
13 Firmware implementing the PSCI functions described in ARM document number
14 ARM DEN 0022A ("Power State Coordination Interface System Software on ARM
32 …http://infocenter.arm.com/help/topic/com.arm.doc.den0022c/DEN0022C_Power_State_Coordination_Interf…
42 const: arm,psci
46 const: arm,psci-0.2
52 with existing software when "arm,psci" is later in the compatible
55 - const: arm,psci-0.2
56 - const: arm,psci
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| D | arm,versatile.yaml | 4 $id: http://devicetree.org/schemas/arm/arm,versatile.yaml#
7 title: ARM Versatile Boards Device Tree Bindings
13 The ARM Versatile boards are two variants of ARM926EJ-S evaluation boards
22 - description: The ARM Versatile Application Baseboard (HBI-0118) is an
25 for a candybar phone-type use case. See ARM DUI 0225D.
27 - const: arm,versatile-ab
28 - description: The ARM Versatile Platform Baseboard (HBI-0117) is an
31 for ARM926EJ-S. See ARM DUI 0224B.
33 - const: arm,versatile-pb
43 - const: arm,core-module-versatile
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| D | trbe.yaml | 2 # Copyright 2021, Arm Ltd
5 $id: "http://devicetree.org/schemas/arm/trbe.yaml#"
8 title: ARM Trace Buffer Extensions
11 - Anshuman Khandual <anshuman.khandual@arm.com>
14 Arm Trace Buffer Extension (TRBE) is a per CPU component
25 - const: arm,trace-buffer-extension
31 the arm,gic-v3 binding for details on describing a PPI partition.
43 #include <dt-bindings/interrupt-controller/arm-gic.h>
46 compatible = "arm,trace-buffer-extension";
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| D | primecell.yaml | 4 $id: http://devicetree.org/schemas/arm/primecell.yaml#
7 title: ARM Primecell Peripherals
13 ARM, Ltd. Primecell peripherals have a standard id register that can be used to
20 const: arm,primecell
22 Should be a specific name for the peripheral followed by "arm,primecell".
23 The specific name will match the ARM engineering name for the logic block
24 in the form "arm,pl???"
26 arm,primecell-periphid:
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| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | arm,gic.yaml | 4 $id: http://devicetree.org/schemas/interrupt-controller/arm,gic.yaml#
7 title: ARM Generic Interrupt Controller v1 and v2
10 - Marc Zyngier <marc.zyngier@arm.com>
13 ARM SMP cores are often associated with a GIC, providing per processor
29 - arm,arm11mp-gic
30 - arm,cortex-a15-gic
31 - arm,cortex-a7-gic
32 - arm,cortex-a5-gic
33 - arm,cortex-a9-gic
34 - arm,eb11mp-gic
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| /Documentation/devicetree/bindings/rng/ |
| D | arm-cctrng.yaml | 4 $id: http://devicetree.org/schemas/rng/arm-cctrng.yaml#
7 title: Arm TrustZone CryptoCell TRNG engine
10 - Hadar Gat <hadar.gat@arm.com>
13 Arm TrustZone CryptoCell TRNG (True Random Number Generator) engine.
18 - arm,cryptocell-713-trng
19 - arm,cryptocell-703-trng
27 arm,rosc-ratio:
29 Arm TrustZone CryptoCell TRNG engine has 4 ring oscillators.
41 - arm,rosc-ratio
48 compatible = "arm,cryptocell-713-trng";
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| /Documentation/devicetree/bindings/hwmon/ |
| D | vexpress.txt | 6 "arm,vexpress-volt"
7 "arm,vexpress-amp"
8 "arm,vexpress-temp"
9 "arm,vexpress-power"
10 "arm,vexpress-energy"
11 - "arm,vexpress-sysreg,func" when controlled via vexpress-sysreg
12 (see Documentation/devicetree/bindings/arm/vexpress-sysreg.txt
20 compatible = "arm,vexpress-energy";
21 arm,vexpress-sysreg,func = <13 0>;
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| /Documentation/devicetree/bindings/mtd/partitions/ |
| D | arm,arm-firmware-suite.txt | 1 ARM AFS - ARM Firmware Suite Partitions
4 The ARM Firmware Suite is a flash partitioning system found on the
5 ARM reference designs: Integrator AP, Integrator CP, Versatile AB,
9 - compatible : (required) must be "arm,arm-firmware-suite"
15 compatible = "arm,arm-firmware-suite";
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| /Documentation/devicetree/bindings/clock/ |
| D | arm,syscon-icst.yaml | 4 $id: http://devicetree.org/schemas/clock/arm,syscon-icst.yaml#
7 title: ARM System Controller ICST Clocks
14 Devices Technology (IDT). ARM integrated these oscillators deeply into their
18 The various ARM system controllers contain logic to serialize and initialize
24 Some ARM hardware contain special versions of the serial interface that only
60 - arm,syscon-icst525
61 - arm,syscon-icst307
62 - arm,syscon-icst525-integratorap-cm
63 - arm,syscon-icst525-integratorap-sys
64 - arm,syscon-icst525-integratorap-pci
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| /Documentation/devicetree/bindings/timer/ |
| D | arm,twd.txt | 1 * ARM Timer Watchdog
3 ARM 11MP, Cortex-A5 and Cortex-A9 are often associated with a per-core
13 "arm,cortex-a9-twd-timer"
14 "arm,cortex-a5-twd-timer"
15 "arm,arm11mp-twd-timer"
30 compatible = "arm,arm11mp-twd-timer"";
38 "arm,cortex-a9-twd-wdt"
39 "arm,cortex-a5-twd-wdt"
40 "arm,arm11mp-twd-wdt"
50 compatible = "arm,arm11mp-twd-wdt";
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| /Documentation/translations/zh_CN/arm64/ |
| D | silicon-errata.txt | 9 M: Will Deacon <will.deacon@arm.com>
19 英文版维护者： Will Deacon <will.deacon@arm.com>
30 作者: Will Deacon <will.deacon@arm.com>
34 某些特定情况下会违背构架定义的行为。就基于 ARM 的硬件而言，这些瑕疵
41 更多资讯，请在 infocenter.arm.com （需注册）中查阅“软件开发者勘误
52 “基于可选方法框架的 ARM 瑕疵补救措施（ARM errata workarounds via
63 | ARM | Cortex-A53 | #826319 | ARM64_ERRATUM_826319 |
64 | ARM | Cortex-A53 | #827319 | ARM64_ERRATUM_827319 |
65 | ARM | Cortex-A53 | #824069 | ARM64_ERRATUM_824069 |
66 | ARM | Cortex-A53 | #819472 | ARM64_ERRATUM_819472 |
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| /Documentation/devicetree/bindings/watchdog/ |
| D | arm,sp805.yaml | 4 $id: http://devicetree.org/schemas/watchdog/arm,sp805.yaml#
7 title: ARM AMBA Primecell SP805 Watchdog
13 The Arm SP805 IP implements a watchdog device, which triggers an interrupt
20 # Need a custom select here or 'arm,primecell' will match on lots of nodes
25 const: arm,sp805
32 - const: arm,sp805
33 - const: arm,primecell
64 #include <dt-bindings/interrupt-controller/arm-gic.h>
66 compatible = "arm,sp805", "arm,primecell";
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| /Documentation/devicetree/bindings/iommu/ |
| D | arm,smmu.yaml | 4 $id: http://devicetree.org/schemas/iommu/arm,smmu.yaml#
7 title: ARM System MMU Architecture Implementation
11 - Robin Murphy <Robin.Murphy@arm.com>
14 ARM SoCs may contain an implementation of the ARM System Memory
26 - description: Qcom SoCs implementing "arm,smmu-v2"
33 - description: Qcom SoCs implementing "arm,mmu-500"
40 - const: arm,mmu-500
41 - description: Qcom Adreno GPUs implementing "arm,smmu-v2"
48 - description: Marvell SoCs implementing "arm,mmu-500"
51 - const: arm,mmu-500
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| /Documentation/devicetree/bindings/perf/ |
| D | arm,cmn.yaml | 2 # Copyright 2020 Arm Ltd.
5 $id: http://devicetree.org/schemas/perf/arm,cmn.yaml#
8 title: Arm CMN (Coherent Mesh Network) Performance Monitors
11 - Robin Murphy <robin.murphy@arm.com>
15 const: arm,cmn-600
33 arm,root-node:
42 - arm,root-node
48 #include <dt-bindings/interrupt-controller/arm-gic.h>
51 compatible = "arm,cmn-600";
55 arm,root-node = <0x104000>;
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| /Documentation/devicetree/bindings/crypto/ |
| D | arm-cryptocell.txt | 1 Arm TrustZone CryptoCell cryptographic engine
5 "arm,cryptocell-713-ree"
6 "arm,cryptocell-703-ree"
7 "arm,cryptocell-712-ree"
8 "arm,cryptocell-710-ree"
9 "arm,cryptocell-630p-ree"
20 compatible = "arm,cryptocell-712-ree";
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| /Documentation/devicetree/bindings/display/ |
| D | arm,pl11x.txt | 1 * ARM PrimeCell Color LCD Controller PL110/PL111
3 See also Documentation/devicetree/bindings/arm/primecell.yaml
8 "arm,pl110", "arm,primecell"
9 "arm,pl111", "arm,primecell"
48 - arm,pl11x,tft-r0g0b0-pads: an array of three 32-bit values,
58 arm,pl11x,tft-r0g0b0-pads = <4 15 20>;
60 arm,pl11x,tft-r0g0b0-pads = <1 7 13>;
62 arm,pl11x,tft-r0g0b0-pads = <3 11 19>;
64 arm,pl11x,tft-r0g0b0-pads = <3 10 19>;
66 arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
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