Searched full:axi4 (Results 1 – 4 of 4) sorted by relevance
| /Documentation/devicetree/bindings/misc/ |
| D | xlnx,sd-fec.txt | 15 - "s_axi_aclk", AXI4-Lite memory-mapped slave interface clock (required)
16 - "s_axis_din_aclk", DIN AXI4-Stream Slave interface clock (optional)
17 - "s_axis_din_words-aclk", DIN_WORDS AXI4-Stream Slave interface clock (optional)
18 - "s_axis_ctrl_aclk", Control input AXI4-Stream Slave interface clock (optional)
19 - "m_axis_dout_aclk", DOUT AXI4-Stream Master interface clock (optional)
20 - "m_axis_dout_words_aclk", DOUT_WORDS AXI4-Stream Master interface clock (optional)
21 - "m_axis_status_aclk", Status output AXI4-Stream Master interface clock (optional)
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| /Documentation/devicetree/bindings/dma/xilinx/ |
| D | xilinx_dma.txt | 6 Xilinx AXI DMA engine, it does transfers between memory and AXI4 stream
14 Xilinx AXI MCDMA engine, it does transfer between memory and AXI4 stream
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| /Documentation/devicetree/bindings/media/xilinx/ |
| D | video.txt | 21 AXI bus between video IP cores, using its VF code as defined in "AXI4-Stream
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| D | xlnx,csi2rxss.yaml | 14 traffic from compliant camera sensors and send the output as AXI4 Stream
19 AXI4 Stream video data.
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