Searched +full:cortex +full:- +full:a8 (Results 1 – 5 of 5) sorted by relevance
/Documentation/devicetree/bindings/arm/ |
D | arm,realview.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Linus Walleij <linus.walleij@linaro.org> 14 11, Cortex A-8 and Cortex A-9 CPUs. This included new features compared to 22 - description: ARM RealView Emulation Baseboard (HBI-0140) was created 26 - const: arm,realview-eb 27 - description: ARM RealView Platform Baseboard for ARM1176JZF-S 28 (HBI-0147) was created as a development board to test ARM TrustZone, 31 - const: arm,realview-pb1176 [all …]
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D | pmu.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Mark Rutland <mark.rutland@arm.com> 11 - Will Deacon <will.deacon@arm.com> 16 representation in the device tree should be done as under:- 21 - enum: 22 - apm,potenza-pmu 23 - arm,armv8-pmuv3 # Only for s/w models 24 - arm,arm1136-pmu [all …]
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D | cpus.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> 21 with updates for 32-bit and 64-bit ARM systems provided in this document. 30 - square brackets define bitfields, eg reg[7:0] value of the bitfield in 59 On 32-bit ARM v7 or later systems this property is 68 On ARM v8 64-bit systems this property is required 71 * If cpus node's #address-cells property is set to 2 79 * If cpus node's #address-cells property is set to 1 [all …]
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/Documentation/arm/ |
D | sunxi.rst | 10 ------------ 11 Linux kernel mach directory: arch/arm/mach-sunxi 16 - Allwinner F20 (sun3i) 20 * ARM Cortex-A8 based SoCs 21 - Allwinner A10 (sun4i) 25 http://dl.linux-sunxi.org/A10/A10%20Datasheet%20-%20v1.21%20%282012-04-06%29.pdf 28 …http://dl.linux-sunxi.org/A10/A10%20User%20Manual%20-%20v1.20%20%282012-04-09%2c%20DECRYPTED%29.pdf 30 - Allwinner A10s (sun5i) 34 http://dl.linux-sunxi.org/A10s/A10s%20Datasheet%20-%20v1.20%20%282012-03-27%29.pdf 36 - Allwinner A13 / R8 (sun5i) [all …]
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/Documentation/devicetree/bindings/cpufreq/ |
D | ti-cpufreq.txt | 6 The ti-cpufreq driver can use revision and an efuse value from the SoC to 8 used to determine which OPPs from the operating-points-v2 table get enabled 12 -------------------- 14 - operating-points-v2: Phandle to the operating-points-v2 table to use. 16 In 'operating-points-v2' table: 17 - compatible: Should be 18 - 'operating-points-v2-ti-cpu' for am335x, am43xx, and dra7xx/am57xx, 20 - syscon: A phandle pointing to a syscon node representing the control module 24 -------------------- 25 - "vdd-supply", "vbb-supply": to define two regulators for dra7xx [all …]
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