Searched full:external (Results 1 – 25 of 655) sorted by relevance
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| /Documentation/devicetree/bindings/iio/adc/ |
| D | at91_adc.txt | 23 - atmel,adc-use-external-triggers: Boolean to enable the external triggers
43 * trigger-external: Is the trigger an external trigger?
56 atmel,adc-use-external-triggers;
63 trigger-name = "external-rising";
65 trigger-external;
68 trigger-name = "external-falling";
70 trigger-external;
74 trigger-name = "external-any";
76 trigger-external;
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| D | xilinx-xadc.txt | 25 - xlnx,external-mux:
26 * "none": No external multiplexer is used, this is the default
28 * "single": External multiplexer mode is used with one
30 * "dual": External multiplexer mode is used with two
32 - xlnx,external-mux-channel: Configures which pair of pins is used to
33 sample data in external mux mode.
34 Valid values for single external multiplexer mode are:
40 Valid values for dual external multiplexer mode are:
47 external multiplexer mode (either single or dual). If the device is
48 not using external multiplexer mode the property is ignored.
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| D | qcom,spmi-iadc.txt | 5 through an external resistor (channel 1) or internal (built-in) resistor
6 (channel 0). When using an external resistor it is to be described by
7 qcom,external-resistor-micro-ohms property.
26 - qcom,external-resistor-micro-ohms:
38 qcom,external-resistor-micro-ohms = <10000>;
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| /Documentation/admin-guide/media/ |
| D | davinci-vpbe.rst | 18 Loads up VENC, OSD and external encoders such as ths8200. It provides
20 in the VENC or external sub devices. It also provides
22 using sub device ops. The connection of external encoders to VENC LCD
27 When connected to an external encoder, vpbe controller is also responsible
28 for setting up the interface between VENC and external encoders based on
30 interfacing external encoders such as ths8200. The setup_if_config()
33 patch series, the interconnection and enabling and setting of the external
39 setting timings at LCD controller port when external encoders are connected
40 at the port or LCD panel timings required. When external encoder/LCD panel
52 support for external encoders and displays forms a part of the next
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| /Documentation/devicetree/bindings/clock/ |
| D | clk-palmas-clk32kg-clocks.txt | 13 - ti,external-sleep-control: The external enable input pins controlled the
14 enable/disable of clocks. The external enable input pins ENABLE1,
15 ENABLE2 and NSLEEP. The valid values for the external pins are:
21 The macros of external control pins for DTS is defined at
32 ti,external-sleep-control = <PALMAS_EXT_CONTROL_PIN_NSLEEP>;
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| D | rockchip,rk3368-cru.txt | 26 External clocks:
33 - "ext_i2s" - external I2S clock - optional,
34 - "ext_gmac" - external GMAC clock - optional
35 - "ext_hsadc" - external HSADC clock - optional,
36 - "ext_isp" - external ISP clock - optional,
37 - "ext_jtag" - external JTAG clock - optional
38 - "ext_vip" - external VIP clock - optional,
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| D | rockchip,rk3288-cru.txt | 32 External clocks:
39 - "ext_i2s" - external I2S clock - optional,
40 - "ext_hsadc" - external HSADC clock - optional,
41 - "ext_edp_24m" - external display port clock - optional,
42 - "ext_vip" - external VIP clock - optional,
43 - "ext_isp" - external ISP clock - optional,
44 - "ext_jtag" - external JTAG clock - optional
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| D | nuvoton,npcm750-clk.txt | 6 External clocks:
11 clk_rg1refck, clk_rg2refck and clk_xin are external clocks suppling the
40 Example: Required external clocks for network:
42 /* external reference clock */
50 /* external reference clock for cpu. float in normal operation */
58 /* external reference clock for MC. float in normal operation */
66 /* external clock signal rg1refck, supplied by the phy */
74 /* external clock signal rg2refck, supplied by the phy */
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| D | rockchip,rv1108-cru.txt | 26 External clocks:
32 - "ext_vip" - external VIP clock - optional
33 - "ext_i2s" - external I2S clock - optional
34 - "ext_gmac" - external GMAC clock - optional
35 - "hdmiphy" - external clock input derived from HDMI PHY - optional
36 - "usbphy" - external clock input derived from USB PHY - optional
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| D | artpec6.txt | 6 External clocks:
9 There are two external inputs to the main clock controller which should be
11 - "sys_refclk": External 50 Mhz oscillator (required)
23 - clock-names: Must include the external oscillator ("sys_refclk"). Optional
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| D | renesas,r9a06g032-sysctrl.txt | 10 - external 40mhz crystal.
11 - external (optional) 32.768khz
12 - external (optional) jtag input
13 - external (optional) RGMII_REFCLK
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| D | samsung,s3c2443-clock.txt | 25 External clocks:
31 - "ext" - external clock source - optional,
32 - "ext_i2s" - external I2S clock - optional,
33 - "ext_uart" - external uart clock - optional,
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| D | rockchip,rk3228-cru.txt | 26 External clocks:
32 - "ext_i2s" - external I2S clock - optional,
33 - "ext_gmac" - external GMAC clock - optional
34 - "ext_hsadc" - external HSADC clock - optional
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| D | rockchip,rk3188-cru.txt | 27 External clocks:
35 - "ext_hsadc" - external HSADC clock - optional,
36 - "ext_cif0" - external camera clock - optional,
37 - "ext_rmii" - external RMII clock - optional,
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| /Documentation/devicetree/bindings/watchdog/ |
| D | aspeed-wdt.txt | 38 - aspeed,external-signal: If property is present then signal is sent to
39 external reset counter (only WDT1 and WDT2). If not
40 specified no external signal is sent.
41 - aspeed,ext-pulse-duration: External signal pulse duration in microseconds
44 - aspeed,ext-push-pull: If aspeed,external-signal is present, set the pin's
46 - aspeed,ext-active-high: If aspeed,external-signal is present and and the pin
56 aspeed,external-signal;
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| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | microchip,pic32-evic.txt | 5 It handles all internal and external interrupts. This controller exists outside
9 External interrupts have a software configurable edge polarity. Non external
28 IRQ_TYPE_LEVEL_HIGH for persistent interrupts. For external interrupts use
33 - microchip,external-irqs: u32 array of external interrupts with software
45 microchip,external-irqs = <3 8 13 18 23>;
60 External interrupt DTS snippet
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| D | fsl,ls-extirq.txt | 1 * Freescale Layerscape external IRQs
4 the polarity of certain external interrupt lines.
12 external interrupt line. The second element is the trigger type.
17 - interrupt-map: Specifies the mapping from external interrupts to GIC
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| D | cdns,xtensa-pic.txt | 10 specifies whether it's internal (0) or external (1).
11 Periferals are usually connected to a fixed external IRQ, but for different
21 * second cell == 1: external irq number
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| /Documentation/kbuild/ |
| D | modules.rst | 2 Building External Modules
10 === 2 How to Build External Modules
15 === 3. Creating a Kbuild File for an External Module
30 --- 6.2 Symbols and External Modules
31 --- 6.3 Symbols From Another External Module
48 in building out-of-tree (or "external") modules. The author of an
49 external module should supply a makefile that hides most of the
55 2. How to Build External Modules
58 To build external modules, you must have a prebuilt kernel available
67 building external modules.
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| /Documentation/devicetree/bindings/iio/dac/ |
| D | adi,ad5770r.yaml | 36 description: Specify the voltage of the external reference used.
38 external reference declared then the device will use the
41 adi,external-resistor:
42 description: Specify if an external 2.5k ohm resistor is used. If not
61 description: Represents an external channel which are
85 description: Represents an external channel which are
101 description: Represents an external channel which are
119 description: Represents the external channels which are connected to the DAC.
154 adi,external-resistor;
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| D | ad7303.txt | 10 - REF-supply: Phandle to the external reference voltage supply. This should
11 only be set if there is an external reference voltage connected to the REF
21 adi,use-external-reference;
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| /Documentation/devicetree/bindings/iio/imu/ |
| D | adi,adis16480.txt | 38 - clocks: phandle to the external clock. Should be set according to
42 - clock-names: The name of the external clock to be used. Valid values are:
44 of the external clock signal establishes therate of data
50 production is equal to the product of the external clock
58 - adi,ext-clk-pin: The DIOx line to be used as an external clock input.
65 selection or external clock input). When a single pin has two
69 If this field is left empty, DIO2 is assigned as default external clock
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | samsung-pinctrl.txt | 33 - First base address is for GPAx and GPF[1-5] external interrupt
117 External GPIO and Wakeup Interrupts:
119 The controller supports two types of external interrupts over gpio. The first
120 is the external gpio interrupt and second is the external wakeup interrupts.
121 The difference between the two is that the external wakeup interrupts can be
124 A. External GPIO Interrupts: For supporting external gpio interrupts, the
135 - First Cell: represents the external gpio interrupt number local to the
136 external gpio interrupt space of the controller.
144 B. External Wakeup Interrupts: For supporting external wakeup interrupts, a
145 child node representing the external wakeup interrupt controller should be
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| /Documentation/devicetree/bindings/staging/iio/adc/ |
| D | spear-adc.txt | 10 - vref-external: External voltage reference in milli-volts. If omitted
23 vref-external = <2500>; /* 2.5V VRef */
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| /Documentation/devicetree/bindings/net/dsa/ |
| D | mt7530.txt | 44 1. GMAC5: GMAC5 can interface with another external MAC or PHY.
45 2. PHY of port 0 or port 4: PHY interfaces with an external MAC like 2nd GMAC
49 connected to external component!
52 1. Port 5 is disabled and isolated: An external phy can interface to the 2nd
55 GMAC and an optional external phy. Mind the GPIO/pinctl settings of the SOC!
59 3. Port 5 is muxed to GMAC5 and can interface to an external phy.
61 Only works on platform where external phy TX<->RX lines are swapped.
66 Depending on how the external PHY is wired:
68 2. swapped: RGMII TX, RX are swapped; external phy interface with the switch as
229 Example 3: MT7621: Port 5 is connected to external PHY: Port 5 -> external PHY.
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