Searched full:hip06 (Results 1 – 6 of 6) sorted by relevance
| /Documentation/devicetree/bindings/arm/hisilicon/ |
| D | low-pin-count.yaml | 7 title: Hisilicon HiP06 Low Pin Count device
13 Hisilicon HiP06 SoCs implement a Low Pin Count (LPC) controller, which
15 HiP06 is based on arm64 architecture where there is no I/O space. So, the
28 - hisilicon,hip06-lpc
50 compatible = "hisilicon,hip06-lpc";
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| D | hisilicon.yaml | 55 - description: HiP06 D03 Board
57 - const: hisilicon,hip06-d03
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| /Documentation/devicetree/bindings/pci/ |
| D | hisilicon-pcie.txt | 1 HiSilicon Hip05 and Hip06 PCIe host bridge DT description
11 - compatible: Should contain "hisilicon,hip05-pcie" or "hisilicon,hip06-pcie".
23 Hip05 Example (note that Hip06 is the same except compatible):
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| D | host-generic-pci.yaml | 60 HiSilicon Hip06/Hip07 PCIe host bridge in almost-ECAM mode. Some
64 - hisilicon,hip06-pcie-ecam
133 - hisilicon,hip06-pcie-ecam
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| /Documentation/devicetree/bindings/scsi/ |
| D | hisilicon-sas.txt | 8 (b) "hisilicon,hip06-sas-v2" for v2 hw in hip06 chipset
54 - hip06-sas-v2-quirk-amt : when set, indicates that the v2 controller has the
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| /Documentation/devicetree/bindings/crypto/ |
| D | hisilicon,hip07-sec.txt | 5 - "hisilicon,hip06-sec"
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