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/Documentation/arm/
Dinterrupts.rst16 Secondly, the IRQ subsystem.
39 SA1111 IRQ handler, SA1111 IRQs can hold off SMC9196 IRQs indefinitely.
48 We also bring the idea of an IRQ "chip" (mainly to reduce the size of
57 * Acknowledge the IRQ.
58 * If this is a level-based IRQ, then it is expected to mask the IRQ
61 void (*ack)(unsigned int irq);
63 * Mask the IRQ in hardware.
65 void (*mask)(unsigned int irq);
67 * Unmask the IRQ in hardware.
69 void (*unmask)(unsigned int irq);
[all …]
/Documentation/ABI/testing/
Dsysfs-kernel-irq1 What: /sys/kernel/irq
9 one subdirectory for each Linux IRQ number.
11 What: /sys/kernel/irq/<irq>/actions
15 Description: The IRQ action chain. A comma-separated list of zero or more
18 What: /sys/kernel/irq/<irq>/chip_name
25 What: /sys/kernel/irq/<irq>/hwirq
30 the underlying hardware IRQ number used for this Linux IRQ.
32 What: /sys/kernel/irq/<irq>/name
36 Description: Human-readable flow handler name as defined by the irq chip
39 What: /sys/kernel/irq/<irq>/per_cpu_count
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/Documentation/core-api/irq/
Dirq-domain.rst6 space where each separate IRQ source is assigned a different number.
10 IRQ numbers.
15 mechanisms as the IRQ core system by modelling their interrupt
19 hardware interrupt numbers: whereas in the past, IRQ numbers could
20 be chosen so they matched the hardware IRQ line into the root
25 interrupt numbers, called hardware irq's, from Linux IRQ numbers.
28 irq numbers, but they don't provide any support for reverse mapping of
29 the controller-local IRQ (hwirq) number into the Linux IRQ number
32 The irq_domain library adds mapping between hwirq and IRQ numbers on
39 be easily extended to support other IRQ topology data sources.
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Dirqflags-tracing.rst2 IRQ-flags state tracing
7 The "irq-flags tracing" feature "traces" hardirq and softirq state, in
16 are locking APIs that are not used in IRQ context. (the one exception
20 category, because lots of lowlevel assembly code deal with irq-flags
21 state changes. But an architecture can be irq-flags-tracing enabled in a
30 irq-flags-tracing support:
34 closely guards whether the 'real' irq-flags matches the 'virtual'
35 irq-flags state, and complains loudly (and turns itself off) if the
37 irq-flags-tracing is spent in this state: look at the lockdep
40 lockdep complaint in the irq-flags-tracing functions arch support is
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Dirq-affinity.rst2 SMP IRQ affinity
10 /proc/irq/IRQ#/smp_affinity and /proc/irq/IRQ#/smp_affinity_list specify
11 which target CPUs are permitted for a given IRQ source. It's a bitmask
13 allowed to turn off all CPUs, and if an IRQ controller does not support
14 IRQ affinity then the value will not change from the default of all cpus.
16 /proc/irq/default_smp_affinity specifies default affinity mask that applies
17 to all non-active IRQs. Once IRQ is allocated/activated its affinity bitmask
24 [root@moon 44]# cd /proc/irq/44
43 Now lets restrict that IRQ to CPU(4-7).
63 Here is an example of limiting that same irq (44) to cpus 1024 to 1031::
Dconcepts.rst2 What is an IRQ?
5 An IRQ is an interrupt request from a device.
8 sharing an IRQ.
10 An IRQ number is a kernel identifier used to talk about a hardware
15 An IRQ number is an enumeration of the possible interrupt sources on a
21 Architectures can assign additional meaning to the IRQ numbers, and
/Documentation/ia64/
Dirq-redir.rst2 IRQ affinity on IA64 platforms
8 By writing to /proc/irq/IRQ#/smp_affinity the interrupt routing can be
10 that described in Documentation/core-api/irq/irq-affinity.rst for i386 systems.
13 IRQ target is one particular CPU and cannot be a mask of several
27 echo "8" >/proc/irq/41/smp_affinity
29 Set the default route for IRQ number 41 to CPU 6 in lowest priority
32 echo "r 40" >/proc/irq/41/smp_affinity
36 cat /proc/irq/IRQ#/smp_affinity
48 If the platform features IRQ redirection (info provided by SAL) all
52 for the IRQ routing. Currently in Linux XTP registers can have three
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/Documentation/devicetree/bindings/interrupt-controller/
Darm,versatile-fpga-irq.txt3 One or more FPGA IRQ controllers can be synthesized in an ARM reference board
5 controllers are OR:ed together and fed to the CPU tile's IRQ input. Each
9 - compatible: "arm,versatile-fpga-irq" or "oxsemi,ox810se-rps-irq"
12 as the FPGA IRQ controller has no configuration options for interrupt
25 compatible = "arm,versatile-fpga-irq";
34 - interrupts: if the FPGA IRQ controller is cascaded, i.e. if its IRQ
35 output is simply connected to the input of another IRQ controller,
36 then the parent IRQ shall be specified in this property.
Dcdns,xtensa-pic.txt8 When it's 1, the first cell is the internal IRQ number.
9 When it's 2, the first cell is the IRQ number, and the second cell
11 Periferals are usually connected to a fixed external IRQ, but for different
12 core variants it may be mapped to different internal IRQ.
13 IRQ sensitivity and priority are fixed for each core variant and may not be
19 /* one cell: internal irq number,
20 * two cells: second cell == 0: internal irq number
21 * second cell == 1: external irq number
Dst,sti-irq-syscfg.txt10 "st,stih415-irq-syscfg"
11 "st,stih416-irq-syscfg"
12 "st,stih407-irq-syscfg"
13 "st,stid127-irq-syscfg"
14 - st,syscfg : Phandle to Cortex-A9 IRQ system config registers
15 - st,irq-device : Array of IRQs to enable - should be 2 in length
27 irq-syscfg {
28 compatible = "st,stih416-irq-syscfg";
30 st,irq-device = <ST_IRQ_SYSCFG_PMU_0>,
Dti,keystone-irq.txt1 Keystone 2 IRQ controller IP
4 host using the IRQ controller IP. It provides 28 IRQ signals to ARM.
5 The IRQ handler running on HOST OS can identify DSP signal source by
10 - compatible: should be "ti,keystone-irq"
24 compatible = "ti,keystone-irq";
/Documentation/driver-api/gpio/
Ddriver.rst63 - method to return the IRQ number associated to a given GPIO line
87 atomic context on realtime kernels (inside hard IRQ handlers and similar
261 The IRQ portions of the GPIO block are implemented using an irq_chip, using
262 the header <linux/irq.h>. So this combined driver is utilizing two sub-
263 systems simultaneously: gpio and irq.
265 It is legal for any IRQ consumer to request an IRQ from any irqchip even if it
266 is a combined GPIO+IRQ driver. The basic premise is that gpio_chip and
270 gpiod_to_irq() is just a convenience function to figure out the IRQ for a
272 the IRQ is used.
294 irq line to a parent interrupt controller one level up. There is no need
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/Documentation/devicetree/bindings/pci/
Dv3-v360epc-pci.txt40 interrupts = <17>; /* Bus error IRQ */
56 0x4800 0 0 1 &pic 13 /* INT A on slot 9 is irq 13 */
57 0x4800 0 0 2 &pic 14 /* INT B on slot 9 is irq 14 */
58 0x4800 0 0 3 &pic 15 /* INT C on slot 9 is irq 15 */
59 0x4800 0 0 4 &pic 16 /* INT D on slot 9 is irq 16 */
61 0x5000 0 0 1 &pic 14 /* INT A on slot 10 is irq 14 */
62 0x5000 0 0 2 &pic 15 /* INT B on slot 10 is irq 15 */
63 0x5000 0 0 3 &pic 16 /* INT C on slot 10 is irq 16 */
64 0x5000 0 0 4 &pic 13 /* INT D on slot 10 is irq 13 */
66 0x5800 0 0 1 &pic 15 /* INT A on slot 11 is irq 15 */
[all …]
/Documentation/translations/zh_CN/
DIRQ.txt1 Chinese translated version of Documentation/core-api/irq/index.rst
12 Documentation/core-api/irq/index.rst 的中文翻译
25 何为 IRQ?
27 一个 IRQ 是来自某个设备的一个中断请求。目前，它们可以来自一个硬件引脚，
28 或来自一个数据包。多个设备可能连接到同个硬件引脚，从而共享一个 IRQ。
30 一个 IRQ 编号是用于告知硬件中断源的内核标识。通常情况下，这是一个
34 一个 IRQ 编号是设备上某个可能的中断源的枚举。通常情况下，枚举的编号是
38 架构可以对 IRQ 编号指定额外的含义，在硬件涉及任何手工配置的情况下，
39 是被提倡的。ISA 的 IRQ 是一个分配这类额外含义的典型例子。
/Documentation/devicetree/bindings/dma/
Dmmp-dma.txt10 or one irq for pdma device
24 * Each channel has specific irq
25 * ICU parse out irq channel from ICU register,
26 * while DMA controller may not able to distinguish the irq channel
28 * For example, pxa688 icu register 0x128, bit 0~15 is PDMA channel irq,
29 * 18~21 is ADMA irq
40 * One irq for all channels
41 * Dmaengine driver (DMA controller) distinguish irq channel via
59 or one irq for dma device
66 /* each channel has specific irq */
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/Documentation/core-api/
Dgenericirq.rst4 Linux generic IRQ handling
23 generic IRQ handling layer.
51 This split implementation of high-level IRQ handlers allows us to
56 The original general IRQ implementation used hw_interrupt_type
61 ``ioapic_edge_irq`` IRQ-type which share many of the low-level details but
64 A more natural abstraction is the clean separation of the 'irq flow' and
67 Analysing a couple of architecture's IRQ subsystem implementations
68 reveals that most of them can use a generic set of 'irq flow' methods
71 IRQ flow itself but not in the chip details - and thus provides a more
72 transparent IRQ subsystem design.
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/Documentation/devicetree/bindings/iio/accel/
Dlis302.txt36 - st,irq{1,2}-disable: disable IRQ 1/2
37 - st,irq{1,2}-ff-wu-1: raise IRQ 1/2 on FF_WU_1 condition
38 - st,irq{1,2}-ff-wu-2: raise IRQ 1/2 on FF_WU_2 condition
39 - st,irq{1,2}-data-ready: raise IRQ 1/2 on data ready contition
40 - st,irq{1,2}-click: raise IRQ 1/2 on click condition
41 - st,irq-open-drain: consider IRQ lines open-drain
42 - st,irq-active-low: make IRQ lines active low
/Documentation/misc-devices/
Dpci-endpoint-test.rst16 #) raise legacy IRQ
17 #) raise MSI IRQ
18 #) raise MSI-X IRQ
34 Tests legacy IRQ
42 Changes driver IRQ type configuration. The IRQ type
45 Gets driver IRQ type configuration.
/Documentation/scsi/
Dg_NCR5380.rst21 If the irq parameter is 254 or is omitted entirely, the driver will probe
22 for the correct IRQ line automatically. If the irq parameter is 0 or 255
23 then no IRQ will be used.
37 irq=xx[,...] the interrupt(s)
65 modprobe g_NCR5380 irq=5 base=0x350 card=1
71 E.g. a port mapped NCR5380 board, driver to probe for IRQ::
79 E.g. a memory mapped NCR53C400 board with no IRQ::
81 modprobe g_NCR5380 irq=255 base=0xc8000 card=1
87 E.g. two cards, DTC3181 (in non-PnP mode) at 0x240 with no IRQ
88 and HP C2502 at 0x300 with IRQ 7::
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/Documentation/devicetree/bindings/rtc/
Disil,isl12057.txt10 and 2120 ARM-based NAS); On those devices, the IRQ#2 pin of the chip
15 be set when the IRQ#2 pin of the chip is not connected to the SoC but
26 the availability of an IRQ line connected to the SoC.
29 Example isl12057 node without IRQ#2 pin connected (no alarm support):
37 Example isl12057 node with IRQ#2 pin connected to main SoC via MPP6 (note
40 SoC, and the main function of the MPP used as IRQ line, i.e.
67 Example isl12057 node without IRQ#2 pin connected to the SoC but to a
/Documentation/devicetree/bindings/mips/
Dcpu_irq.txt4 IRQs from a devicetree file and create a irq_domain for IRQ controller.
16 cpu-irq: cpu-irq {
32 interrupt-parent = <&cpu-irq>;
37 Example platform irq.c:
/Documentation/power/
Dsuspend-and-interrupts.rst43 The IRQF_NO_SUSPEND flag is used to indicate that to the IRQ subsystem when
45 leave the corresponding IRQ enabled so as to allow the interrupt to work as
50 Note that the IRQF_NO_SUSPEND flag affects the entire IRQ and not just one
51 user of it. Thus, if the IRQ is shared, all of the interrupt handlers installed
54 the IRQ's users. For this reason, using IRQF_NO_SUSPEND and IRQF_SHARED at the
75 The IRQ subsystem provides two helper functions to be used by device drivers for
77 handling the given IRQ as a system wakeup interrupt line and disable_irq_wake()
80 Calling enable_irq_wake() causes suspend_device_irqs() to treat the given IRQ
81 in a special way. Namely, the IRQ remains enabled, by on the first interrupt
105 IRQ subsystem to trigger a system wakeup.
[all …]
/Documentation/virt/kvm/devices/
Dmpic.rst34 IRQ input line for each standard openpic source. 0 is inactive and 1
41 "attr" is the IRQ number. IRQ numbers for standard sources are the
44 IRQ Routing:
46 The MPIC emulation supports IRQ routing. Only a single MPIC device can
58 Access to non-SRC interrupts is not implemented through IRQ routing mechanisms.
/Documentation/admin-guide/
Dparport.rst12 because there are a lot of people using the same IRQ for their
30 # insmod parport_pc io=0x3bc,0x378,0x278 irq=none,7,auto
33 0x3bc with no IRQ, one at 0x378 using IRQ 7, and one at 0x278 with an
34 auto-detected IRQ. Currently, PC-style (``parport_pc``), Sun ``bpp``,
49 options parport_pc io=0x378,0x278 irq=7,auto
51 modprobe will load ``parport_pc`` (with the options ``io=0x378,0x278 irq=7,auto``)
85 command-line will make ``parport`` use any IRQ lines or DMA channels that
115 | |-- irq
130 |-- irq
151 ``irq`` Parallel port's IRQ, or -1 if none is being used.
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/Documentation/devicetree/bindings/mfd/
Dmax8925.txt6 - interrupts : IRQ line for the max8925 chip
10 - The cell is the max8925 local IRQ number
13 - maxim,tsc-irq: there are 2 IRQ lines for max8925, one is indicated in
36 maxim,tsc-irq = <0>;

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