Searched full:intel (Results 1 – 25 of 368) sorted by relevance
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| /Documentation/driver-api/mei/ |
| D | iamt.rst | 3 Intel(R) Active Management Technology (Intel AMT)
6 Prominent usage of the Intel ME Interface is to communicate with Intel(R)
7 Active Management Technology (Intel AMT) implemented in firmware running on
8 the Intel ME.
10 Intel AMT provides the ability to manage a host remotely out-of-band (OOB)
14 Some examples of Intel AMT usage are:
25 Intel AMT (OOB) communication is based on SOAP (deprecated
29 For more information about Intel AMT:
30 https://software.intel.com/sites/manageability/AMT_Implementation_and_Reference_Guide/default.htm
33 Intel AMT Applications
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| D | mei.rst | 6 The Intel Management Engine (Intel ME) is an isolated and protected computing
7 resource (Co-processor) residing inside certain Intel chipsets. The Intel ME
9 The actual feature set depends on the Intel chipset SKU.
11 The Intel Management Engine Interface (Intel MEI, previously known as HECI)
12 is the interface between the Host and Intel ME. This interface is exposed
14 The Intel MEI Driver is in charge of the communication channel between
15 a host application and the Intel ME features.
17 Each Intel ME feature, or Intel ME Client is addressed by a unique GUID and
22 Intel MEI Driver
27 An application maintains communication with an Intel ME feature while
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| /Documentation/i2c/busses/ |
| D | i2c-i801.rst | 7 * Intel 82801AA and 82801AB (ICH and ICH0 - part of the
9 * Intel 82801BA (ICH2 - part of the '815E' chipset)
10 * Intel 82801CA/CAM (ICH3)
11 * Intel 82801DB (ICH4) (HW PEC supported)
12 * Intel 82801EB/ER (ICH5) (HW PEC supported)
13 * Intel 6300ESB
14 * Intel 82801FB/FR/FW/FRW (ICH6)
15 * Intel 82801G (ICH7)
16 * Intel 631xESB/632xESB (ESB2)
17 * Intel 82801H (ICH8)
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| /Documentation/devicetree/bindings/phy/ |
| D | intel,combo-phy.yaml | 4 $id: http://devicetree.org/schemas/phy/intel,combo-phy.yaml#
7 title: Intel ComboPhy Subsystem
10 - Dilip Kota <eswara.kota@linux.intel.com>
13 Intel Combophy subsystem supports PHYs for PCIe, EMAC and SATA
22 - const: intel,combophy-lgm
23 - const: intel,combo-phy
48 intel,syscfg:
52 intel,hsio:
56 intel,aggregation:
61 intel,phy-mode:
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| D | intel,lgm-emmc-phy.yaml | 4 $id: http://devicetree.org/schemas/phy/intel,lgm-emmc-phy.yaml#
7 title: Intel Lightning Mountain(LGM) eMMC PHY Device Tree Bindings
10 - Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
13 Bindings for eMMC PHY on Intel's Lightning Mountain SoC, syscon
20 "intel,lgm-syscon", "syscon"
27 - const: intel,lgm-emmc-phy
28 - const: intel,keembay-emmc-phy
54 compatible = "intel,lgm-syscon", "syscon";
60 compatible = "intel,lgm-emmc-phy";
69 compatible = "intel,keembay-emmc-phy";
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| /Documentation/networking/device_drivers/ethernet/ |
| D | index.rst | 29 intel/e100
30 intel/e1000
31 intel/e1000e
32 intel/fm10k
33 intel/igb
34 intel/igbvf
35 intel/ixgb
36 intel/ixgbe
37 intel/ixgbevf
38 intel/i40e
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| /Documentation/networking/device_drivers/ethernet/intel/ |
| D | ixgbevf.rst | 4 Linux Base Virtual Function Driver for Intel(R) 10G Ethernet
7 Intel 10 Gigabit Virtual Function Linux driver.
8 Copyright(c) 1999-2018 Intel Corporation.
21 supplied with your Intel adapter. All hardware requirements listed apply to use
29 * Intel(R) Ethernet Controller 82598
30 * Intel(R) Ethernet Controller 82599
31 * Intel(R) Ethernet Controller X520
32 * Intel(R) Ethernet Controller X540
33 * Intel(R) Ethernet Controller x550
34 * Intel(R) Ethernet Controller X552
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| D | ice.rst | 4 Linux Base Driver for the Intel(R) Ethernet Connection E800 Series
7 Intel ice Linux driver.
8 Copyright(c) 2018 Intel Corporation.
16 The driver in this release supports Intel's E800 Series of products. For
17 more information, visit Intel's support page at https://support.intel.com.
31 -> Intel devices
32 -> Intel(R) Ethernet Connection E800 Series Support
36 For general information, go to the Intel support website at:
38 https://www.intel.com/support/
40 or the Intel Wired Networking project hosted by Sourceforge at:
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| D | igbvf.rst | 4 Linux Base Virtual Function Driver for Intel(R) 1G Ethernet
7 Intel Gigabit Virtual Function Linux driver.
8 Copyright(c) 1999-2018 Intel Corporation.
16 This driver supports Intel 82576-based virtual function devices-based virtual
24 supplied with your Intel adapter. All hardware requirements listed apply to use
36 For information on how to identify your adapter, and for the latest Intel
37 network drivers, refer to the Intel Support website:
38 https://www.intel.com/support
55 For general information, go to the Intel support website at:
57 https://www.intel.com/support/
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| /Documentation/admin-guide/pm/ |
| D | intel-speed-select.rst | 4 Intel(R) Speed Select Technology User Guide
7 The Intel(R) Speed Select Technology (Intel(R) SST) provides a powerful new
9 With Intel(R) SST, one server can be configured for power and performance for a
14 - https://www.intel.com/content/www/us/en/architecture-and-technology/speed-select-technology-artic…
15 - https://builders.intel.com/docs/networkbuilders/intel-speed-select-technology-base-frequency-enha…
21 and configure these features is by using the Intel Speed Select utility.
23 This document explains how to use the Intel Speed Select tool to enumerate and
24 control Intel(R) SST features. This document gives example commands and explains
29 intel-speed-select configuration tool
32 Most Linux distribution packages may include the "intel-speed-select" tool. If not,
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| /Documentation/power/powercap/ |
| D | powercap.rst | 15 example, the intel-rapl control type represents the Intel "Running Average
35 └──intel-rapl
36 ├──intel-rapl:0
43 │ ├──device -> ../../intel-rapl
45 │ ├──intel-rapl:0:0
52 │ │ ├──device -> ../../intel-rapl:0
62 │ ├──intel-rapl:0:1
69 │ │ ├──device -> ../../intel-rapl:0
89 ├──intel-rapl:1
96 │ ├──device -> ../../intel-rapl
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| /Documentation/devicetree/bindings/reset/ |
| D | intel,rcu-gw.yaml | 4 $id: http://devicetree.org/schemas/reset/intel,rcu-gw.yaml#
7 title: System Reset Controller on Intel Gateway SoCs
10 - Dilip Kota <eswara.kota@linux.intel.com>
15 - intel,rcu-lgm
16 - intel,rcu-xrx200
22 intel,global-reset:
45 - intel,global-reset
53 compatible = "intel,rcu-lgm";
55 intel,global-reset = <0x10 30>;
61 compatible = "intel,lgm-pwm";
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| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | intel,ixp4xx-interrupt.yaml | 5 $id: "http://devicetree.org/schemas/interrupt-controller/intel,ixp4xx-interrupt.yaml#"
8 title: Intel IXP4xx XScale Networking Processors Interrupt Controller
14 This interrupt controller is found in the Intel IXP4xx processors.
28 - intel,ixp42x-interrupt
29 - intel,ixp43x-interrupt
30 - intel,ixp45x-interrupt
31 - intel,ixp46x-interrupt
52 compatible = "intel,ixp43x-interrupt";
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| /Documentation/ABI/testing/ |
| D | sysfs-bus-intel_th-devices-pti | 4 Contact: Alexander Shishkin <alexander.shishkin@linux.intel.com>
11 Contact: Alexander Shishkin <alexander.shishkin@linux.intel.com>
19 Contact: Alexander Shishkin <alexander.shishkin@linux.intel.com>
21 - 0: Intel TH clock rate,
22 - 1: 1/2 Intel TH clock rate,
23 - 2: 1/4 Intel TH clock rate,
24 - 3: 1/8 Intel TH clock rate.
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| D | sysfs-bus-mei | 4 Contact: Samuel Ortiz <sameo@linux.intel.com>
5 linux-mei@linux.intel.com
12 Contact: Tomas Winkler <tomas.winkler@intel.com>
19 Contact: Tomas Winkler <tomas.winkler@intel.com>
26 Contact: Tomas Winkler <tomas.winkler@intel.com>
33 Contact: Tomas Winkler <tomas.winkler@intel.com>
40 Contact: Tomas Winkler <tomas.winkler@intel.com>
47 Contact: Tomas Winkler <tomas.winkler@intel.com>
54 Contact: Tomas Winkler <tomas.winkler@intel.com>
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| D | sysfs-class-mic | 4 Contact: Sudeep Dutt <sudeep.dutt@intel.com>
6 The mic class directory belongs to Intel MIC devices and
7 provides information per MIC device. An Intel MIC device is a
8 PCIe form factor add-in Coprocessor card based on the Intel Many
14 Contact: Sudeep Dutt <sudeep.dutt@intel.com>
23 Contact: Sudeep Dutt <sudeep.dutt@intel.com>
25 Provides information about the Coprocessor family for an Intel
31 Contact: Sudeep Dutt <sudeep.dutt@intel.com>
33 Provides information about the silicon stepping for an Intel
39 Contact: Sudeep Dutt <sudeep.dutt@intel.com>
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| D | sysfs-platform-dfl-fme | 4 Contact: Wu Hao <hao.wu@intel.com>
12 Contact: Wu Hao <hao.wu@intel.com>
20 Contact: Wu Hao <hao.wu@intel.com>
28 Contact: Wu Hao <hao.wu@intel.com>
34 Contact: Wu Hao <hao.wu@intel.com>
42 Contact: Wu Hao <hao.wu@intel.com>
51 Contact: Wu Hao <hao.wu@intel.com>
60 Contact: Wu Hao <hao.wu@intel.com>
69 Contact: Wu Hao <hao.wu@intel.com>
75 Contact: Wu Hao <hao.wu@intel.com>
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| D | sysfs-class-mei | 4 Contact: Tomas Winkler <tomas.winkler@intel.com>
12 Contact: Tomas Winkler <tomas.winkler@intel.com>
20 Contact: Tomas Winkler <tomas.winkler@intel.com>
35 Contact: Tomas Winkler <tomas.winkler@intel.com>
44 Contact: Tomas Winkler <tomas.winkler@intel.com>
52 Contact: Tomas Winkler <tomas.winkler@intel.com>
61 Contact: Tomas Winkler <tomas.winkler@intel.com>
72 Contact: Tomas Winkler <tomas.winkler@intel.com>
87 Contact: Tomas Winkler <tomas.winkler@intel.com>
97 Contact: Tomas Winkler <tomas.winkler@intel.com>
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| D | sysfs-platform-dfl-port | 4 Contact: Wu Hao <hao.wu@intel.com>
12 Contact: Wu Hao <hao.wu@intel.com>
21 Contact: Wu Hao <hao.wu@intel.com>
29 Contact: Wu Hao <hao.wu@intel.com>
37 Contact: Wu Hao <hao.wu@intel.com>
45 Contact: Wu Hao <hao.wu@intel.com>
53 Contact: Wu Hao <hao.wu@intel.com>
60 Contact: Wu Hao <hao.wu@intel.com>
67 Contact: Wu Hao <hao.wu@intel.com>
74 Contact: Wu Hao <hao.wu@intel.com>
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| /Documentation/hwmon/ |
| D | intel-m10-bmc-hwmon.rst | 3 Kernel driver intel-m10-bmc-hwmon
8 * Intel MAX 10 BMC for Intel PAC N3000
12 Author: Xu Yilun <yilun.xu@intel.com>
19 support for the Intel MAX 10 Board Management Controller (BMC) chip.
20 The BMC chip is integrated in some Intel Programmable Acceleration
27 The BMC chip is implemented using the Intel MAX 10 CPLD. It could be
28 reprogramed to some variants in order to support different Intel
30 variants, but now it only supports the BMC for Intel PAC N3000.
38 - Intel MAX 10 BMC for Intel PAC N3000:
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| D | nct6683.rst | 36 Limit register locations on Intel boards with EC firmware version 1.0
38 datasheet. Nuvoton confirms that Intel uses a special firmware version
39 with different register addresses. The specification describing the Intel
40 firmware is held under NDA by Nuvoton and Intel and not available
48 The driver has only been tested with the Intel firmware, and by default
49 only instantiates on Intel boards. To enable it on non-Intel boards,
61 Intel DH87RL NCT6683D EC firmware version 1.0 build 04/03/13
62 Intel DH87MC NCT6683D EC firmware version 1.0 build 04/03/13
63 Intel DB85FL NCT6683D EC firmware version 1.0 build 04/03/13
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| /Documentation/devicetree/bindings/sound/ |
| D | intel,keembay-i2s.yaml | 2 # Copyright 2020 Intel Corporation
5 $id: http://devicetree.org/schemas/sound/intel,keembay-i2s.yaml#
8 title: Intel KeemBay I2S Device Tree Bindings
11 - Sia, Jee Heng <jee.heng.sia@intel.com>
14 Intel KeemBay I2S
19 - intel,keembay-i2s
20 - intel,keembay-tdm
65 compatible = "intel,keembay-i2s";
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| /Documentation/driver-api/firmware/ |
| D | other_interfaces.rst | 16 Intel Stratix10 SoC Service Layer
18 Some features of the Intel Stratix10 SoC require a level of privilege
24 The Intel Stratix10 SoC service layer provides an in kernel API for
29 .. kernel-doc:: include/linux/firmware/intel/stratix10-svc-client.h
32 .. kernel-doc:: include/linux/firmware/intel/stratix10-svc-client.h
35 .. kernel-doc:: include/linux/firmware/intel/stratix10-svc-client.h
38 .. kernel-doc:: include/linux/firmware/intel/stratix10-svc-client.h
41 .. kernel-doc:: include/linux/firmware/intel/stratix10-svc-client.h
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| /Documentation/fb/ |
| D | intelfb.rst | 2 Intel 830M/845G/852GM/855GM/865G/915G/945G Framebuffer driver
8 This is a framebuffer driver for various Intel 8xx/9xx compatible
11 - Intel 830M
12 - Intel 845G
13 - Intel 852GM
14 - Intel 855GM
15 - Intel 865G
16 - Intel 915G
17 - Intel 915GM
18 - Intel 945G
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| /Documentation/devicetree/bindings/arm/ |
| D | intel,keembay.yaml | 4 $id: http://devicetree.org/schemas/arm/intel,keembay.yaml#
10 - Paul J. Murphy <paul.j.murphy@intel.com>
11 - Daniele Alessandrelli <daniele.alessandrelli@intel.com>
17 - intel,keembay-evm
18 - const: intel,keembay
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