Home
last modified time | relevance | path

Searched full:mx (Results 1 – 25 of 73) sorted by relevance

123

/Documentation/devicetree/bindings/interrupt-controller/
Dcdns,xtensa-mx.txt1 * Xtensa Interrupt Distributor and Programmable Interrupt Controller (MX)
4 - compatible: Should be "cdns,xtensa-mx".
11 compatible = "cdns,xtensa-mx";
/Documentation/devicetree/bindings/sound/
Dimx-audio-sgtl5000.txt1 Freescale i.MX audio complex with SGTL5000 codec
9 - ssi-controller : The phandle of the i.MX SSI controller
35 - mux-int-port : The internal port of the i.MX audio muxer (AUDMUX)
37 - mux-ext-port : The external port of the i.MX audio muxer
Dimx-audio-es8328.txt1 Freescale i.MX audio complex with ES8328 codec
6 - ssi-controller : The phandle of the i.MX SSI controller
34 - mux-int-port : The internal port of the i.MX audio muxer (AUDMUX)
35 - mux-ext-port : The external port of the i.MX audio muxer (AUDMIX)
Deukrea-tlv320.txt11 - fsl,mux-int-port : The internal port of the i.MX audio muxer (AUDMUX).
13 - fsl,mux-ext-port : The external port of the i.MX audio muxer.
Dimx-audio-spdif.txt1 Freescale i.MX audio complex with S/PDIF transceiver
9 - spdif-controller : The phandle of the i.MX S/PDIF controller
Dfsl-asoc-card.txt84 - mux-int-port : The internal port of the i.MX audio muxer (AUDMUX)
86 - mux-ext-port : The external port of the i.MX audio muxer
/Documentation/devicetree/bindings/media/
Dimx.txt1 Freescale i.MX Media Video Device
27 This is the device node for the MIPI CSI-2 Receiver core in the i.MX
30 addition this device consists of an i.MX-specific "CSI2IPU gasket"
34 to the i.MX IPU CSIs.
Dcoda.txt4 Coda codec IPs are present in i.MX SoCs in various versions,
8 - compatible : should be "fsl,<chip>-src" for i.MX SoCs:
/Documentation/devicetree/bindings/mmc/
Damlogic,meson-mx-sdhc.yaml4 $id: http://devicetree.org/schemas/mmc/amlogic,meson-mx-sdhc.yaml#
27 - const: amlogic,meson-mx-sdhc
61 compatible = "amlogic,meson8-sdhc", "amlogic,meson-mx-sdhc";
Damlogic,meson-mx-sdio.txt16 along with the generic "amlogic,meson-mx-sdio"
40 compatible = "amlogic,meson8-sdio", "amlogic,meson-mx-sdio";
/Documentation/devicetree/bindings/arm/amlogic/
Dbootrom.txt9 - compatible: should be "amlogic,meson-mx-bootrom" along with "syscon"
15 compatible = "amlogic,meson-mx-bootrom", "syscon";
Dassist.txt9 - compatible: should be "amlogic,meson-mx-assist" along with "syscon"
15 compatible = "amlogic,meson-mx-assist", "syscon";
/Documentation/devicetree/bindings/display/imx/
Dfsl-imx-drm.txt1 Freescale i.MX DRM master device
4 The freescale i.MX DRM master device is a virtual device needed to list all
20 Freescale i.MX IPUv3
62 Freescale i.MX PRE (Prefetch Resolve Engine)
88 Freescale i.MX PRG (Prefetch Resolve Gasket)
/Documentation/devicetree/bindings/cpufreq/
Dimx-cpufreq-dt.txt1 i.MX CPUFreq-DT OPP bindings
4 Certain i.MX SoCs support different OPPs depending on the "market segment" and
/Documentation/devicetree/bindings/remoteproc/
Dqcom,q6v5.txt117 - mx-supply:
128 - mx-supply:
159 must be "cx", "mx"
162 must be "cx", "mx", "mss", "load_state"
241 mx-supply = <&pm8841_s1>;
/Documentation/devicetree/bindings/ata/
Dimx-sata.yaml7 title: Freescale i.MX AHCI SATA Controller
13 The Freescale i.MX SATA controller mostly conforms to the AHCI interface
Dimx-pata.txt1 * Freescale i.MX PATA Controller
/Documentation/xtensa/
Datomctl.rst25 For systems without an coherent cache controller, non-MX, we always
26 use the memory controllers RCW, thought non-MX controlers likely
/Documentation/devicetree/bindings/soc/qcom/
Dqcom,aoss-qmp.txt58 to identify the resource and must therefor be "cx", "mx" or "ebi".
82 mx_cdev: mx {
/Documentation/devicetree/bindings/interconnect/
Dfsl,imx8m-noc.yaml7 title: Generic i.MX bus frequency device
13 The i.MX SoC family has multiple buses for which clock frequency (and
/Documentation/devicetree/bindings/usb/
Dusbmisc-imx.txt1 * Freescale i.MX non-core registers
/Documentation/i2c/busses/
Di2c-piix4.rst7 * Intel 82443MX (440MX)
77 The ServerWorks Southbridges, the Intel 440MX, and the Victory66 are
/Documentation/devicetree/bindings/crypto/
Dfsl-imx-sahara.yaml7 title: Freescale SAHARA Cryptographic Accelerator included in some i.MX chips
/Documentation/w1/masters/
Dmxc-w1.rst7 * Freescale MX27, MX31 and probably other i.MX SoCs
/Documentation/devicetree/bindings/nvmem/
Dsnvs-lpgpr.yaml7 title: Low Power General Purpose Register found in i.MX Secure Non-Volatile Storage

123