Searched full:pm (Results 1 – 25 of 142) sorted by relevance
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/Documentation/devicetree/bindings/arm/ux500/ |
D | power_domain.txt | 1 * ST-Ericsson UX500 PM Domains 3 UX500 supports multiple PM domains which are used to gate power to one or 6 The implementation of PM domains for UX500 are based upon the generic PM domain 9 ==PM domain providers== 12 - compatible: Must be "stericsson,ux500-pm-domains". 17 compatible = "stericsson,ux500-pm-domains"; 21 ==PM domain consumers== 24 - power-domains: A phandle and PM domain specifier. Below are the list of
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/Documentation/power/ |
D | runtime_pm.rst | 14 Support for runtime power management (runtime PM) of I/O devices is provided 15 at the power management core (PM core) level by means of: 18 put their PM-related work items. It is strongly recommended that pm_wq be 19 used for queuing all work items related to runtime PM, because this allows 24 * A number of runtime PM fields in the 'power' member of 'struct device' (which 25 is of the type 'struct dev_pm_info', defined in include/linux/pm.h) that can 26 be used for synchronizing runtime PM operations with one another. 28 * Three device runtime PM callbacks in 'struct dev_pm_ops' (defined in 29 include/linux/pm.h). 32 used for carrying out runtime PM operations in such a way that the [all …]
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D | pm_qos_interface.rst | 2 PM Quality Of Service Interface 9 Two different PM QoS frameworks are available: 11 * The per-device PM QoS framework provides the API to manage the 12 per-device latency constraints and PM QoS flags. 14 The latency unit used in the PM QoS framework is the microsecond (usec). 17 1. PM QoS framework 35 Clients of PM QoS need to save the returned handle for future use in other 36 PM QoS API functions. 68 Only processes can register a PM QoS request. To provide for automatic 72 To register the default PM QoS target for the CPU latency QoS, the process must [all …]
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D | pci.rst | 13 power management refer to Documentation/driver-api/pm/devices.rst and 44 approach, that is referred to as the native PCI power management (native PCI PM) 50 Devices supporting the native PCI PM usually can generate wakeup signals called 65 native PCI PM mechanism, because the method provided by the platform depends on 74 The PCI Bus Power Management Interface Specification (PCI PM Spec) was 79 The implementation of the PCI PM Spec is optional for conventional PCI devices, 80 but it is mandatory for PCI Express devices. If a device supports the PCI PM 85 The PCI PM Spec defines 4 operating states for devices (D0-D3) and for buses 102 regardless of whether or not it implements the PCI PM Spec. In addition to 103 that, if the PCI PM Spec is implemented by the device, it must support D3hot [all …]
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D | drivers-testing.rst | 21 testing the new driver. Please see Documentation/power/basic-pm-debugging.rst 31 (see: Documentation/power/basic-pm-debugging.rst, 1). 34 "platform" modes (see: Documentation/power/basic-pm-debugging.rst, 1). 43 Documentation/power/basic-pm-debugging.rst, 2). [As far as the STR tests are 48 (see: Documentation/power/basic-pm-debugging.rst, 2).
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/Documentation/devicetree/bindings/power/ |
D | power_domain.txt | 1 * Generic PM domains 3 System on chip designs are often divided into multiple PM domains that can be 7 This device tree binding can be used to bind PM domain consumer devices with 8 their PM domains provided by PM domain providers. A PM domain provider can be 9 represented by any node in the device tree and can provide one or more PM 11 phandle arguments (so called PM domain specifiers) of length specified by the 12 #power-domain-cells property in the PM domain provider node. 14 ==PM domain providers== 18 ==PM domain consumers== 21 - power-domains : A list of PM domain specifiers, as defined by bindings of [all …]
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D | renesas,sysc-rmobile.txt | 23 - pm-domains: This node contains a hierarchy of PM domain nodes, which should 28 == PM Domain Nodes == 30 Each of the PM domain nodes represents a PM domain, as documented by the 31 generic PM domain bindings in 41 - reg: If the PM domain is not always-on, this property must contain the bit 47 If the PM domain is always-on, this property must be omitted. 52 This shows a subset of the r8a7740 PM domain hierarchy, containing the 60 pm-domains { 87 == PM Domain Consumers == 89 Hardware blocks belonging to a PM domain should contain a "power-domains" [all …]
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D | power-domain.yaml | 7 title: Generic PM domains 15 System on chip designs are often divided into multiple PM domains that can be 19 This device tree binding can be used to bind PM domain consumer devices with 20 their PM domains provided by PM domain providers. A PM domain provider can be 21 represented by any node in the device tree and can provide one or more PM 23 phandle arguments (so called PM domain specifiers) of length specified by the 24 \#power-domain-cells property in the PM domain provider node. 38 PM domain and not the idle states of the devices or sub-domains in the PM 54 Number of cells in a PM domain specifier. Typically 0 for nodes 55 representing a single PM domain and 1 for nodes providing multiple PM [all …]
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D | xlnx,zynqmp-genpd.txt | 2 Device Tree Bindings for the Xilinx Zynq MPSoC PM domains 5 generic PM domain binding[1]. 9 == Zynq MPSoC Generic PM Domain Node == 13 - #power-domain-cells: Number of cells in a PM domain specifier. Must be 1.
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/Documentation/devicetree/bindings/soc/bcm/ |
D | brcm,bcm2835-pm.txt | 1 BCM2835 PM (Power domains, watchdog) 3 The PM block controls power domains and some reset lines, and includes 4 a watchdog timer. This binding supersedes the brcm,bcm2835-pm-wdt 5 binding which covered some of PM's register range and functionality. 9 - compatible: Should be "brcm,bcm2835-pm" 11 register ranges ("PM" and "ASYNC_BRIDGE" in that 34 pm { 35 compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt";
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/Documentation/ABI/testing/ |
D | sysfs-class-powercap | 4 Contact: linux-pm@vger.kernel.org 13 Contact: linux-pm@vger.kernel.org 22 Contact: linux-pm@vger.kernel.org 30 Contact: linux-pm@vger.kernel.org 40 Contact: linux-pm@vger.kernel.org 51 Contact: linux-pm@vger.kernel.org 58 Contact: linux-pm@vger.kernel.org 67 Contact: linux-pm@vger.kernel.org 75 Contact: linux-pm@vger.kernel.org 82 Contact: linux-pm@vger.kernel.org [all …]
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D | sysfs-class-power | 5 Contact: linux-pm@vger.kernel.org 14 Contact: linux-pm@vger.kernel.org 23 Contact: linux-pm@vger.kernel.org 32 Contact: linux-pm@vger.kernel.org 43 Contact: linux-pm@vger.kernel.org 66 Contact: linux-pm@vger.kernel.org 81 Contact: linux-pm@vger.kernel.org 106 Contact: linux-pm@vger.kernel.org 124 Contact: linux-pm@vger.kernel.org 148 Contact: linux-pm@vger.kernel.org [all …]
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D | sysfs-ata | 20 nr_pmp_links: (RO) If a SATA Port Multiplier (PM) is 40 Behind each port, there is a ata_link. If there is a SATA PM in the topology, 15 44 of the port. If a link is behind a PM, its name is linkX.Y where X is 45 ata_port_id of the parent port and Y the PM port. 70 - Y the port of the PM if any, and 89 gscr: (RO) Cached result of the dump of PM GSCR 101 Only valid if the device is a PM. 108 the device is not a PM. 120 "atapi" for packet device, "pmp" for PM, or
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D | sysfs-devices-lpss_ltr | 18 This attribute is read-only. If the device's runtime PM status 30 This attribute is read-only. If the device's runtime PM status 42 This attribute is read-only. If the device's runtime PM status
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/Documentation/arm/omap/ |
D | omap_pm.rst | 2 The OMAP PM interface 5 This document describes the temporary OMAP PM interface. Driver 8 Over time, the intention is to merge features from the OMAP PM 9 interface into the Linux PM QoS code. 11 Drivers need to express PM parameters which: 15 - separate the drivers from the underlying PM parameter 16 implementation, whether it is the TI SRF or Linux PM QoS or Linux 19 - specify PM parameters in terms of fundamental units, such as 31 This document proposes the OMAP PM interface, including the following 55 Further documentation for all OMAP PM interface functions can be [all …]
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/Documentation/devicetree/bindings/soc/ti/ |
D | sci-pm-domain.txt | 11 PM Domain Node 13 The PM domain node represents the global PM domain managed by the PMMC, which 14 in this case is the implementation as documented by the generic PM domain 21 - compatible: should be "ti,sci-pm-domain" 39 compatible = "ti,sci-pm-domain"; 44 PM Domain Consumers 46 Hardware blocks belonging to a PM domain should contain a "power-domains" 47 property that is a phandle pointing to the corresponding PM domain node 53 - power-domains: phandle pointing to the corresponding PM domain node
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/Documentation/devicetree/bindings/bus/ |
D | simple-pm-bus.yaml | 4 $id: http://devicetree.org/schemas/bus/simple-pm-bus.yaml# 16 However, its bus controller is part of a PM domain, or under the control 17 of a functional clock. Hence, the bus controller's PM domain and/or 21 While "simple-pm-bus" follows the "simple-bus" set of properties, as 31 const: simple-pm-bus 33 Shall contain "simple-pm-bus" in addition to a optional bus-specific 34 compatible strings defined in individual pm-bus bindings. 73 compatible = "simple-pm-bus";
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D | renesas,bsc.yaml | 19 PM domain, and may have a gateable functional clock. Before a device 20 connected to the BSC can be accessed, the PM domain containing the BSC 24 The bindings for the BSC extend the bindings for "simple-pm-bus". 27 - $ref: simple-pm-bus.yaml# 36 - {} # simple-pm-bus, but not listed here to avoid false select 54 compatible = "renesas,bsc-sh73a0", "renesas,bsc", "simple-pm-bus";
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/Documentation/driver-api/pm/ |
D | devices.rst | 18 management (PM) code is also driver-specific. Most drivers will do very 67 the PM core are involved in runtime power management. As in the system 76 synergies exist, so that several drivers using runtime PM might put the system 102 struct dev_pm_ops defined in :file:`include/linux/pm.h`. The roles of the 121 struct dev_pm_domain, or by the :c:member:`pm` member of struct bus_type, 125 device drivers whose subsystems (PM domains, device types, device classes and 152 its system wakeup mechanism and for notifying the PM core of system wakeup 260 the device is suspending (i.e. has been chosen by the PM core as the next 279 All phases use PM domain, bus, type, class or driver callbacks (that is, methods 280 defined in ``dev->pm_domain->ops``, ``dev->bus->pm``, ``dev->type->pm``, [all …]
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/Documentation/fault-injection/ |
D | notifier-error-inject.rst | 9 * PM notifier 14 PM notifier error injection module 18 /sys/kernel/debug/notifier-error-inject/pm/actions/<notifier event>/error 20 Possible PM notifier events to be failed are: 26 Example: Inject PM suspend error (-12 = -ENOMEM):: 28 # cd /sys/kernel/debug/notifier-error-inject/pm/
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/Documentation/arm/samsung-s3c24xx/ |
D | suspend.rst | 58 and will end up initialising all compiled machines' pm init! 85 There are several important things to remember when using PM suspend: 91 2) While the pm code itself will attempt to re-enable the UART clocks, 108 `S3C2410 PM Suspend debug` 115 `S3C2410 PM Suspend Memory CRC` 127 `S3C2410 PM Suspend CRC Chunksize (KiB)`
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/Documentation/gpu/ |
D | amdgpu.rst | 158 .. kernel-doc:: drivers/gpu/drm/amd/pm/amdgpu_pm.c 169 .. kernel-doc:: drivers/gpu/drm/amd/pm/amdgpu_pm.c 175 .. kernel-doc:: drivers/gpu/drm/amd/pm/amdgpu_pm.c 181 .. kernel-doc:: drivers/gpu/drm/amd/pm/amdgpu_pm.c 187 .. kernel-doc:: drivers/gpu/drm/amd/pm/amdgpu_pm.c 193 .. kernel-doc:: drivers/gpu/drm/amd/pm/amdgpu_pm.c 199 .. kernel-doc:: drivers/gpu/drm/amd/pm/amdgpu_pm.c 205 .. kernel-doc:: drivers/gpu/drm/amd/pm/amdgpu_pm.c 208 .. kernel-doc:: drivers/gpu/drm/amd/pm/amdgpu_pm.c 214 .. kernel-doc:: drivers/gpu/drm/amd/pm/amdgpu_pm.c [all …]
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/Documentation/devicetree/bindings/arm/omap/ |
D | mpu.txt | 17 - pm-sram: Phandles to ocmcram nodes to be used for power management. 19 and run PM functions, second should be regular pool to be used for 52 pm-sram = <&pm_sram_code
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/Documentation/devicetree/bindings/watchdog/ |
D | brcm,bcm2835-pm-wdog.txt | 5 - compatible : should be "brcm,bcm2835-pm-wdt" 15 compatible = "brcm,bcm2835-pm-wdt";
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/Documentation/devicetree/bindings/pci/ |
D | rockchip-pcie-ep.txt | 15 - "pm" 23 - "pm" 48 "hclk", "pm"; 57 "pm", "pclk", "aclk";
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