Searched full:secure (Results 1 – 25 of 140) sorted by relevance
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/Documentation/devicetree/bindings/arm/ |
D | secure.txt | 1 * ARM Secure world bindings 4 "Normal" and "Secure". Most devicetree consumers (including the Linux 6 world or the Secure world. However some devicetree consumers are 8 visible only in the Secure address space, only in the Normal address 10 virtual machine which boots Secure firmware and wants to tell the 13 The general principle of the naming scheme for Secure world bindings 14 is that any property that needs a different value in the Secure world 15 can be supported by prefixing the property name with "secure-". So for 16 instance "secure-foo" would override "foo". For property names with 17 a vendor prefix, the Secure variant of "vendor,foo" would be [all …]
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/Documentation/devicetree/bindings/crypto/ |
D | inside-secure-safexcel.txt | 1 Inside Secure SafeXcel cryptographic engine 4 - compatible: Should be "inside-secure,safexcel-eip197b", 5 "inside-secure,safexcel-eip197d" or 6 "inside-secure,safexcel-eip97ies". 21 - "inside-secure,safexcel-eip197" is equivalent to 22 "inside-secure,safexcel-eip197b". 23 - "inside-secure,safexcel-eip97" is equivalent to 24 "inside-secure,safexcel-eip97ies". 29 compatible = "inside-secure,safexcel-eip197b";
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/Documentation/devicetree/bindings/iommu/ |
D | qcom,iommu.txt | 6 to non-secure vs secure interrupt line. 31 - qcom,iommu-secure-id : secure-id. 37 - "qcom,msm-iommu-v1-ns" : non-secure context bank 38 - "qcom,msm-iommu-v1-sec" : secure context bank 46 for routing of context bank irq's to secure vs non- 47 secure lines. (Ie. if the iommu contains secure 63 qcom,iommu-secure-id = <17>; 89 qcom,iommu-secure-id = <18>;
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D | msm,iommu-v0.txt | 12 support secure mode two interrupts must be specified, for non-secure and 13 secure mode, in that order. For instances that don't support secure mode a
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/Documentation/devicetree/bindings/arm/samsung/ |
D | samsung-secure-firmware.yaml | 4 $id: http://devicetree.org/schemas/arm/samsung/samsung-secure-firmware.yaml# 7 title: Samsung Exynos Secure Firmware 15 - const: samsung,secure-firmware 19 Address of non-secure SYSRAM used for communication with firmware. 31 compatible = "samsung,secure-firmware";
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/Documentation/devicetree/bindings/arm/amlogic/ |
D | amlogic,meson-gx-ao-secure.yaml | 5 $id: "http://devicetree.org/schemas/arm/amlogic/amlogic,meson-gx-ao-secure.yaml#" 15 secure firmware. 22 const: amlogic,meson-gx-ao-secure 29 - const: amlogic,meson-gx-ao-secure 50 ao-secure@140 { 51 compatible = "amlogic,meson-gx-ao-secure", "syscon";
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/Documentation/powerpc/ |
D | ultravisor.rst | 15 POWER 9 that enables Secure Virtual Machines (SVMs). DD2.3 chips 56 process is running in secure mode, MSR(S) bit 41. MSR(S)=1, process 57 is in secure mode, MSR(s)=0 process is in normal mode. 63 the VM it is returning to is secure. 73 **Secure Mode MSR Settings** 101 * Memory is partitioned into secure and normal memory. Only processes 102 that are running in secure mode can access secure memory. 104 * The hardware does not allow anything that is not running secure to 105 access secure memory. This means that the Hypervisor cannot access 110 * I/O systems are not allowed to directly address secure memory. This [all …]
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/Documentation/devicetree/bindings/firmware/meson/ |
D | meson_sm.txt | 1 * Amlogic Secure Monitor 3 In the Amlogic SoCs the Secure Monitor code is used to provide access to the 6 Required properties for the secure monitor node: 12 sm: secure-monitor {
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/Documentation/devicetree/bindings/rng/ |
D | omap_rng.txt | 1 OMAP SoC and Inside-Secure HWRNG Module 9 - "inside-secure,safexcel-eip76" for SoCs with EIP76 IP block 14 Used for "ti,omap4-rng" and "inside-secure,safexcel-eip76" 16 "inside-secure,safexcel-eip76" compatible, the second clock is 34 compatible = "inside-secure,safexcel-eip76";
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D | omap3_rom_rng.txt | 3 Secure SoCs may provide RNG via secure ROM calls like Nokia N900 does. The 4 implementation can depend on the SoC secure ROM used.
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/Documentation/devicetree/bindings/nvmem/ |
D | st,stm32-romem.yaml | 32 st,non-secure-otp: 34 This property explicits a factory programmed area that both secure 35 and non-secure worlds can access. It is needed when, by default, the 36 related area can only be reached by the secure world. 61 st,non-secure-otp;
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D | amlogic-efuse.txt | 7 - secure-monitor: phandle to the secure-monitor node 20 secure-monitor = <&sm>; 35 sm: secure-monitor {
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/Documentation/devicetree/bindings/power/ |
D | amlogic,meson-sec-pwrc.yaml | 9 title: Amlogic Meson Secure Power Domains 15 Secure Power Domains used in Meson A1/C1 SoCs, and should be the child node 16 of secure-monitor. 34 secure-monitor {
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/Documentation/devicetree/bindings/thermal/ |
D | amlogic,thermal.yaml | 31 amlogic,ao-secure: 32 description: phandle to the ao-secure syscon 43 - amlogic,ao-secure 56 amlogic,ao-secure = <&sec_AO>;
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/Documentation/devicetree/bindings/firmware/ |
D | intel,stratix10-svc.txt | 4 processor system (HPS) and Secure Device Manager (SDM). When the FPGA is 10 communication with SDM, only the secure world of software (EL3, Exception 18 driver also manages secure monitor call (SMC) to communicate with secure monitor 28 smc - Secure Monitor Call
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/Documentation/devicetree/bindings/misc/ |
D | brcm,kona-smc.txt | 1 Broadcom Secure Monitor Bounce buffer 4 used for non-secure to secure communications.
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/Documentation/ABI/testing/ |
D | sysfs-secvar | 5 secureboot, thereby secure variables. It exposes interface 6 for reading/writing the secure variables 11 Description: This directory lists all the secure variables that are supported 24 Description: Each secure variable is represented as a directory named as
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/Documentation/devicetree/bindings/mailbox/ |
D | ti,secure-proxy.txt | 1 Texas Instruments' Secure Proxy 4 The Texas Instruments' secure proxy is a mailbox controller that has 15 - compatible: Shall be "ti,am654-secure-proxy" 32 compatible = "ti,am654-secure-proxy";
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D | arm,mhu.yaml | 19 be a 'Secure' resource, hence can't be used by Linux running NS. 61 - description: low-priority non-secure 62 - description: high-priority non-secure 63 - description: Secure 101 <0 37 4>; /* Secure */ 125 <0 37 4>; /* Secure */
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/Documentation/devicetree/bindings/soc/rockchip/ |
D | grf.txt | 7 - GRF, used for general non-secure system, 8 - SGRF, used for general secure system, 14 - GRF, used for general non-secure system, 15 - SGRF, used for general secure system,
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/Documentation/virt/kvm/ |
D | s390-pv.rst | 20 The Ultravisor will secure and decrypt the guest's boot memory 70 The control structures associated with SIE provide the Secure 72 Secure Interception General Register Save Area. Guest GRs and most of 75 GRs are put into / retrieved from the Secure Interception General 88 The Secure Instruction Data Area contains instruction storage 99 There are two types of SIE secure instruction intercepts: the normal 100 and the notification type. Normal secure instruction intercepts will
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/Documentation/devicetree/bindings/security/tpm/ |
D | google,cr50.txt | 1 * H1 Secure Microcontroller with Cr50 Firmware on SPI Bus. 3 H1 Secure Microcontroller running Cr50 firmware provides several
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/Documentation/staging/ |
D | tee.rst | 8 secure environment, for example, TrustZone on ARM CPUs, or a separate 9 secure co-processor etc. A TEE driver handles the details needed to 139 separate secure co-processor. 152 User space Kernel Secure world 172 RPC (Remote Procedure Call) are requests from secure world to kernel driver 191 TEE environment is provided by AMD Secure Processor. 193 The AMD Secure Processor (formerly called Platform Security Processor or PSP) 204 User space (Kernel space) | AMD Secure Processor (PSP) 227 At the lowest level (in x86), the AMD Secure Processor (ASP) driver uses the 230 the secure processor and return results to AMD-TEE driver. The interface [all …]
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/Documentation/devicetree/bindings/timer/ |
D | ti,timer.txt | 32 - ti,timer-secure: Indicates the timer is reserved on a secure OMAP device 43 ti,timer-secure;
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/Documentation/driver-api/firmware/ |
D | other_interfaces.rst | 19 higher than the kernel is granted. Such secure features include 25 drivers to request access to the secure features. The requests are queued 27 of the requests on to a secure monitor (EL3).
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