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/Documentation/hwmon/
Dpcf8591.rst17 - Aurelien Jarno <aurelien@aurel32.net>
18 - valuable contributions by Jan M. Sendler <sendler@sendler.de>,
19 - Jean Delvare <jdelvare@suse.de>
23 -----------
25 The PCF8591 is an 8-bit A/D and D/A converter (4 analog inputs and one
29 The PCF8591 has 4 analog inputs programmable as single-ended or
32 - mode 0 : four single ended inputs
33 Pins AIN0 to AIN3 are single ended inputs for channels 0 to 3
35 - mode 1 : three differential inputs
39 - mode 2 : single ended and differential mixed
[all …]
Dads7828.rst6 * Texas Instruments/Burr-Brown ADS7828
23 - Steve Hardy <shardy@redhat.com>
24 - Vivien Didelot <vivien.didelot@savoirfairelinux.com>
25 - Guillaume Roguez <guillaume.roguez@savoirfairelinux.com>
28 -------------
34 set to true for differential mode, false for default single ended mode.
45 If no structure is provided, the configuration defaults to single ended
49 -----------
53 The ADS7828 device is a 12-bit 8-channel A/D converter, while the ADS7830 does
54 8-bit sampling.
[all …]
Dmcp3021.rst22 - Mingkai Hu
23 - Sven Schuchmann <schuchmann@schleissheimer.de>
26 -----------
32 converter (ADC) with 10-bit resolution. The MCP3221 has 12-bit resolution.
34 These devices provide one single-ended input with very low power consumption.
35 Communication to the MCP3021/MCP3221 is performed using a 2-wire I2C
/Documentation/devicetree/bindings/sound/
Dpcm3060.txt7 - compatible: "ti,pcm3060"
9 - reg : the I2C address of the device for I2C, the chip select
14 - ti,out-single-ended: "true" if output is single-ended;
22 ti,out-single-ended = "true";
Dcs42l52.txt5 - compatible : "cirrus,cs42l52"
7 - reg : the I2C address of the device for I2C
11 - cirrus,reset-gpio : GPIO controller's phandle and the number
14 - cirrus,chgfreq-divisor : Values used to set the Charge Pump Frequency.
21 - cirrus,mica-differential-cfg : boolean, If present, then the MICA input is configured
23 Single-ended input. Single-ended mode allows for MIC1 or MIC2 muxing for input.
25 - cirrus,micb-differential-cfg : boolean, If present, then the MICB input is configured
27 Single-ended input. Single-ended mode allows for MIC1 or MIC2 muxing for input.
29 - cirrus,micbias-lvl: Set the output voltage level on the MICBIAS Pin
42 reset-gpio = <&gpio 10 0>;
[all …]
Dak5386.txt1 AK5386 Single-ended 24-Bit 192kHz delta-sigma ADC
7 - compatible : "asahi-kasei,ak5386"
11 - reset-gpio : a GPIO spec for the reset/power down pin.
13 - va-supply : a regulator spec, providing 5.0V
14 - vd-supply : a regulator spec, providing 3.3V
19 compatible = "asahi-kasei,ak5386";
20 reset-gpio = <&gpio0 23>;
21 va-supply = <&vdd_5v0_reg>;
22 vd-supply = <&vdd_3v3_reg>;
Dwm8994.txt8 - compatible : One of "wlf,wm1811", "wlf,wm8994" or "wlf,wm8958".
10 - reg : the I2C address of the device for I2C, the chip select
13 - gpio-controller : Indicates this device is a GPIO controller.
14 - #gpio-cells : Must be 2. The first cell is the pin number and the
17 - power supplies for the device, as covered in
20 - for wlf,wm1811 and wlf,wm8958:
21 AVDD1-supply, AVDD2-supply, DBVDD1-supply, DBVDD2-supply, DBVDD3-supply,
22 DCVDD-supply, CPVDD-supply, SPKVDD1-supply, SPKVDD2-supply
23 - for wlf,wm8994:
24 AVDD1-supply, AVDD2-supply, DBVDD-supply, DCVDD-supply, CPVDD-supply,
[all …]
Drt5660.txt7 - compatible : "realtek,rt5660".
9 - reg : The I2C address of the device.
13 - clocks: The phandle of the master clock to the CODEC
14 - clock-names: Should be "mclk"
16 - realtek,in1-differential
17 - realtek,in3-differential
18 Boolean. Indicate MIC1/3 input are differential, rather than single-ended.
20 - realtek,poweroff-in-suspend
24 - realtek,dmic1-data-pin
Drt5651.txt7 - compatible : "realtek,rt5651".
9 - reg : The I2C address of the device.
13 - realtek,in2-differential
14 Boolean. Indicate MIC2 input are differential, rather than single-ended.
16 - realtek,dmic-en
19 - realtek,jack-detect-source
21 1: Use JD1_1 pin for jack-detect
22 2: Use JD1_2 pin for jack-detect
23 3: Use JD2 pin for jack-detect
25 - realtek,jack-detect-not-inverted
[all …]
Drt5665.txt7 - compatible : One of "realtek,rt5665", "realtek,rt5666".
9 - reg : The I2C address of the device.
11 - interrupts : The CODEC's interrupt output.
15 - realtek,in1-differential
16 - realtek,in2-differential
17 - realtek,in3-differential
18 - realtek,in4-differential
19 Boolean. Indicate MIC1/2/3/4 input are differential, rather than single-ended.
21 - realtek,dmic1-data-pin
26 - realtek,dmic2-data-pin
[all …]
Dti,tas5086.txt1 Texas Instruments TAS5086 6-channel PWM Processor
5 - compatible: Should contain "ti,tas5086".
6 - reg: The i2c address. Should contain <0x1b>.
10 - reset-gpio: A GPIO spec to define which pin is connected to the
14 - ti,charge-period: This property should contain the time in microseconds
15 that closely matches the external single-ended
16 split-capacitor charge period. The hardware chip
23 - ti,mid-z-channel-X: Boolean properties, X being a number from 1 to 6.
24 If given, channel X will start with the Mid-Z start
25 sequence, otherwise the default Low-Z scheme is used.
[all …]
Drt5659.txt7 - compatible : One of "realtek,rt5659" or "realtek,rt5658".
9 - reg : The I2C address of the device.
11 - interrupts : The CODEC's interrupt output.
15 - clocks: The phandle of the master clock to the CODEC
16 - clock-names: Should be "mclk"
18 - realtek,in1-differential
19 - realtek,in3-differential
20 - realtek,in4-differential
21 Boolean. Indicate MIC1/3/4 input are differential, rather than single-ended.
23 - realtek,dmic1-data-pin
[all …]
Drt5645.txt7 - compatible : One of "realtek,rt5645" or "realtek,rt5650".
9 - reg : The I2C address of the device.
11 - interrupts : The CODEC's interrupt output.
13 - avdd-supply: Power supply for AVDD, providing 1.8V.
15 - cpvdd-supply: Power supply for CPVDD, providing 3.5V.
19 - hp-detect-gpios:
20 a GPIO spec for the external headphone detect pin. If jd-mode = 0,
21 we will get the JD status by getting the value of hp-detect-gpios.
23 - realtek,in2-differential
24 Boolean. Indicate MIC2 input are differential, rather than single-ended.
[all …]
Drt5677.txt7 - compatible : "realtek,rt5677".
9 - reg : The I2C address of the device.
11 - interrupts : The CODEC's interrupt output.
13 - gpio-controller : Indicates this device is a GPIO controller.
15 - #gpio-cells : Should be two. The first cell is the pin number and the
20 - realtek,pow-ldo2-gpio : The GPIO that controls the CODEC's POW_LDO2 pin.
21 - realtek,reset-gpio : The GPIO that controls the CODEC's RESET pin. Active low.
23 - realtek,in1-differential
24 - realtek,in2-differential
25 - realtek,lout1-differential
[all …]
/Documentation/devicetree/bindings/hwmon/
Dadc128d818.txt2 --------------------------------------------------------
6 - Mode 0: 7 single-ended voltage readings (IN0-IN6),
8 - Mode 1: 8 single-ended voltage readings (IN0-IN7),
10 - Mode 2: 4 pseudo-differential voltage readings
11 (IN0-IN1, IN3-IN2, IN4-IN5, IN7-IN6),
13 - Mode 3: 4 single-ended voltage readings (IN0-IN3),
14 2 pseudo-differential voltage readings
15 (IN4-IN5, IN7-IN6),
24 - compatible: must be set to "ti,adc128d818"
25 - reg: I2C address of the device
[all …]
/Documentation/devicetree/bindings/iio/temperature/
Dadi,ltc2983.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Analog Devices LTC2983 Multi-sensor Temperature system
10 - Nuno Sá <nuno.sa@analog.com>
13 Analog Devices LTC2983 Multi-Sensor Digital Temperature Measurement System
14 https://www.analog.com/media/en/technical-documentation/data-sheets/2983fc.pdf
19 - adi,ltc2983
27 adi,mux-delay-config-us:
38 adi,filter-notch-freq:
[all …]
/Documentation/devicetree/bindings/iio/adc/
Dst,stm32-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/iio/adc/st,stm32-adc.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
10 STM32 ADC is a successive approximation analog-to-digital converter.
12 in single, continuous, scan or discontinuous mode. Result of the ADC is
13 stored in a left-aligned or right-aligned 32-bit data register.
17 voltage goes beyond the user-defined, higher or lower thresholds.
22 - Fabrice Gasnier <fabrice.gasnier@st.com>
27 - st,stm32f4-adc-core
[all …]
Dti,adc108s102.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bogdan Pricop <bogdan.pricop@emutex.com>
13 Family of 8 channel, 10/12 bit, SPI, single ended ADCs.
21 vref-supply: true
22 spi-max-frequency: true
23 "#io-channel-cells":
27 - compatible
28 - reg
[all …]
Dlltc,ltc2497.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Hennerich <michael.hennerich@analog.com>
13 16bit ADC supporting up to 16 single ended or 8 differential inputs.
22 vref-supply: true
23 "#io-channel-cells":
27 - compatible
28 - reg
29 - vref-supply
[all …]
Dti,ads8344.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Gregory Clement <gregory.clement@bootlin.com>
13 16bit 8-channel ADC with single ended inputs.
22 spi-max-frequency: true
24 vref-supply:
27 "#io-channel-cells":
31 - compatible
32 - reg
[all …]
Dti,adc0832.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Akinobu Mita <akinobu.mita@gmail.com>
13 8 bit ADCs with 1, 2, 4 or 8 inputs for single ended or differential
19 - ti,adc0831
20 - ti,adc0832
21 - ti,adc0834
22 - ti,adc0838
27 spi-max-frequency: true
[all …]
Daspeed,ast2400-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/aspeed,ast2400-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Joel Stanley <joel@jms.id.au>
13 This device is a 10-bit converter for 16 voltage channels. All inputs are
14 single ended.
19 - aspeed,ast2400-adc
20 - aspeed,ast2500-adc
33 "#io-channel-cells":
[all …]
Dst,stm32-dfsdm-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-dfsdm-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Fabrice Gasnier <fabrice.gasnier@st.com>
11 - Olivier Moysan <olivier.moysan@st.com>
14 STM32 DFSDM ADC is a sigma delta analog-to-digital converter dedicated to
17 - Sigma delta modulators (motor control, metering...)
18 - PDM microphones (audio digital microphone)
28 - st,stm32h7-dfsdm
[all …]
/Documentation/devicetree/bindings/clock/
Dti,cdce706.txt1 Bindings for Texas Instruments CDCE706 programmable 3-PLL clock
7 - compatible: shall be "ti,cdce706".
8 - reg: i2c device address, shall be in range [0x68...0x6b].
9 - #clock-cells: from common clock binding; shall be set to 1.
10 - clocks: from common clock binding; list of parent clock
13 - clock-names: shall be clk_in0 and/or clk_in1. Use clk_in0
16 single-ended LVCMOS inputs configuration.
22 #clock-cells = <0>;
23 compatible = "fixed-clock";
24 clock-frequency = <54000000>;
[all …]
/Documentation/x86/
Dtlb.rst1 .. SPDX-License-Identifier: GPL-2.0
10 1. Flush the entire TLB with a two-instruction sequence. This is
14 2. Use the invlpg instruction to invalidate a single page at a
26 all of the individual flush will have ended up being wasted
32 4. The microarchitecture. The TLB has become a multi-level
34 expensive relative to single-page flushes.
53 Despite the fact that a single individual flush on x86 is
67 perf stat -e
75 That works on an IvyBridge-era CPU (i5-3320M). Different CPUs
76 may have differently-named counters, but they should at least
[all …]

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