| /Documentation/devicetree/bindings/power/supply/ |
| D | qcom_smbb.txt | 6 Value type: <stringlist>
12 Value type: <prop-encoded-array>
17 Value type: <prop-encoded-array>
32 Value type: <stringlist>
44 Usage: optional (default: 1A, or pre-configured value)
45 Value type: <u32>; uA; range [100mA : 3A]
49 Usage: optional (default: 3.2V, or pre-configured value)
50 Value type: <u32>; uV; range [2.1V : 3.6V]
52 Below this value linear or switch-mode auto-trickle-charging
56 Usage: optional (default: 4.2V, or pre-configured value)
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| /Documentation/admin-guide/ |
| D | bootconfig.rst | 15 additional key-value data when booting the kernel in an efficient way.
21 The boot config syntax is a simple structured key-value. Each key consists
22 of dot-connected-words, and key and value are connected by ``=``. The value
24 For array value, array entries are separated by comma (``,``). ::
26 KEY[.WORD[...]] = VALUE[, VALUE2[...]][;]
31 (``_``). And each value only contains printable characters or spaces except
35 If you want to use those delimiters in a value, you can use either double-
36 quotes (``"VALUE"``) or single-quotes (``'VALUE'``) to quote it. Note that
39 There can be a key which doesn't have value or has an empty value. Those keys
42 Key-Value Syntax
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| D | jfs.rst | 18 resize=value
19 Resize the volume to <value> blocks. JFS only supports
22 read-write. The resize keyword with no value will grow
43 uid=value
44 Override on-disk uid with specified value
45 gid=value
46 Override on-disk gid with specified value
47 umask=value
48 Override on-disk umask with specified octal value. For
58 The value of minlen specifies the minimum blockcount, when
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| /Documentation/misc-devices/ |
| D | apds990x.rst | 25 using clear channel only. Lux value and the threshold level on the HW
29 only lux values. Lux value is calculated using information from the both
30 channels. HW threshold level is calculated from the given lux value to match
60 RO - measured lux value
65 RO - lux0_input max value.
68 to saturate much before that. Real max value varies depending
78 RW - calibration value.
80 Set to neutral value by default.
82 value.
85 RO - neutral calibration value
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| D | bh1770glc.rst | 38 below the threshold value, there is no interrupt and the delayed work will
44 value set to neutral state meaning factor of 1.00. To get proper values,
46 so that measurement produces about the expected lux value.
63 RO - measured lux value
68 RO - lux0_input max value
77 RW - HI level threshold value
79 All results above the value
84 RW - LO level threshold value
86 All results below the value
90 RW - calibration value
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| /Documentation/fb/ |
| D | sa1100fb.rst | 16 video=sa1100fb:bpp:<value>,lccr0:<value>,lccr1:<value>,lccr2:<value>,lccr3:<value>
19 controller. The bits per pixel (bpp) value should be 4, 8, 12, or
34 bpp:<value> Configure for <value> bits per pixel
35 lccr0:<value> Configure LCD control register 0 (11.7.3)
36 lccr1:<value> Configure LCD control register 1 (11.7.4)
37 lccr2:<value> Configure LCD control register 2 (11.7.5)
38 lccr3:<value> Configure LCD control register 3 (11.7.6)
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| /Documentation/devicetree/bindings/sound/ |
| D | qcom,wcd9335.txt | 13 Value type: <stringlist>
23 Value type: <u32 u32>
28 Value type: <prop-encoded-array>
33 Value type: <String array>
39 Value type: <String Array>
44 Value type: <phandle>
49 Value type: <prop-encoded-array>
55 Value type: <string>
60 Value type: <phandle>
65 Value type: <phandle>
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| /Documentation/ABI/testing/ |
| D | sysfs-bus-coresight-devices-tmc | 15 The value is read directly from HW register RSZ, 0x004.
21 Description: (Read) Shows the value held by the TMC status register. The value
28 Description: (Read) Shows the value held by the TMC RAM Read Pointer register
30 interface. The value is read directly from HW register RRP,
37 Description: (Read) Shows the value held by the TMC RAM Write Pointer register
39 the CoreSight bus into the Trace RAM. The value is read directly
46 Description: (Read) Similar to "trigger_cntr" above except that this value is
53 Description: (Read) Shows the value held by the TMC Control register. The value
60 Description: (Read) Shows the value held by the TMC Formatter and Flush Status
61 register. The value is read directly from HW register FFSR,
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| D | sysfs-bus-coresight-devices-etb10 | 20 value stored in this register+1 (from ARM ETB-TRM).
27 2. The value is read directly from HW register RDP, 0x004.
33 Description: (Read) Shows the value held by the ETB status register. The value
40 Description: (Read) Shows the value held by the ETB RAM Read Pointer register
42 interface. The value is read directly from HW register RRP,
49 Description: (Read) Shows the value held by the ETB RAM Write Pointer register
51 the CoreSight bus into the Trace RAM. The value is read directly
58 Description: (Read) Similar to "trigger_cntr" above except that this value is
65 Description: (Read) Shows the value held by the ETB Control register. The value
72 Description: (Read) Shows the value held by the ETB Formatter and Flush Status
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| /Documentation/powerpc/ |
| D | dscr.rst | 16 dscr /* Thread DSCR value */
21 dscr_default /* per-CPU DSCR default value */
25 dscr_default /* System DSCR default value */
30 CPU's PACA value into the register if the thread has dscr_inherit value
32 If the dscr_inherit value is set which means that it has changed the
33 default DSCR value, scheduler will write the changed value which will
35 the per-CPU default PACA based DSCR value.
37 NOTE: Please note here that the system wide global DSCR value never
48 value into every CPU's DSCR register right away and updates the current
49 thread's DSCR value as well.
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| /Documentation/devicetree/bindings/pci/ |
| D | qcom,pcie.txt | 5 Value type: <stringlist>
6 Definition: Value should contain
19 Value type: <prop-encoded-array>
24 Value type: <stringlist>
33 Value type: <string>
38 Value type: <u32>
43 Value type: <u32>
48 Value type: <prop-encoded-array>
53 Value type: <prop-encoded-array>
58 Value type: <stringlist>
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| /Documentation/devicetree/bindings/mmc/ |
| D | sdhci-sprd.txt | 29 write line delay value, clock read command line delay value, clock read data
30 positive edge delay value and clock read data negative edge delay value.
31 Each cell's delay value unit is cycle of the PHY clock.
33 - sprd,phy-delay-legacy: Delay value for legacy timing.
34 - sprd,phy-delay-sd-highspeed: Delay value for SD high-speed timing.
35 - sprd,phy-delay-sd-uhs-sdr50: Delay value for SD UHS SDR50 timing.
36 - sprd,phy-delay-sd-uhs-sdr104: Delay value for SD UHS SDR50 timing.
37 - sprd,phy-delay-mmc-highspeed: Delay value for MMC high-speed timing.
38 - sprd,phy-delay-mmc-ddr52: Delay value for MMC DDR52 timing.
39 - sprd,phy-delay-mmc-hs200: Delay value for MMC HS200 timing.
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| D | exynos-dw-mshc.txt | 26 * samsung,dw-mshc-ciu-div: Specifies the divider value for the card interface
28 ignored for Exynos4 SoC's. The valid range of divider value is 0 to 7.
30 * samsung,dw-mshc-sdr-timing: Specifies the value of CIU clock phase shift value
31 in transmit mode and CIU clock phase shift value in receive mode for single
35 * samsung,dw-mshc-ddr-timing: Specifies the value of CUI clock phase shift value
36 in transmit mode and CIU clock phase shift value in receive mode for double
39 * samsung,dw-mshc-hs400-timing: Specifies the value of CIU TX and RX clock phase
40 shift value for hs400 mode operation.
45 - First Cell: CIU clock phase shift value for tx mode.
46 - Second Cell: CIU clock phase shift value for rx mode.
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| /Documentation/devicetree/bindings/phy/ |
| D | qcom,usb-hs-phy.txt | 7 Value type: <string>
17 Value type: <u32>
22 Value type: <prop-encoded-array>
28 Value type: <stringlist>
34 Value type: <prop-encoded-array>
39 Value type: <stringlist>
45 Value type: <phandle>
50 Value type: <phandle>
55 Value type: <prop-encoded-array>
60 Value type: <u8 array>
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| D | qcom,usb-8x16-phy.txt | 5 Value type: <string>
10 Value type: <prop-encoded-array>
15 Value type: <prop-encoded-array>
22 Value type: <string>
27 Value type: <phandle>
32 Value type: <phandle>
37 Value type: <phandle>
42 Value type: <prop-encoded-array>
47 Value type: <string>
52 Value type: <prop-encoded-array>
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| /Documentation/devicetree/bindings/powerpc/fsl/ |
| D | srio-rmu.txt | 12 Value type: <string>
16 revision register's Major(X) and Minor (Y) value.
20 Value type: <prop-encoded-array>
27 Value type: <prop-encoded-array>
32 The LIODN value is associated with all RMU transactions
43 Value type: <string>
47 revision register's Major(X) and Minor (Y) value.
51 Value type: <prop-encoded-array>
58 Value type: <prop_encoded-array>
60 value of the interrupts property consists of one interrupt
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| /Documentation/userspace-api/media/v4l/ |
| D | vidioc-g-ctrl.rst | 13 VIDIOC_G_CTRL - VIDIOC_S_CTRL - Get or set the value of a control
38 To get the current value of a control applications initialize the ``id``
41 value of a control applications initialize the ``id`` and ``value``
46 ``value`` is out of bounds drivers can choose to take the closest valid
47 value or return an ``ERANGE`` error code, whatever seems more appropriate.
49 actual new value. If the ``value`` is inappropriate for the control
71 - ``value``
72 - New value or current value.
74 Return Value
83 or the ``value`` is inappropriate for the given control (i.e. if a
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| /Documentation/power/ |
| D | pm_qos_interface.rst | 21 (effective) target value. The aggregated target value is updated with changes
23 aggregated target value is simply the min of the request values held in the list
26 Note: the aggregated target value is implemented as an atomic variable so that
27 reading the aggregated value does not require any locking mechanism.
32 Will insert an element into the CPU latency QoS list with the target value.
34 notifiers are called only if the target value is now different.
40 value and recompute the new aggregated target, calling the notification tree
49 Returns the aggregated value for the CPU latency QoS.
57 called when the aggregated value for the CPU latency QoS is changed.
78 To change the requested target value, the process needs to write an s32 value to
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| /Documentation/hwmon/ |
| D | w83793.rst | 56 - If the value is 3, it starts monitoring using a remote termal diode
58 - If the value is 6, it starts monitoring using the temperature sensor
61 Temp5-6 can be connected to external thermistors (value of
65 For voltage sensors, an alarm triggers if the measured value is below
67 For temperature sensors, an alarm triggers if the measured value goes
69 value drops below the hysteresis value.
70 For fan sensors, an alarm triggers if the measured value is below the
76 to manual mode, you need to check the value of temp[1-6]_fan_map, make
77 sure bit 0 is cleared in the 6 values. And then set the pwm1 value to
85 PWM value requests from different temperature channels, but the chip
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| /Documentation/devicetree/bindings/remoteproc/ |
| D | qcom,hexagon-v56.txt | 8 Value type: <string>
15 Value type: <prop-encoded-array>
20 Value type: <prop-encoded-array>
26 Value type: <stringlist>
31 Value type: <prop-encoded-array>
37 Value type: <stringlist>
46 Value type: <stringlist>
54 Value type: <phandle>
59 Value type: <phandle>
64 Value type: <stringlist>
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| /Documentation/arm/nwfpe/ |
| D | netwinder-fpe.rst | 80 ADF{cond}<S|D|E>{P,M,Z} Fd, Fn, <Fm,#value> - add
81 SUF{cond}<S|D|E>{P,M,Z} Fd, Fn, <Fm,#value> - subtract
82 RSF{cond}<S|D|E>{P,M,Z} Fd, Fn, <Fm,#value> - reverse subtract
83 MUF{cond}<S|D|E>{P,M,Z} Fd, Fn, <Fm,#value> - multiply
84 DVF{cond}<S|D|E>{P,M,Z} Fd, Fn, <Fm,#value> - divide
85 RDV{cond}<S|D|E>{P,M,Z} Fd, Fn, <Fm,#value> - reverse divide
89 FML{cond}<S|D|E>{P,M,Z} Fd, Fn, <Fm,#value> - fast multiply
90 FDV{cond}<S|D|E>{P,M,Z} Fd, Fn, <Fm,#value> - fast divide
91 FRD{cond}<S|D|E>{P,M,Z} Fd, Fn, <Fm,#value> - fast reverse divide
101 RMF{cond}<S|D|E>{P,M,Z} Fd, Fn, <Fm,#value> - IEEE remainder
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| /Documentation/devicetree/bindings/input/ |
| D | qcom,pm8xxx-keypad.txt | 7 Value type: <string>
14 Value type: <prop-encoded-array>
19 Value type: <prop-encoded-array>
27 Value type: <prop-encoded-array>
33 Value type: <bool>
38 Value type: <bool>
44 Value type: <u32>
50 Value type: <u32>
56 Value type: <u32>
62 Value type: <u32>
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | qcom,pmic-mpp.txt | 8 Value type: <string>
29 Value type: <prop-encoded-array>
34 Value type: <prop-encoded-array>
40 Value type: <none>
45 Value type: <u32>
79 Value type: <string-array>
91 Value type: <string>
100 Value type: <none>
105 Value type: <u32>
114 Value type: <none>
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| /Documentation/devicetree/bindings/soundwire/ |
| D | qcom,sdw.txt | 9 Value type: <stringlist>
18 Value type: <prop-encoded-array>
24 Value type: <prop-encoded-array>
29 Value type: <stringlist>
34 Value type: <prop-encoded-array>
39 Value type: <u32>
44 Value type: <u32>
49 Value type: <u32>
54 Value type: <prop-encoded-array>
61 Value type: <prop-encoded-array>
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| /Documentation/devicetree/bindings/soc/qcom/ |
| D | qcom,smp2p.txt | 4 a single 32-bit value between two processors. Each value has a single writer
11 Value type: <string>
17 Value type: <prop-encoded-array>
22 Value type: <prop-encoded-array>
28 Value type: <prop-encoded-array>
37 Value type: <u32 array>
43 Value type: <u32>
48 Value type: <u32>
58 Value type: <string>
66 Value type: <empty>
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