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/Documentation/hwmon/
Disl68137.rst25 Publicly available (after August 2020 launch) at the Renesas website
35 Publicly available (after August 2020 launch) at the Renesas website
45 Publicly available (after August 2020 launch) at the Renesas website
55 Publicly available (after August 2020 launch) at the Renesas website
65 Publicly available (after August 2020 launch) at the Renesas website
75 Publicly available (after August 2020 launch) at the Renesas website
85 Publicly available (after August 2020 launch) at the Renesas website
95 Publicly available (after August 2020 launch) at the Renesas website
105 Publicly available (after August 2020 launch) at the Renesas website
115 Publicly available (after August 2020 launch) at the Renesas website
[all …]
/Documentation/devicetree/bindings/power/reset/
Dgpio-restart.txt14 reset. After a delay specified by active-delay, the GPIO is set to
16 triggered reset. After a delay specified by inactive-delay, the GPIO
17 is driven active again. After a delay specified by wait-delay, the
40 - active-delay: Delay (default 100) to wait after driving gpio active [ms]
41 - inactive-delay: Delay (default 100) to wait after driving gpio inactive [ms]
42 - wait-delay: Delay (default 3000) to wait after completing restart
Dgpio-poweroff.txt12 triggering positive edge triggered power off. After a delay of 100ms,
14 triggering negative edge triggered power off. After another 100ms
16 the CPU still running after a 3000ms delay, a WARN_ON(1) is emitted.
30 - active-delay-ms: Delay (default 100) to wait after driving gpio active
31 - inactive-delay-ms: Delay (default 100) to wait after driving gpio inactive
/Documentation/devicetree/bindings/
D.yamllint19 colons: {max-spaces-before: 0, max-spaces-after: 1}
20 commas: {min-spaces-after: 1, max-spaces-after: 1}
34 max-spaces-after: 1
/Documentation/driver-api/md/
Draid5-cache.rst34 The write-through cache will cache all data on cache disk first. After the data
36 two-step write will guarantee MD can recover correct data after unclean
40 filesystems) after the data is safe on RAID disks, so cache disk failure
57 RAID disks only after the data becomes a full stripe write. This will
62 filesystems) right after the data hits cache disk. The data is flushed to raid
63 disks later after specific conditions met. So cache disk failure will cause
92 parity to the log, writes the data and parity to RAID disks after the data and
99 MD will calculate parity for the data and write parity into the log. After this
105 After an unclean shutdown, MD does recovery. MD reads all meta data and data
/Documentation/devicetree/bindings/regulator/
Drichtek,rtmv20-regulator.yaml38 load current pulse delay in microsecond after strobe pin pulse high.
45 Load current pulse width in microsecond after strobe pin pulse high.
52 Fsin1 pulse high delay in microsecond after vsync signal pulse high.
59 Fsin1 pulse high width in microsecond after vsync signal pulse high.
66 Fsin2 pulse high delay in microsecond after vsync signal pulse high.
73 Fsin2 pulse high width in microsecond after vsync signal pulse high.
/Documentation/ABI/stable/
Dsysfs-transport-srp12 Description: Number of seconds the SCSI layer will wait after a transport
21 Description: Number of seconds the SCSI layer will wait after a transport
37 Description: Number of seconds the SCSI layer will wait after a reconnect
55 after the fast_io_fail_tmo timer has fired and before the
56 "dev_loss_tmo" timer has fired; "lost" after the
Dsysfs-bus-mhi6 using a BHI (Boot Host Interface) register read after at least
17 obtained using a BHI (Boot Host Interface) register read after
/Documentation/power/
Dsuspend-and-interrupts.rst13 suspend after the "late" phase of suspending devices (that is, after all of the
17 The rationale for doing so is that after the "late" phase of device suspend
22 not prepared for interrupts triggering after their devices had been suspended.
52 for it will be executed as usual after suspend_device_irqs(), even if the
72 After wakeup, it generally is better to disable that input to prevent the
90 already suspended. However, after suspend_device_irqs() interrupt handlers are
101 interrupts right after the "noirq" phase of suspending devices.
122 interrupts (interrupt handlers are invoked after suspend_device_irqs()) are
124 handlers are not invoked after suspend_device_irqs()).
Ds2ram.rst56 until after the hash is checked. You can check the hash against the current
57 devices again after more modules are loaded using sysfs::
78 Consequence is that after a resume (even if it is successful) your system
85 quickly after the resume failure. The trace option does not use the seconds
Dpci.rst52 requiring the device to be active. After receiving a PME the kernel is supposed
412 a notification for the PCI subsystem after the source device has been
420 example, it is called right after the device has just been resumed), in which
434 always run after tasks have been frozen.
472 The pci_pm_suspend_noirq() routine is executed after suspend_device_irqs() has
560 The freezing of devices is carried out after enough memory has been freed (at
615 After saving the image, devices need to be powered down before the system can
641 which in turn is loaded and run by a boot loader in the usual way. After the
718 (when a hibernation image is about to be created), during power-off after
736 The suspend() callback is only executed during system suspend, after prepare()
[all …]
Dfreezing-of-tasks.rst28 sets this variable. After this, it executes try_to_freeze_tasks() that sends a
61 If a freezable kernel thread fails to call try_to_freeze() after the freezer has
67 After the system memory state has been restored from a hibernation image and
106 1. The principal reason is to prevent filesystems from being damaged after
112 on-disk data and metadata after the system memory state has been restored
116 modified after the hibernation image has been created and before the
124 Then, after the memory for the image has been freed, we don't want tasks
157 thawed after the driver's .resume() callback has run, so it won't be accessing
163 occurred and should continue running without any problems after the restore
236 released only after the entire suspend/hibernation sequence is complete. So, to
/Documentation/m68k/
Dbuddha-driver.rst33 as long as $48 is not touched. After $48 has been written,
146 value 0 (Default after reset)
147 497ns Select (7 clock cycles) , IOR/IOW after 172ns (2 clock cycles)
152 639ns Select (9 clock cycles), IOR/IOW after 243ns (3 clock cycles)
155 781ns Select (11 clock cycles), IOR/IOW after 314ns (4 clock cycles)
158 355ns Select (5 clock cycles), IOR/IOW after 101ns (1 clock cycle)
161 355ns Select (5 clock cycles), IOR/IOW after 172ns (2 clock cycles)
164 355ns Select (5 clock cycles), IOR/IOW after 243ns (3 clock cycles)
167 1065ns Select (15 clock cycles), IOR/IOW after 314ns (4 clock cycles)
170 355ns Select, (5 clock cycles), IOR/IOW after 101ns (1 clock cycle)
[all …]
/Documentation/networking/
Dnetdevices.rst15 Network device structures need to persist even after module is unloaded and
74 Note that after calling register_netdev() the device is visible in the system.
83 free_netdev() can be called after unregister_netdev() returns on when
153 some time after unregister_netdevice(), it will also be called if
158 netdev state after allocating it and before registration.
161 automatically after unregister_netdevice() when all references to the device
162 are gone. It only takes effect after a successful call to register_netdevice()
166 free_netdev() is safe to call on error paths right after unregister_netdevice()
168 happen after ``rtnl_lock`` is released, therefore in those cases free_netdev()
182 runs during de-registering after device is closed but other subsystems
/Documentation/core-api/
Dcachetlb.rst10 after the interface is invoked.
34 The most severe flush of all. After this interface runs,
44 the TLB. After running, this interface must make sure that
46 'mm' will be visible to the cpu. That is, after running,
57 address translations from the TLB. After running, this
60 'start' to 'end-1' will be visible to the cpu. That is, after
83 After running, this interface must make sure that any previous
86 is, after running, there will be no entries in the TLB for
140 the caches. That is, after running, there will be no cache
149 the caches. That is, after running, there will be no cache
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/Documentation/devicetree/bindings/power/
Ddomain-idle-state.yaml34 after the entry-latency-us has passed.
43 The minimum residency duration in microseconds after which the idle
44 state will yield power benefits, after overcoming the overhead while
/Documentation/driver-api/media/
Ddtv-frontend.rst107 in order to remove the tuner from the I2C bus after a channel is
115 removed in the future, after we have all existing drivers supporting
237 measurement usually comes from the tuner (e. g. after ``FE_HAS_CARRIER``,
241 as the frontend measures it indirectly from other parameters (e. g. after
244 Having it available after inner FEC is more common.
247 - Those counters measure the number of bits and bit errors errors after
249 (after Viterbi, LDPC or other inner code).
252 (e. g. after ``FE_HAS_SYNC`` or after ``FE_HAS_LOCK``,
263 after ``FE_HAS_VITERBI``, see :c:type:`fe_status`).
266 - Those counters measure the number of blocks and block errors errors after
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/Documentation/devicetree/bindings/mmc/
Dmmc-pwrseq-simple.yaml28 They will be de-asserted right after the power has been provided to the
42 Delay in ms after powering the card and de-asserting the
48 Delay in us after asserting the reset-gpios (if any)
/Documentation/admin-guide/media/
Dopera-firmware.rst22 and after that you have 2 files:
31 After that the driver can load the firmware
/Documentation/admin-guide/mm/
Dsoft-dirty.rst25 when the soft-dirty bit is cleared. So, after this, when the task tries to
29 Note, that although all the task's address space is marked as r/o after the
30 soft-dirty bits clear, the #PF-s that occur after that are processed fast.
/Documentation/devicetree/bindings/dma/
Dst,stm32-mdma.yaml24 0x2: Source address pointer is incremented after each data transfer
25 0x3: Source address pointer is decremented after each data transfer
28 0x2: Destination address pointer is incremented after each data transfer
29 0x3: Destination address pointer is decremented after each data transfer
/Documentation/devicetree/bindings/mtd/
Dfsl-upm-nand.txt17 - fsl,upm-wait-flags : add chip-dependent short delays after running the
18 UPM pattern (0x1), after writing a data byte (0x2) or after
/Documentation/devicetree/bindings/display/panel/
Dsamsung,s6e8aa0.yaml30 description: delay after turning regulators on [ms]
34 description: delay after reset sequence [ms]
38 description: delay after initialization sequence [ms]
/Documentation/devicetree/bindings/iio/proximity/
Ddevantech-srf04.yaml16 - echo-gpio is held high by the sensor after sending ultrasonic burst
60 it's switched on again. After some period of inactivity the driver
66 This is the startup time the device needs after a resume to be up and
/Documentation/userspace-api/media/dvb/
Dfrontend-stat-properties.rst153 Measures the number of bit errors after the forward error correction
154 (FEC) done by inner code block (after Viterbi, LDPC or other inner
173 - ``FE_SCALE_COUNTER`` - Number of error bits counted after the inner
182 Measures the amount of bits received after the inner coding, during the
210 Measures the number of block errors after the outer forward error
211 correction coding (after Reed-Solomon or other outer code).
222 - ``FE_SCALE_COUNTER`` - Number of error blocks counted after the outer

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